git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c

   1 /*\r
   2     FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd. \r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS provides completely free yet professionally developed,    *\r
  10      *    robust, strictly quality controlled, supported, and cross          *\r
  11      *    platform software that has become a de facto standard.             *\r
  12      *                                                                       *\r
  13      *    Help yourself get started quickly and support the FreeRTOS         *\r
  14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  16      *                                                                       *\r
  17      *    Thank you!                                                         *\r
  18      *                                                                       *\r
  19     ***************************************************************************\r
  20 \r
  21     This file is part of the FreeRTOS distribution.\r
  22 \r
  23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  24     the terms of the GNU General Public License (version 2) as published by the\r
  25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  26 \r
  27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  28     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  29     >>!   obliged to provide the source code for proprietary components     !<<\r
  30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  31 \r
  32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  35     link: http://www.freertos.org/a00114.html\r
  36 \r
  37     1 tab == 4 spaces!\r
  38 \r
  39     ***************************************************************************\r
  40      *                                                                       *\r
  41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  42      *    not run, what could be wrong?"                                     *\r
  43      *                                                                       *\r
  44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  45      *                                                                       *\r
  46     ***************************************************************************\r
  47 \r
  48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  49     license and Real Time Engineers Ltd. contact details.\r
  50 \r
  51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  54 \r
  55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  57     licenses offer ticketed support, indemnification and middleware.\r
  58 \r
  59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  60     engineered and independently SIL3 certified version for use in safety and\r
  61     mission critical applications that require provable dependability.\r
  62 \r
  63     1 tab == 4 spaces!\r
  64 */\r
  65 \r
  66 #include "FreeRTOS.h"\r
  67 \r
  68 /*-----------------------------------------------------------*/\r
  69 \r
  70 /* Called by the startup code to initialise the run time system. */\r
  71 unsigned char __low_level_init(void);\r
  72 \r
  73 /*-----------------------------------------------------------*/\r
  74 \r
  75 unsigned char __low_level_init(void)\r
  76 {\r
  77 unsigned char resetflag = RESF;\r
  78 unsigned char psval = 0;\r
  79 unsigned portBASE_TYPE i = 0;        \r
  80 \r
  81         /* Setup provided by NEC. */\r
  82 \r
  83         portDISABLE_INTERRUPTS();         /* disable global interrupts */                      \r
  84 \r
  85         PRCMD = 0x00;                     /* On-chip debug mode */\r
  86         OCDM = 0x00;\r
  87         VSWC = 0x00;                      /* set system wait control register */\r
  88         WDTM2 = 0x00;                     /* WDT2 setting */\r
  89         PLLON = 0;                        /* PLL stop mode */\r
  90         psval = 0x0A | 0x00;\r
  91         PRCMD = psval;                    /* set Command Register */\r
  92         CKC = psval;                      /* set Clock Control Register */\r
  93         PLLS = 0x03;\r
  94         psval = 0x80;                     /* Set fXX and fCPU */\r
  95         PRCMD = psval;\r
  96         PCC = psval;\r
  97         PLLON = 1;                        /* activate PLL */\r
  98         for( i = 0; i <= 2000; i++ )      /* Wait for stabilisation */\r
  99         {\r
 100         portNOP();\r
 101         }\r
 102         while( LOCK )                     /* Wait for PLL frequency stabiliasation */\r
 103         {\r
 104         ;\r
 105         }\r
 106         SELPLL = 1;                       /* Set PLL mode active */\r
 107         RSTOP = 0;                        /* Set fR (enable) */\r
 108         BGCE0 = 0;                        /* Set fBRG(disable) */\r
 109         psval = 0x00;                     /* Stand-by setting */\r
 110         PRCMD = psval;                    /* set Command Register */\r
 111         PSC = psval;                      /* set Power Save Control Register */\r
 112 \r
 113         return pdTRUE;\r
 114 }\r
 115 /*-----------------------------------------------------------*/\r