2 This serial port driver is borrowed heavily from DZComm. I have
\r
3 simplified it by removing a lot of the functionality (hardware
\r
4 flow control, etc.). For more details and the full version see
\r
5 http://dzcomm.sourceforge.net
\r
9 FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
\r
12 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
14 This file is part of the FreeRTOS distribution.
\r
16 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
17 the terms of the GNU General Public License (version 2) as published by the
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18 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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20 ***************************************************************************
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21 >>! NOTE: The modification to the GPL is included to allow you to !<<
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22 >>! distribute a combined work that includes FreeRTOS without being !<<
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23 >>! obliged to provide the source code for proprietary components !<<
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24 >>! outside of the FreeRTOS kernel. !<<
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25 ***************************************************************************
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27 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
\r
28 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
\r
29 FOR A PARTICULAR PURPOSE. Full license text is available on the following
\r
30 link: http://www.freertos.org/a00114.html
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32 ***************************************************************************
\r
34 * FreeRTOS provides completely free yet professionally developed, *
\r
35 * robust, strictly quality controlled, supported, and cross *
\r
36 * platform software that is more than just the market leader, it *
\r
37 * is the industry's de facto standard. *
\r
39 * Help yourself get started quickly while simultaneously helping *
\r
40 * to support the FreeRTOS project by purchasing a FreeRTOS *
\r
41 * tutorial book, reference manual, or both: *
\r
42 * http://www.FreeRTOS.org/Documentation *
\r
44 ***************************************************************************
\r
46 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
\r
47 the FAQ page "My application does not run, what could be wrong?". Have you
\r
48 defined configASSERT()?
\r
50 http://www.FreeRTOS.org/support - In return for receiving this top quality
\r
51 embedded software for free we request you assist our global community by
\r
52 participating in the support forum.
\r
54 http://www.FreeRTOS.org/training - Investing in training allows your team to
\r
55 be as productive as possible as early as possible. Now you can receive
\r
56 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
\r
57 Ltd, and the world's leading authority on the world's leading RTOS.
\r
59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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60 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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61 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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63 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
\r
64 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
\r
66 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
\r
67 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
\r
68 licenses offer ticketed support, indemnification and commercial middleware.
\r
70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
\r
71 engineered and independently SIL3 certified version for use in safety and
\r
72 mission critical applications that require provable dependability.
\r
81 #include "FreeRTOS.h"
\r
85 #include "portasm.h"
\r
87 #define serMAX_IRQs ( 16 )
\r
88 #define serTRANSMIT_HOLD_EMPTY_INT ( 0x02 )
\r
89 #define serCOM1_STANDARD_IRQ ( ( unsigned char ) 4 )
\r
90 #define serCOM2_STANDARD_IRQ ( ( unsigned char ) 3 )
\r
93 #define serIMR_8259_0 ( ( unsigned char ) 0x21 )
\r
94 #define serIMR_8259_1 ( ( unsigned char ) 0xa1 )
\r
95 #define serISR_8259_0 ( ( unsigned char ) 0x20 )
\r
96 #define serISR_8259_1 ( ( unsigned char ) 0xa0 )
\r
97 #define serALL_COMS_INTERRUPTS ( ( unsigned char ) 0x0f )
\r
98 #define serALL_MODEM_CTRL_INTERRUPTS ( ( unsigned char ) 0x0f )
\r
100 #define serTRANSMIT_HOLD_OFFSET ( 0 )
\r
101 #define serRECEIVE_DATA_OFFSET ( 0 )
\r
102 #define serBAUD_RATE_DIVISOR_LOW_OFFSET ( 0 )
\r
103 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET ( 1 )
\r
104 #define serINTERRUPT_ENABLE_OFFSET ( 1 )
\r
105 #define serINTERRUPT_ID_OFFSET ( 2 )
\r
106 #define serFIFO_CTRL_OFFSET ( 2 )
\r
107 #define serLINE_CTRL_OFFSET ( 3 )
\r
108 #define serMODEM_CTRL_OFFSET ( 4 )
\r
109 #define serLINE_STATUS_OFFSET ( 5 )
\r
110 #define serMODEM_STATUS_OFFSET ( 6 )
\r
111 #define serSCR_OFFSET ( 7 )
\r
113 #define serMAX_BAUD ( ( unsigned long ) 115200UL )
\r
115 #define serNO_INTERRUPTS ( 0x00 )
\r
117 #define vInterruptOn( pxPort, ucInterrupt ) \
\r
119 unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
120 if( !( ucIn & ucInterrupt ) ) \
\r
122 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt ); \
\r
125 /*-----------------------------------------------------------*/
\r
127 #define vInterruptOff( pxPort, ucInterrupt ) \
\r
129 unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
130 if( ucIn & ucInterrupt ) \
\r
132 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt); \
\r
135 /*-----------------------------------------------------------*/
\r
193 /* This *MUST* match the order in the eBaud definition. */
\r
194 unsigned long ulBaudFromEnum[] =
\r
196 ( unsigned long ) 50,
\r
197 ( unsigned long ) 75,
\r
198 ( unsigned long ) 110,
\r
199 ( unsigned long ) 134,
\r
200 ( unsigned long ) 150,
\r
201 ( unsigned long ) 200,
\r
202 ( unsigned long ) 300,
\r
203 ( unsigned long ) 600,
\r
204 ( unsigned long ) 1200,
\r
205 ( unsigned long ) 1800,
\r
206 ( unsigned long ) 2400,
\r
207 ( unsigned long ) 4800,
\r
208 ( unsigned long ) 9600,
\r
209 ( unsigned long ) 19200,
\r
210 ( unsigned long ) 38400UL,
\r
211 ( unsigned long ) 57600UL,
\r
212 ( unsigned long ) 115200UL
\r
215 typedef struct xCOM_PORT
\r
217 unsigned short sPort; /* comm port address eg. 0x3f8 */
\r
218 unsigned char ucIRQ; /* comm IRQ eg. 3 */
\r
220 /* Next two fields used for setting up the IRQ routine and
\r
221 * (un)masking the interrupt in certain circumstances.
\r
223 unsigned short usIRQVector;
\r
224 unsigned char ucInterruptEnableMast;
\r
226 /* Read/Write buffers. */
\r
227 QueueHandle_t xRxedChars;
\r
228 QueueHandle_t xCharsForTx;
\r
230 /* This lot are set up to minimise CPU time where accessing the comm
\r
231 * port's registers.
\r
233 unsigned short usTransmitHoldReg;
\r
234 unsigned short usReceiveDataRegister;
\r
235 unsigned short usBaudRateDivisorLow;
\r
236 unsigned short usBaudRateDivisorHigh;
\r
237 unsigned short usInterruptEnableReg;
\r
238 unsigned short usInterruptIDReg;
\r
239 unsigned short usFIFOCtrlReg;
\r
240 unsigned short usLineCtrlReg;
\r
241 unsigned short usModemCtrlReg;
\r
242 unsigned short usLineStatusReg;
\r
243 unsigned short usModemStatusReg;
\r
244 unsigned short usSCRReg;
\r
245 unsigned short us8259InterruptServiceReg;
\r
246 unsigned short us8259InterruptMaskReg;
\r
248 /* This semaphore does nothing useful except test a feature of the
\r
250 SemaphoreHandle_t xTestSem;
\r
254 typedef xComPort *xComPortHandle;
\r
256 /* A xComPort structure can be associated with each IRQ. Initially none
\r
257 are create/installed. */
\r
258 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };
\r
260 /*-----------------------------------------------------------*/
\r
262 /* These prototypes are repeated here so we don't have to include the serial header. This allows
\r
263 the xComPortHandle structure details to be private to this file. */
\r
264 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );
\r
265 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, TickType_t xBlockTime );
\r
266 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, TickType_t xBlockTime );
\r
267 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );
\r
269 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );
\r
270 static short sComPortISR( const xComPort * const pxPort );
\r
272 /*-----------------------------------------------------------*/
\r
274 /* Define an interrupt handler for each slot in the xPortStatus array. */
\r
276 #define COM_IRQ_WRAPPER(N) \
\r
277 static void __interrupt COM_IRQ##N##_WRAPPER( void ) \
\r
279 portDISABLE_INTERRUPTS(); \
\r
280 if( sComPortISR( xPortStatus[##N##] ) ) \
\r
282 portSWITCH_CONTEXT(); \
\r
286 COM_IRQ_WRAPPER( 0 )
\r
287 COM_IRQ_WRAPPER( 1 )
\r
288 COM_IRQ_WRAPPER( 2 )
\r
289 COM_IRQ_WRAPPER( 3 )
\r
290 COM_IRQ_WRAPPER( 4 )
\r
291 COM_IRQ_WRAPPER( 5 )
\r
292 COM_IRQ_WRAPPER( 6 )
\r
293 COM_IRQ_WRAPPER( 7 )
\r
294 COM_IRQ_WRAPPER( 8 )
\r
295 COM_IRQ_WRAPPER( 9 )
\r
296 COM_IRQ_WRAPPER( 10 )
\r
297 COM_IRQ_WRAPPER( 11 )
\r
298 COM_IRQ_WRAPPER( 12 )
\r
299 COM_IRQ_WRAPPER( 13 )
\r
300 COM_IRQ_WRAPPER( 14 )
\r
301 COM_IRQ_WRAPPER( 15 )
\r
303 static pxISR xISRs[ serMAX_IRQs ] =
\r
315 COM_IRQ10_WRAPPER,
\r
316 COM_IRQ11_WRAPPER,
\r
317 COM_IRQ12_WRAPPER,
\r
318 COM_IRQ13_WRAPPER,
\r
323 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };
\r
325 /*-----------------------------------------------------------*/
\r
328 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
\r
332 /* Create a structure to handle this port. */
\r
333 pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );
\r
335 if( pxPort != NULL )
\r
337 /* Create the queues used by the comtest task. */
\r
338 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
\r
339 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
\r
341 /* Create the test semaphore. This does nothing useful except test a feature of the scheduler. */
\r
342 vSemaphoreCreateBinary( pxPort->xTestSem );
\r
344 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );
\r
351 /*-----------------------------------------------------------*/
\r
353 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )
\r
356 unsigned long ulDivisor;
\r
357 unsigned char ucDivisorLow;
\r
358 unsigned char ucDivisorHigh;
\r
359 unsigned char ucCommParam;
\r
361 /* IRQ numbers - standard */
\r
362 if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )
\r
364 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;
\r
365 pxPort->sPort = 0x3f8;
\r
369 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;
\r
370 pxPort->sPort = 0x2f8;
\r
373 /* Set up variables in port making it easy to see which sIn/o address is which */
\r
374 pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;
\r
375 pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;
\r
376 pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;
\r
377 pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;
\r
378 pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;
\r
379 pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;
\r
380 pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;
\r
381 pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;
\r
382 pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;
\r
383 pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;
\r
384 pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;
\r
385 pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;
\r
387 /* Set communication parameters. */
\r
388 ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];
\r
389 ucDivisorLow = ( unsigned char ) ulDivisor & ( unsigned char ) 0xff;
\r
390 ucDivisorHigh = ( unsigned char ) ( ( ( unsigned short ) ulDivisor >> 8 ) & 0xff );
\r
392 switch( eWantedParity )
\r
394 case serNO_PARITY: ucCommParam = 0x00;
\r
396 case serODD_PARITY: ucCommParam = 0x08;
\r
398 case serEVEN_PARITY: ucCommParam = 0x18;
\r
400 case serMARK_PARITY: ucCommParam = 0x28;
\r
402 case serSPACE_PARITY: ucCommParam = 0x38;
\r
404 default: ucCommParam = 0x00;
\r
408 switch ( eWantedDataBits )
\r
410 case serBITS_5: ucCommParam |= 0x00;
\r
412 case serBITS_6: ucCommParam |= 0x01;
\r
414 case serBITS_7: ucCommParam |= 0x02;
\r
416 case serBITS_8: ucCommParam |= 0x03;
\r
418 default: ucCommParam |= 0x03;
\r
422 if( eWantedStopBits == serSTOP_2 )
\r
424 ucCommParam |= 0x04;
\r
427 /* Reset UART into known state - Thanks to Bradley Town */
\r
428 portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 ); /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */
\r
429 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 ); /* Disable interrupts from UART */
\r
430 portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 ); /* Enable some multi-port cards */
\r
432 /* Code based on stuff from SVAsync lib. Clear UART Status and data registers
\r
433 setting up FIFO if possible */
\r
434 sIn = portINPUT_BYTE( pxPort->usSCRReg );
\r
435 portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );
\r
437 if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )
\r
439 /* The chip is better than an 8250 */
\r
440 portOUTPUT_BYTE( pxPort->usSCRReg, sIn ); /* Set usSCRReg back to what it was before */
\r
441 portINPUT_BYTE( pxPort->usSCRReg); /* Give slow motherboards a chance */
\r
443 /* Try and start the FIFO. It appears that some chips need a two call
\r
444 protocol, but those that don't seem to work even if you do start it twice.
\r
445 The first call is simply to start it, the second starts it and sets an 8
\r
446 byte FIFO trigger level. */
\r
447 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );
\r
448 portINPUT_BYTE( pxPort->usFIFOCtrlReg ); /* Give slow motherboards a chance to catch up */
\r
449 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );
\r
451 /* Check that the FIFO initialised */
\r
452 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )
\r
454 /* It didn't so we assume it isn't there but disable it to be on the
\r
456 portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );
\r
460 /* End of (modified) SVAsync code.
\r
461 Set interrupt parameters calculating mask for 8259 controller's
\r
462 IMR and number of interrupt handler for given irq level */
\r
463 if (pxPort->ucIRQ <= 7)
\r
465 /* if 0<=irq<=7 first IMR address used */
\r
466 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);
\r
467 pxPort->usIRQVector = pxPort->ucIRQ + 8;
\r
468 pxPort->us8259InterruptMaskReg = serIMR_8259_0;
\r
469 pxPort->us8259InterruptServiceReg = serISR_8259_0;
\r
473 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );
\r
474 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;
\r
475 pxPort->us8259InterruptMaskReg = serIMR_8259_1;
\r
476 pxPort->us8259InterruptServiceReg = serISR_8259_1;
\r
479 /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers
\r
480 to set baud rate */
\r
481 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );
\r
482 portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );
\r
483 portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );
\r
485 /* reset usLineCtrlReg and Port Toggleout */
\r
486 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );
\r
488 portENTER_CRITICAL();
\r
490 if( xPortStatus[ pxPort->ucIRQ ] == NULL )
\r
492 xPortStatus[ pxPort->ucIRQ ] = pxPort;
\r
495 xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );
\r
496 _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );
\r
498 /* enable interrupt pxPort->ucIRQ level */
\r
499 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
501 /* And allow interrupts again now the hairy bit's done */
\r
502 portEXIT_CRITICAL();
\r
504 /* This version does not allow flow control. */
\r
505 portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );
\r
507 /* enable all communication's interrupts */
\r
508 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );
\r
510 /*-----------------------------------------------------------*/
\r
512 static short sComPortISR( const xComPort * const pxPort )
\r
514 short sInterruptID;
\r
516 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
517 extern void vComTestUnsuspendTask( void );
\r
519 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );
\r
521 /* Decide which UART has issued the interrupt */
\r
522 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );
\r
524 /* service whatever requests the calling UART may have. The top 4 bits are
\r
525 either unused or indicate the presence of a functioning FIFO, which we don't
\r
526 need to know. So trim them off to simplify the switch statement below. */
\r
527 sInterruptID &= 0x0f;
\r
530 switch( sInterruptID )
\r
532 case 0x0c: /* Timeout
\r
533 Called when FIFO not up to trigger level but no activity for
\r
534 a while. Handled exactly as RDAINT, see below for
\r
538 cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
539 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
541 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
542 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
543 this as an invalid call, then give the semaphore for real. */
\r
544 vComTestUnsuspendTask();
\r
545 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
547 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
550 case 0x06: /* LSINT */
\r
551 portINPUT_BYTE( pxPort->usLineStatusReg );
\r
554 case 0x04: /* RDAINT */
\r
555 /* The usInterruptIDReg flag tested above stops when the
\r
556 FIFO is below the trigger level rather than empty, whereas
\r
557 this flag allows one to empty it: (do loop because there
\r
558 must be at least one to read by virtue of having got here.) */
\r
561 cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
562 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
564 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
565 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
566 this as an invalid call, then give the semaphore for real. */
\r
567 vComTestUnsuspendTask();
\r
568 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
570 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
573 case 0x02: /* serTRANSMIT_HOLD_EMPTY_INT */
\r
574 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xHigherPriorityTaskWoken ) != pdTRUE )
\r
576 /* Queue empty, nothing to send */
\r
577 vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);
\r
581 portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( short ) cOut );
\r
585 case 0x00: /* MSINT */
\r
586 portINPUT_BYTE( pxPort->usModemStatusReg );
\r
590 /* Get the next instruction, trimming as above */
\r
591 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;
\r
593 } while( !( sInterruptID & 0x01 ) );
\r
595 if( pxPort->ucIRQ > 7 )
\r
597 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );
\r
598 portOUTPUT_BYTE( 0x20, 0x62);
\r
602 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );
\r
605 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
607 /* If posting any of the characters to a queue woke a task that was blocked on
\r
608 the queue we may want to return to the task just woken (depending on its
\r
609 priority relative to the task this ISR interrupted. */
\r
610 return xHigherPriorityTaskWoken;
\r
612 /*-----------------------------------------------------------*/
\r
614 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, TickType_t xBlockTime )
\r
616 /* Get the next character from the buffer, note that this routine is only
\r
617 called having checked that the is (at least) one to get */
\r
618 if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )
\r
627 /*-----------------------------------------------------------*/
\r
629 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, TickType_t xBlockTime )
\r
631 if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
636 vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );
\r
640 /*-----------------------------------------------------------*/
\r
642 void vSerialPutString( xComPortHandle pxPort, const char * const pcString, unsigned short usStringLength )
\r
645 const TickType_t xNoBlock = ( TickType_t ) 0;
\r
647 /* Stop warnings. */
\r
648 ( void ) usStringLength;
\r
650 pcNextChar = ( char * ) pcString;
\r
651 while( *pcNextChar )
\r
653 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );
\r
657 /*-----------------------------------------------------------*/
\r
659 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )
\r
661 const TickType_t xBlockTime = ( TickType_t ) 0xffff;
\r
663 /* This function does nothing interesting, but test the
\r
664 semaphore from ISR mechanism. */
\r
665 return xSemaphoreTake( xPort->xTestSem, xBlockTime );
\r
667 /*-----------------------------------------------------------*/
\r
669 void vSerialClose( xComPortHandle xPort )
\r
671 portENTER_CRITICAL();
\r
673 /* Turn off the interrupts. */
\r
674 portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );
\r
675 portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );
\r
677 /* Put back the original ISR. */
\r
678 _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );
\r
680 /* Remove the reference in the array of xComPort structures. */
\r
681 xPortStatus[ xPort->ucIRQ ] = NULL;
\r
683 /* Delete the queues. */
\r
684 vQueueDelete( xPort->xRxedChars );
\r
685 vQueueDelete( xPort->xCharsForTx );
\r
687 vPortFree( ( void * ) xPort );
\r
689 portEXIT_CRITICAL();
\r