git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/PC/serial/serial.c

   1 /*\r
   2         This serial port driver is borrowed heavily from DZComm.  I have\r
   3         simplified it by removing a lot of the functionality (hardware \r
   4         flow control, etc.).  For more details and the full version see\r
   5         http://dzcomm.sourceforge.net\r
   6 */\r
   7 \r
   8 /*\r
   9     FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
  10 \r
  11     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
  12     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
  13 \r
  14     ***************************************************************************\r
  15      *                                                                       *\r
  16      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
  17      *    Complete, revised, and edited pdf reference manuals are also       *\r
  18      *    available.                                                         *\r
  19      *                                                                       *\r
  20      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
  21      *    ensuring you get running as quickly as possible and with an        *\r
  22      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  23      *    the FreeRTOS project to continue with its mission of providing     *\r
  24      *    professional grade, cross platform, de facto standard solutions    *\r
  25      *    for microcontrollers - completely free of charge!                  *\r
  26      *                                                                       *\r
  27      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
  28      *                                                                       *\r
  29      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  30      *                                                                       *\r
  31     ***************************************************************************\r
  32 \r
  33 \r
  34     This file is part of the FreeRTOS distribution.\r
  35 \r
  36     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  37     the terms of the GNU General Public License (version 2) as published by the\r
  38     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  39 \r
  40     >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
  41     distribute a combined work that includes FreeRTOS without being obliged to\r
  42     provide the source code for proprietary components outside of the FreeRTOS\r
  43     kernel.\r
  44 \r
  45     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  46     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  47     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
  48     details. You should have received a copy of the GNU General Public License\r
  49     and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
  50     viewed here: http://www.freertos.org/a00114.html and also obtained by\r
  51     writing to Real Time Engineers Ltd., contact details for whom are available\r
  52     on the FreeRTOS WEB site.\r
  53 \r
  54     1 tab == 4 spaces!\r
  55 \r
  56     ***************************************************************************\r
  57      *                                                                       *\r
  58      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  59      *    not run, what could be wrong?"                                     *\r
  60      *                                                                       *\r
  61      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  62      *                                                                       *\r
  63     ***************************************************************************\r
  64 \r
  65 \r
  66     http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
  67     license and Real Time Engineers Ltd. contact details.\r
  68 \r
  69     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  70     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
  71     fully thread aware and reentrant UDP/IP stack.\r
  72 \r
  73     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
  74     Integrity Systems, who sell the code with commercial support, \r
  75     indemnification and middleware, under the OpenRTOS brand.\r
  76     \r
  77     http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
  78     engineered and independently SIL3 certified version for use in safety and \r
  79     mission critical applications that require provable dependability.\r
  80 */\r
  81 \r
  82 \r
  83 \r
  84 #include <stdlib.h>\r
  85 #include <dos.h>\r
  86 #include "FreeRTOS.h"\r
  87 #include "queue.h"\r
  88 #include "task.h"\r
  89 #include "semphr.h"\r
  90 #include "portasm.h"\r
  91 \r
  92 #define serMAX_IRQs                                             ( 16 )\r
  93 #define serTRANSMIT_HOLD_EMPTY_INT              ( 0x02 )\r
  94 #define serCOM1_STANDARD_IRQ                    ( ( unsigned char ) 4 )\r
  95 #define serCOM2_STANDARD_IRQ                    ( ( unsigned char ) 3 )\r
  96 \r
  97 \r
  98 #define serIMR_8259_0                                   ( ( unsigned char ) 0x21 )\r
  99 #define serIMR_8259_1                                   ( ( unsigned char ) 0xa1 )\r
 100 #define serISR_8259_0                                   ( ( unsigned char ) 0x20 )\r
 101 #define serISR_8259_1                                   ( ( unsigned char ) 0xa0 )\r
 102 #define serALL_COMS_INTERRUPTS                  ( ( unsigned char ) 0x0f )\r
 103 #define serALL_MODEM_CTRL_INTERRUPTS    ( ( unsigned char ) 0x0f )\r
 104 \r
 105 #define serTRANSMIT_HOLD_OFFSET                                 ( 0 )\r
 106 #define serRECEIVE_DATA_OFFSET                                  ( 0 )\r
 107 #define serBAUD_RATE_DIVISOR_LOW_OFFSET                 ( 0 )\r
 108 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET                ( 1 )\r
 109 #define serINTERRUPT_ENABLE_OFFSET                              ( 1 )\r
 110 #define serINTERRUPT_ID_OFFSET                                  ( 2 )\r
 111 #define serFIFO_CTRL_OFFSET                                             ( 2 )\r
 112 #define serLINE_CTRL_OFFSET                                             ( 3 )\r
 113 #define serMODEM_CTRL_OFFSET                                    ( 4 )\r
 114 #define serLINE_STATUS_OFFSET                                   ( 5 )\r
 115 #define serMODEM_STATUS_OFFSET                                  ( 6 )\r
 116 #define serSCR_OFFSET                                                   ( 7 )\r
 117 \r
 118 #define serMAX_BAUD                     ( ( unsigned long ) 115200UL )\r
 119 \r
 120 #define serNO_INTERRUPTS        ( 0x00 )\r
 121 \r
 122 #define vInterruptOn( pxPort, ucInterrupt )                                                                             \\r
 123 {                                                                                                                                                               \\r
 124         unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );    \\r
 125         if( !( ucIn & ucInterrupt ) )                                                                                           \\r
 126         {                                                                                                                                                       \\r
 127                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt );    \\r
 128         }                                                                                                                                                       \\r
 129 }                                                                                                                                                               \r
 130 /*-----------------------------------------------------------*/\r
 131 \r
 132 #define vInterruptOff( pxPort, ucInterrupt )                                                                    \\r
 133 {                                                                                                                                                               \\r
 134         unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );    \\r
 135         if( ucIn & ucInterrupt )                                                                                                        \\r
 136         {                                                                                                                                                       \\r
 137                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt);    \\r
 138         }                                                                                                                                                       \\r
 139 }\r
 140 /*-----------------------------------------------------------*/\r
 141 \r
 142 typedef enum\r
 143 { \r
 144         serCOM1, \r
 145         serCOM2, \r
 146         serCOM3, \r
 147         serCOM4, \r
 148         serCOM5, \r
 149         serCOM6, \r
 150         serCOM7, \r
 151         serCOM8 \r
 152 } eCOMPort;\r
 153 \r
 154 typedef enum \r
 155 { \r
 156         serNO_PARITY, \r
 157         serODD_PARITY, \r
 158         serEVEN_PARITY, \r
 159         serMARK_PARITY, \r
 160         serSPACE_PARITY \r
 161 } eParity;\r
 162 \r
 163 typedef enum \r
 164 { \r
 165         serSTOP_1, \r
 166         serSTOP_2 \r
 167 } eStopBits;\r
 168 \r
 169 typedef enum \r
 170 { \r
 171         serBITS_5, \r
 172         serBITS_6, \r
 173         serBITS_7, \r
 174         serBITS_8 \r
 175 } eDataBits;\r
 176 \r
 177 typedef enum \r
 178 { \r
 179         ser50,          \r
 180         ser75,          \r
 181         ser110,         \r
 182         ser134,         \r
 183         ser150,    \r
 184         ser200,\r
 185         ser300,         \r
 186         ser600,         \r
 187         ser1200,        \r
 188         ser1800,        \r
 189         ser2400,   \r
 190         ser4800,\r
 191         ser9600,                \r
 192         ser19200,       \r
 193         ser38400,       \r
 194         ser57600,       \r
 195         ser115200\r
 196 } eBaud;\r
 197 \r
 198 /* This *MUST* match the order in the eBaud definition. */\r
 199 unsigned long ulBaudFromEnum[] = \r
 200 { \r
 201         ( unsigned long ) 50, \r
 202         ( unsigned long ) 75, \r
 203         ( unsigned long ) 110, \r
 204         ( unsigned long ) 134, \r
 205         ( unsigned long ) 150,  \r
 206         ( unsigned long ) 200, \r
 207         ( unsigned long ) 300, \r
 208         ( unsigned long ) 600, \r
 209         ( unsigned long ) 1200, \r
 210         ( unsigned long ) 1800, \r
 211         ( unsigned long ) 2400,   \r
 212         ( unsigned long ) 4800,   \r
 213         ( unsigned long ) 9600,  \r
 214         ( unsigned long ) 19200,  \r
 215         ( unsigned long ) 38400UL,\r
 216         ( unsigned long ) 57600UL,\r
 217         ( unsigned long ) 115200UL\r
 218 };\r
 219 \r
 220 typedef struct xCOM_PORT\r
 221 { \r
 222         unsigned short sPort;   /* comm port address eg. 0x3f8    */\r
 223         unsigned char ucIRQ;    /* comm IRQ eg. 3                 */\r
 224 \r
 225         /* Next two fields used for setting up the IRQ routine and\r
 226         * (un)masking the interrupt in certain circumstances.\r
 227         */\r
 228         unsigned short usIRQVector;\r
 229         unsigned char ucInterruptEnableMast;\r
 230 \r
 231         /* Read/Write buffers. */\r
 232         xQueueHandle xRxedChars; \r
 233         xQueueHandle xCharsForTx;\r
 234 \r
 235         /* This lot are set up to minimise CPU time where accessing the comm\r
 236         * port's registers.\r
 237         */\r
 238         unsigned short usTransmitHoldReg; \r
 239         unsigned short usReceiveDataRegister;\r
 240         unsigned short usBaudRateDivisorLow; \r
 241         unsigned short usBaudRateDivisorHigh;\r
 242         unsigned short usInterruptEnableReg;\r
 243         unsigned short usInterruptIDReg;\r
 244         unsigned short usFIFOCtrlReg;\r
 245         unsigned short usLineCtrlReg;\r
 246         unsigned short usModemCtrlReg;\r
 247         unsigned short usLineStatusReg;\r
 248         unsigned short usModemStatusReg;\r
 249         unsigned short usSCRReg;\r
 250         unsigned short us8259InterruptServiceReg;\r
 251         unsigned short us8259InterruptMaskReg;\r
 252 \r
 253         /* This semaphore does nothing useful except test a feature of the\r
 254         scheduler. */\r
 255         xSemaphoreHandle xTestSem;\r
 256 \r
 257 } xComPort;\r
 258 \r
 259 typedef xComPort *xComPortHandle;\r
 260 \r
 261 /* A xComPort structure can be associated with each IRQ.  Initially none\r
 262 are create/installed. */\r
 263 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };\r
 264 \r
 265 /*-----------------------------------------------------------*/\r
 266 \r
 267 /* These prototypes are repeated here so we don't have to include the serial header.  This allows\r
 268 the xComPortHandle structure details to be private to this file. */\r
 269 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );\r
 270 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime );\r
 271 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime );\r
 272 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );\r
 273 \r
 274 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );\r
 275 static short sComPortISR( const xComPort * const pxPort );\r
 276 \r
 277 /*-----------------------------------------------------------*/\r
 278 \r
 279 /* Define an interrupt handler for each slot in the xPortStatus array. */\r
 280 \r
 281 #define COM_IRQ_WRAPPER(N)                                                                              \\r
 282         static void __interrupt COM_IRQ##N##_WRAPPER( void )            \\r
 283         {                                                                                                                       \\r
 284                 portDISABLE_INTERRUPTS();                                                               \\r
 285                 if( sComPortISR( xPortStatus[##N##] ) )                                 \\r
 286                 {                                                                                                               \\r
 287                         portSWITCH_CONTEXT();                                                           \\r
 288                 }                                                                                                               \\r
 289         } \r
 290 \r
 291 COM_IRQ_WRAPPER( 0 )\r
 292 COM_IRQ_WRAPPER( 1 )\r
 293 COM_IRQ_WRAPPER( 2 )\r
 294 COM_IRQ_WRAPPER( 3 )\r
 295 COM_IRQ_WRAPPER( 4 )\r
 296 COM_IRQ_WRAPPER( 5 )\r
 297 COM_IRQ_WRAPPER( 6 )\r
 298 COM_IRQ_WRAPPER( 7 )\r
 299 COM_IRQ_WRAPPER( 8 )\r
 300 COM_IRQ_WRAPPER( 9 )\r
 301 COM_IRQ_WRAPPER( 10 )\r
 302 COM_IRQ_WRAPPER( 11 )\r
 303 COM_IRQ_WRAPPER( 12 )\r
 304 COM_IRQ_WRAPPER( 13 )\r
 305 COM_IRQ_WRAPPER( 14 )\r
 306 COM_IRQ_WRAPPER( 15 )\r
 307 \r
 308 static pxISR xISRs[ serMAX_IRQs ] = \r
 309 {\r
 310         COM_IRQ0_WRAPPER, \r
 311         COM_IRQ1_WRAPPER, \r
 312         COM_IRQ2_WRAPPER, \r
 313         COM_IRQ3_WRAPPER, \r
 314         COM_IRQ4_WRAPPER, \r
 315         COM_IRQ5_WRAPPER, \r
 316         COM_IRQ6_WRAPPER, \r
 317         COM_IRQ7_WRAPPER, \r
 318         COM_IRQ8_WRAPPER, \r
 319         COM_IRQ9_WRAPPER, \r
 320         COM_IRQ10_WRAPPER, \r
 321         COM_IRQ11_WRAPPER, \r
 322         COM_IRQ12_WRAPPER, \r
 323         COM_IRQ13_WRAPPER, \r
 324         COM_IRQ14_WRAPPER,\r
 325         COM_IRQ15_WRAPPER\r
 326 };\r
 327 \r
 328 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };\r
 329 \r
 330 /*-----------------------------------------------------------*/\r
 331 \r
 332 \r
 333 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )\r
 334 {\r
 335 xComPort *pxPort;\r
 336 \r
 337         /* Create a structure to handle this port. */\r
 338         pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );\r
 339         \r
 340         if( pxPort != NULL )\r
 341         {\r
 342                 /* Create the queues used by the comtest task. */\r
 343                 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );\r
 344                 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );\r
 345 \r
 346                 /* Create the test semaphore.  This does nothing useful except test a feature of the scheduler. */\r
 347                 vSemaphoreCreateBinary( pxPort->xTestSem );\r
 348 \r
 349                 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );\r
 350 \r
 351                 return pxPort;\r
 352         }\r
 353 \r
 354         return NULL;\r
 355 }\r
 356 /*-----------------------------------------------------------*/\r
 357 \r
 358 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )\r
 359 {\r
 360 short sIn;\r
 361 unsigned long ulDivisor;\r
 362 unsigned char ucDivisorLow;\r
 363 unsigned char ucDivisorHigh;\r
 364 unsigned char ucCommParam;\r
 365 \r
 366         /* IRQ numbers - standard */\r
 367         if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )\r
 368         {\r
 369                 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;\r
 370                 pxPort->sPort = 0x3f8;\r
 371         }\r
 372         else\r
 373         {\r
 374                 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;\r
 375                 pxPort->sPort = 0x2f8;\r
 376         }\r
 377 \r
 378         /* Set up variables in port making it easy to see which sIn/o address is which */\r
 379         pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;\r
 380         pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;\r
 381         pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;\r
 382         pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;\r
 383         pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;\r
 384         pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;\r
 385         pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;\r
 386         pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;\r
 387         pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;\r
 388         pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;\r
 389         pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;\r
 390         pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;\r
 391 \r
 392         /* Set communication parameters. */\r
 393         ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];\r
 394         ucDivisorLow = ( unsigned char ) ulDivisor & ( unsigned char ) 0xff;\r
 395         ucDivisorHigh = ( unsigned char ) ( ( ( unsigned short ) ulDivisor >> 8 ) & 0xff );\r
 396         \r
 397         switch( eWantedParity )\r
 398         {       \r
 399                 case serNO_PARITY:              ucCommParam = 0x00;\r
 400                                                                 break;\r
 401                 case serODD_PARITY:             ucCommParam = 0x08;\r
 402                                                                 break;\r
 403                 case serEVEN_PARITY:    ucCommParam = 0x18;\r
 404                                                                 break;\r
 405                 case serMARK_PARITY:    ucCommParam = 0x28;\r
 406                                                                 break;\r
 407                 case serSPACE_PARITY:   ucCommParam = 0x38;\r
 408                                                                 break;\r
 409                 default:                                ucCommParam = 0x00;\r
 410                                                                 break;\r
 411         }\r
 412 \r
 413         switch ( eWantedDataBits )\r
 414         {\r
 415                 case serBITS_5: ucCommParam |= 0x00;\r
 416                                                 break;\r
 417                 case serBITS_6: ucCommParam |= 0x01;\r
 418                                                 break;\r
 419                 case serBITS_7: ucCommParam |= 0x02;\r
 420                                                 break;\r
 421                 case serBITS_8: ucCommParam |= 0x03;\r
 422                                                 break;\r
 423                 default:                ucCommParam |= 0x03;\r
 424                                                 break;\r
 425         }\r
 426 \r
 427         if( eWantedStopBits == serSTOP_2 ) \r
 428         {\r
 429                 ucCommParam |= 0x04;\r
 430         }\r
 431 \r
 432         /* Reset UART into known state - Thanks to Bradley Town */\r
 433         portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 );                 /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */\r
 434         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 );  /* Disable interrupts from UART */\r
 435         portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 );                /* Enable some multi-port cards */\r
 436 \r
 437         /* Code based on stuff from SVAsync lib. Clear UART Status and data registers\r
 438         setting up FIFO if possible */\r
 439         sIn = portINPUT_BYTE( pxPort->usSCRReg );\r
 440         portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );\r
 441 \r
 442         if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )\r
 443         {\r
 444                 /* The chip is better than an 8250 */\r
 445                 portOUTPUT_BYTE( pxPort->usSCRReg, sIn );       /* Set usSCRReg back to what it was before */\r
 446                 portINPUT_BYTE( pxPort->usSCRReg);                      /* Give slow motherboards a chance */\r
 447 \r
 448                 /* Try and start the FIFO. It appears that some chips need a two call \r
 449                 protocol, but those that don't seem to work even if you do start it twice. \r
 450                 The first call is simply to start it, the second starts it and sets an 8 \r
 451                 byte FIFO trigger level. */\r
 452                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );\r
 453                 portINPUT_BYTE( pxPort->usFIFOCtrlReg );                        /* Give slow motherboards a chance to catch up */\r
 454                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );\r
 455 \r
 456                 /* Check that the FIFO initialised */\r
 457                 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )\r
 458                 {\r
 459                         /* It didn't so we assume it isn't there but disable it to be on the \r
 460                         safe side. */\r
 461                         portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );\r
 462                 }\r
 463         }\r
 464 \r
 465         /* End of (modified) SVAsync code.  \r
 466         Set interrupt parameters calculating mask for 8259 controller's \r
 467         IMR and number of interrupt handler for given irq level  */\r
 468         if (pxPort->ucIRQ <= 7)\r
 469         {       \r
 470                 /* if 0<=irq<=7 first IMR address used */\r
 471                 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);\r
 472                 pxPort->usIRQVector = pxPort->ucIRQ + 8;\r
 473                 pxPort->us8259InterruptMaskReg = serIMR_8259_0;\r
 474                 pxPort->us8259InterruptServiceReg = serISR_8259_0;\r
 475         }\r
 476         else\r
 477         {\r
 478                 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );\r
 479                 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;\r
 480                 pxPort->us8259InterruptMaskReg = serIMR_8259_1;\r
 481                 pxPort->us8259InterruptServiceReg = serISR_8259_1;\r
 482         }\r
 483 \r
 484         /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers \r
 485         to set baud rate */\r
 486         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );\r
 487         portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );\r
 488         portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );\r
 489 \r
 490         /* reset usLineCtrlReg and Port Toggleout */\r
 491         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );\r
 492 \r
 493         portENTER_CRITICAL();\r
 494 \r
 495         if( xPortStatus[ pxPort->ucIRQ ] == NULL )\r
 496         {       \r
 497                 xPortStatus[ pxPort->ucIRQ ] = pxPort;\r
 498         }\r
 499         \r
 500         xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );\r
 501         _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );\r
 502 \r
 503         /* enable interrupt pxPort->ucIRQ level */\r
 504         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
 505 \r
 506         /* And allow interrupts again now the hairy bit's done */\r
 507         portEXIT_CRITICAL();            \r
 508 \r
 509         /* This version does not allow flow control. */\r
 510         portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );\r
 511 \r
 512         /* enable all communication's interrupts */\r
 513         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );\r
 514 }\r
 515 /*-----------------------------------------------------------*/\r
 516 \r
 517 static short sComPortISR( const xComPort * const pxPort )\r
 518 {\r
 519 short sInterruptID;\r
 520 char cIn, cOut;\r
 521 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
 522 extern void vComTestUnsuspendTask( void );\r
 523 \r
 524         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );\r
 525 \r
 526         /* Decide which UART has issued the interrupt */\r
 527         sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );\r
 528 \r
 529         /* service whatever requests the calling UART may have. The top 4 bits are\r
 530         either unused or indicate the presence of a functioning FIFO, which we don't\r
 531         need to know. So trim them off to simplify the switch statement below. */\r
 532         sInterruptID &= 0x0f;\r
 533         do\r
 534         {\r
 535                 switch( sInterruptID )\r
 536                 {\r
 537                         case 0x0c:      /* Timeout\r
 538                                                 Called when FIFO not up to trigger level but no activity for \r
 539                                                 a while. Handled exactly as RDAINT, see below for \r
 540                                                 description. */\r
 541                                                 do\r
 542                                                 {\r
 543                                                         cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                         \r
 544                                                         xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );\r
 545 \r
 546                                                         /* Also release the semaphore - this does nothing interesting and is just a test.\r
 547                                                         We first attempt to unsuspend the task to check the scheduler correctely detects\r
 548                                                         this as an invalid call, then give the semaphore for real. */\r
 549                                                         vComTestUnsuspendTask();\r
 550                                                         xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );\r
 551 \r
 552                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
 553                                                 break;\r
 554 \r
 555                         case 0x06:      /* LSINT */\r
 556                                                 portINPUT_BYTE( pxPort->usLineStatusReg );\r
 557                                                 break;\r
 558 \r
 559                         case 0x04:      /* RDAINT */\r
 560                                                 /* The usInterruptIDReg flag tested above stops when the \r
 561                                                 FIFO is below the trigger level rather than empty, whereas \r
 562                                                 this flag allows one to empty it: (do loop because there \r
 563                                                 must be at least one to read by virtue of having got here.) */\r
 564                                                 do\r
 565                                                 {\r
 566                                                         cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                         \r
 567                                                         xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );\r
 568 \r
 569                                                         /* Also release the semaphore - this does nothing interesting and is just a test.\r
 570                                                         We first attempt to unsuspend the task to check the scheduler correctely detects\r
 571                                                         this as an invalid call, then give the semaphore for real. */\r
 572                                                         vComTestUnsuspendTask();\r
 573                                                         xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );\r
 574 \r
 575                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
 576                                                 break;\r
 577 \r
 578                         case 0x02:      /* serTRANSMIT_HOLD_EMPTY_INT */\r
 579                                                 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xHigherPriorityTaskWoken ) != pdTRUE )                                           \r
 580                                                 {                                                                                                                                                                               \r
 581                                                         /* Queue empty, nothing to send */                                                                                                      \r
 582                                                         vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);                                                                     \r
 583                                                 }                                                                                                                                                                               \r
 584                                                 else                                                                                                                                                                    \r
 585                                                 {                                                                                                                                                                               \r
 586                                                         portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( short ) cOut );                                   \r
 587                                                 }\r
 588                                                 break;\r
 589 \r
 590                         case 0x00:      /* MSINT */\r
 591                                                 portINPUT_BYTE( pxPort->usModemStatusReg );\r
 592                                                 break;\r
 593                 }               \r
 594 \r
 595                 /* Get the next instruction, trimming as above */\r
 596                 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;\r
 597 \r
 598         } while( !( sInterruptID & 0x01 ) );\r
 599 \r
 600         if( pxPort->ucIRQ > 7 )\r
 601         {\r
 602                 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );\r
 603                 portOUTPUT_BYTE( 0x20, 0x62);\r
 604         }\r
 605         else\r
 606         {\r
 607                 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );\r
 608         }\r
 609 \r
 610         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
 611 \r
 612         /* If posting any of the characters to a queue woke a task that was blocked on\r
 613         the queue we may want to return to the task just woken (depending on its \r
 614         priority relative to the task this ISR interrupted. */\r
 615         return xHigherPriorityTaskWoken;\r
 616 }\r
 617 /*-----------------------------------------------------------*/\r
 618 \r
 619 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime )\r
 620 {\r
 621         /* Get the next character from the buffer, note that this routine is only \r
 622         called having checked that the is (at least) one to get */\r
 623         if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )\r
 624         {\r
 625                 return pdTRUE;\r
 626         }\r
 627         else\r
 628         {\r
 629                 return pdFALSE;\r
 630         }\r
 631 }\r
 632 /*-----------------------------------------------------------*/\r
 633 \r
 634 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime )\r
 635 {\r
 636         if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
 637         {\r
 638                 return pdFAIL;\r
 639         }\r
 640 \r
 641         vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );\r
 642 \r
 643         return pdPASS;\r
 644 }\r
 645 /*-----------------------------------------------------------*/\r
 646 \r
 647 void vSerialPutString( xComPortHandle pxPort, const char * const pcString, unsigned short usStringLength )\r
 648 {\r
 649 char * pcNextChar;\r
 650 const portTickType xNoBlock = ( portTickType ) 0;\r
 651 \r
 652         /* Stop warnings. */\r
 653         ( void ) usStringLength;\r
 654 \r
 655         pcNextChar = ( char * ) pcString;\r
 656         while( *pcNextChar )\r
 657         {\r
 658                 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );\r
 659                 pcNextChar++;\r
 660         }\r
 661 }\r
 662 /*-----------------------------------------------------------*/\r
 663 \r
 664 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )\r
 665 {\r
 666 const portTickType xBlockTime = ( portTickType ) 0xffff;\r
 667 \r
 668         /* This function does nothing interesting, but test the \r
 669         semaphore from ISR mechanism. */\r
 670         return xSemaphoreTake( xPort->xTestSem, xBlockTime );   \r
 671 }\r
 672 /*-----------------------------------------------------------*/\r
 673 \r
 674 void vSerialClose( xComPortHandle xPort )\r
 675 {\r
 676         portENTER_CRITICAL();\r
 677 \r
 678         /* Turn off the interrupts. */\r
 679         portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );\r
 680         portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );\r
 681 \r
 682         /* Put back the original ISR. */\r
 683         _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );\r
 684 \r
 685         /* Remove the reference in the array of xComPort structures. */\r
 686         xPortStatus[ xPort->ucIRQ ] = NULL;\r
 687 \r
 688         /* Delete the queues. */\r
 689         vQueueDelete( xPort->xRxedChars );\r
 690         vQueueDelete( xPort->xCharsForTx );\r
 691 \r
 692         vPortFree( ( void * ) xPort );\r
 693 \r
 694         portEXIT_CRITICAL();\r
 695 }\r
 696 \r