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1 /*\r
2         This serial port driver is borrowed heavily from DZComm.  I have\r
3         simplified it by removing a lot of the functionality (hardware \r
4         flow control, etc.).  For more details and the full version see\r
5         http://dzcomm.sourceforge.net\r
6 */\r
7 \r
8 /*\r
9     FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.\r
10         \r
11 \r
12     ***************************************************************************\r
13      *                                                                       *\r
14      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
15      *    Complete, revised, and edited pdf reference manuals are also       *\r
16      *    available.                                                         *\r
17      *                                                                       *\r
18      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
19      *    ensuring you get running as quickly as possible and with an        *\r
20      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
21      *    the FreeRTOS project to continue with its mission of providing     *\r
22      *    professional grade, cross platform, de facto standard solutions    *\r
23      *    for microcontrollers - completely free of charge!                  *\r
24      *                                                                       *\r
25      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
26      *                                                                       *\r
27      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
28      *                                                                       *\r
29     ***************************************************************************\r
30 \r
31 \r
32     This file is part of the FreeRTOS distribution.\r
33 \r
34     FreeRTOS is free software; you can redistribute it and/or modify it under\r
35     the terms of the GNU General Public License (version 2) as published by the\r
36     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
37     >>>NOTE<<< The modification to the GPL is included to allow you to\r
38     distribute a combined work that includes FreeRTOS without being obliged to\r
39     provide the source code for proprietary components outside of the FreeRTOS\r
40     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
41     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
42     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
43     more details. You should have received a copy of the GNU General Public\r
44     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
45     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
46     by writing to Richard Barry, contact details for whom are available on the\r
47     FreeRTOS WEB site.\r
48 \r
49     1 tab == 4 spaces!\r
50     \r
51     ***************************************************************************\r
52      *                                                                       *\r
53      *    Having a problem?  Start by reading the FAQ "My application does   *\r
54      *    not run, what could be wrong?                                      *\r
55      *                                                                       *\r
56      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
57      *                                                                       *\r
58     ***************************************************************************\r
59 \r
60     \r
61     http://www.FreeRTOS.org - Documentation, training, latest information, \r
62     license and contact details.\r
63     \r
64     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
65     including FreeRTOS+Trace - an indispensable productivity tool.\r
66 \r
67     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
68     the code with commercial support, indemnification, and middleware, under \r
69     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
70     provide a safety engineered and independently SIL3 certified version under \r
71     the SafeRTOS brand: http://www.SafeRTOS.com.\r
72 */\r
73 \r
74 \r
75 \r
76 #include <stdlib.h>\r
77 #include <dos.h>\r
78 #include "FreeRTOS.h"\r
79 #include "queue.h"\r
80 #include "task.h"\r
81 #include "semphr.h"\r
82 #include "portasm.h"\r
83 \r
84 #define serMAX_IRQs                                             ( 16 )\r
85 #define serTRANSMIT_HOLD_EMPTY_INT              ( 0x02 )\r
86 #define serCOM1_STANDARD_IRQ                    ( ( unsigned char ) 4 )\r
87 #define serCOM2_STANDARD_IRQ                    ( ( unsigned char ) 3 )\r
88 \r
89 \r
90 #define serIMR_8259_0                                   ( ( unsigned char ) 0x21 )\r
91 #define serIMR_8259_1                                   ( ( unsigned char ) 0xa1 )\r
92 #define serISR_8259_0                                   ( ( unsigned char ) 0x20 )\r
93 #define serISR_8259_1                                   ( ( unsigned char ) 0xa0 )\r
94 #define serALL_COMS_INTERRUPTS                  ( ( unsigned char ) 0x0f )\r
95 #define serALL_MODEM_CTRL_INTERRUPTS    ( ( unsigned char ) 0x0f )\r
96 \r
97 #define serTRANSMIT_HOLD_OFFSET                                 ( 0 )\r
98 #define serRECEIVE_DATA_OFFSET                                  ( 0 )\r
99 #define serBAUD_RATE_DIVISOR_LOW_OFFSET                 ( 0 )\r
100 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET                ( 1 )\r
101 #define serINTERRUPT_ENABLE_OFFSET                              ( 1 )\r
102 #define serINTERRUPT_ID_OFFSET                                  ( 2 )\r
103 #define serFIFO_CTRL_OFFSET                                             ( 2 )\r
104 #define serLINE_CTRL_OFFSET                                             ( 3 )\r
105 #define serMODEM_CTRL_OFFSET                                    ( 4 )\r
106 #define serLINE_STATUS_OFFSET                                   ( 5 )\r
107 #define serMODEM_STATUS_OFFSET                                  ( 6 )\r
108 #define serSCR_OFFSET                                                   ( 7 )\r
109 \r
110 #define serMAX_BAUD                     ( ( unsigned long ) 115200UL )\r
111 \r
112 #define serNO_INTERRUPTS        ( 0x00 )\r
113 \r
114 #define vInterruptOn( pxPort, ucInterrupt )                                                                             \\r
115 {                                                                                                                                                               \\r
116         unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );    \\r
117         if( !( ucIn & ucInterrupt ) )                                                                                           \\r
118         {                                                                                                                                                       \\r
119                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt );    \\r
120         }                                                                                                                                                       \\r
121 }                                                                                                                                                               \r
122 /*-----------------------------------------------------------*/\r
123 \r
124 #define vInterruptOff( pxPort, ucInterrupt )                                                                    \\r
125 {                                                                                                                                                               \\r
126         unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );    \\r
127         if( ucIn & ucInterrupt )                                                                                                        \\r
128         {                                                                                                                                                       \\r
129                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt);    \\r
130         }                                                                                                                                                       \\r
131 }\r
132 /*-----------------------------------------------------------*/\r
133 \r
134 typedef enum\r
135\r
136         serCOM1, \r
137         serCOM2, \r
138         serCOM3, \r
139         serCOM4, \r
140         serCOM5, \r
141         serCOM6, \r
142         serCOM7, \r
143         serCOM8 \r
144 } eCOMPort;\r
145 \r
146 typedef enum \r
147\r
148         serNO_PARITY, \r
149         serODD_PARITY, \r
150         serEVEN_PARITY, \r
151         serMARK_PARITY, \r
152         serSPACE_PARITY \r
153 } eParity;\r
154 \r
155 typedef enum \r
156\r
157         serSTOP_1, \r
158         serSTOP_2 \r
159 } eStopBits;\r
160 \r
161 typedef enum \r
162\r
163         serBITS_5, \r
164         serBITS_6, \r
165         serBITS_7, \r
166         serBITS_8 \r
167 } eDataBits;\r
168 \r
169 typedef enum \r
170\r
171         ser50,          \r
172         ser75,          \r
173         ser110,         \r
174         ser134,         \r
175         ser150,    \r
176         ser200,\r
177         ser300,         \r
178         ser600,         \r
179         ser1200,        \r
180         ser1800,        \r
181         ser2400,   \r
182         ser4800,\r
183         ser9600,                \r
184         ser19200,       \r
185         ser38400,       \r
186         ser57600,       \r
187         ser115200\r
188 } eBaud;\r
189 \r
190 /* This *MUST* match the order in the eBaud definition. */\r
191 unsigned long ulBaudFromEnum[] = \r
192\r
193         ( unsigned long ) 50, \r
194         ( unsigned long ) 75, \r
195         ( unsigned long ) 110, \r
196         ( unsigned long ) 134, \r
197         ( unsigned long ) 150,  \r
198         ( unsigned long ) 200, \r
199         ( unsigned long ) 300, \r
200         ( unsigned long ) 600, \r
201         ( unsigned long ) 1200, \r
202         ( unsigned long ) 1800, \r
203         ( unsigned long ) 2400,   \r
204         ( unsigned long ) 4800,   \r
205         ( unsigned long ) 9600,  \r
206         ( unsigned long ) 19200,  \r
207         ( unsigned long ) 38400UL,\r
208         ( unsigned long ) 57600UL,\r
209         ( unsigned long ) 115200UL\r
210 };\r
211 \r
212 typedef struct xCOM_PORT\r
213\r
214         unsigned short sPort;   /* comm port address eg. 0x3f8    */\r
215         unsigned char ucIRQ;    /* comm IRQ eg. 3                 */\r
216 \r
217         /* Next two fields used for setting up the IRQ routine and\r
218         * (un)masking the interrupt in certain circumstances.\r
219         */\r
220         unsigned short usIRQVector;\r
221         unsigned char ucInterruptEnableMast;\r
222 \r
223         /* Read/Write buffers. */\r
224         xQueueHandle xRxedChars; \r
225         xQueueHandle xCharsForTx;\r
226 \r
227         /* This lot are set up to minimise CPU time where accessing the comm\r
228         * port's registers.\r
229         */\r
230         unsigned short usTransmitHoldReg; \r
231         unsigned short usReceiveDataRegister;\r
232         unsigned short usBaudRateDivisorLow; \r
233         unsigned short usBaudRateDivisorHigh;\r
234         unsigned short usInterruptEnableReg;\r
235         unsigned short usInterruptIDReg;\r
236         unsigned short usFIFOCtrlReg;\r
237         unsigned short usLineCtrlReg;\r
238         unsigned short usModemCtrlReg;\r
239         unsigned short usLineStatusReg;\r
240         unsigned short usModemStatusReg;\r
241         unsigned short usSCRReg;\r
242         unsigned short us8259InterruptServiceReg;\r
243         unsigned short us8259InterruptMaskReg;\r
244 \r
245         /* This semaphore does nothing useful except test a feature of the\r
246         scheduler. */\r
247         xSemaphoreHandle xTestSem;\r
248 \r
249 } xComPort;\r
250 \r
251 typedef xComPort *xComPortHandle;\r
252 \r
253 /* A xComPort structure can be associated with each IRQ.  Initially none\r
254 are create/installed. */\r
255 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };\r
256 \r
257 /*-----------------------------------------------------------*/\r
258 \r
259 /* These prototypes are repeated here so we don't have to include the serial header.  This allows\r
260 the xComPortHandle structure details to be private to this file. */\r
261 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );\r
262 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime );\r
263 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime );\r
264 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );\r
265 \r
266 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );\r
267 static short sComPortISR( const xComPort * const pxPort );\r
268 \r
269 /*-----------------------------------------------------------*/\r
270 \r
271 /* Define an interrupt handler for each slot in the xPortStatus array. */\r
272 \r
273 #define COM_IRQ_WRAPPER(N)                                                                              \\r
274         static void __interrupt COM_IRQ##N##_WRAPPER( void )            \\r
275         {                                                                                                                       \\r
276                 portDISABLE_INTERRUPTS();                                                               \\r
277                 if( sComPortISR( xPortStatus[##N##] ) )                                 \\r
278                 {                                                                                                               \\r
279                         portSWITCH_CONTEXT();                                                           \\r
280                 }                                                                                                               \\r
281         } \r
282 \r
283 COM_IRQ_WRAPPER( 0 )\r
284 COM_IRQ_WRAPPER( 1 )\r
285 COM_IRQ_WRAPPER( 2 )\r
286 COM_IRQ_WRAPPER( 3 )\r
287 COM_IRQ_WRAPPER( 4 )\r
288 COM_IRQ_WRAPPER( 5 )\r
289 COM_IRQ_WRAPPER( 6 )\r
290 COM_IRQ_WRAPPER( 7 )\r
291 COM_IRQ_WRAPPER( 8 )\r
292 COM_IRQ_WRAPPER( 9 )\r
293 COM_IRQ_WRAPPER( 10 )\r
294 COM_IRQ_WRAPPER( 11 )\r
295 COM_IRQ_WRAPPER( 12 )\r
296 COM_IRQ_WRAPPER( 13 )\r
297 COM_IRQ_WRAPPER( 14 )\r
298 COM_IRQ_WRAPPER( 15 )\r
299 \r
300 static pxISR xISRs[ serMAX_IRQs ] = \r
301 {\r
302         COM_IRQ0_WRAPPER, \r
303         COM_IRQ1_WRAPPER, \r
304         COM_IRQ2_WRAPPER, \r
305         COM_IRQ3_WRAPPER, \r
306         COM_IRQ4_WRAPPER, \r
307         COM_IRQ5_WRAPPER, \r
308         COM_IRQ6_WRAPPER, \r
309         COM_IRQ7_WRAPPER, \r
310         COM_IRQ8_WRAPPER, \r
311         COM_IRQ9_WRAPPER, \r
312         COM_IRQ10_WRAPPER, \r
313         COM_IRQ11_WRAPPER, \r
314         COM_IRQ12_WRAPPER, \r
315         COM_IRQ13_WRAPPER, \r
316         COM_IRQ14_WRAPPER,\r
317         COM_IRQ15_WRAPPER\r
318 };\r
319 \r
320 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };\r
321 \r
322 /*-----------------------------------------------------------*/\r
323 \r
324 \r
325 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )\r
326 {\r
327 xComPort *pxPort;\r
328 \r
329         /* Create a structure to handle this port. */\r
330         pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );\r
331         \r
332         if( pxPort != NULL )\r
333         {\r
334                 /* Create the queues used by the comtest task. */\r
335                 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );\r
336                 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );\r
337 \r
338                 /* Create the test semaphore.  This does nothing useful except test a feature of the scheduler. */\r
339                 vSemaphoreCreateBinary( pxPort->xTestSem );\r
340 \r
341                 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );\r
342 \r
343                 return pxPort;\r
344         }\r
345 \r
346         return NULL;\r
347 }\r
348 /*-----------------------------------------------------------*/\r
349 \r
350 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )\r
351 {\r
352 short sIn;\r
353 unsigned long ulDivisor;\r
354 unsigned char ucDivisorLow;\r
355 unsigned char ucDivisorHigh;\r
356 unsigned char ucCommParam;\r
357 \r
358         /* IRQ numbers - standard */\r
359         if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )\r
360         {\r
361                 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;\r
362                 pxPort->sPort = 0x3f8;\r
363         }\r
364         else\r
365         {\r
366                 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;\r
367                 pxPort->sPort = 0x2f8;\r
368         }\r
369 \r
370         /* Set up variables in port making it easy to see which sIn/o address is which */\r
371         pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;\r
372         pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;\r
373         pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;\r
374         pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;\r
375         pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;\r
376         pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;\r
377         pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;\r
378         pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;\r
379         pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;\r
380         pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;\r
381         pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;\r
382         pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;\r
383 \r
384         /* Set communication parameters. */\r
385         ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];\r
386         ucDivisorLow = ( unsigned char ) ulDivisor & ( unsigned char ) 0xff;\r
387         ucDivisorHigh = ( unsigned char ) ( ( ( unsigned short ) ulDivisor >> 8 ) & 0xff );\r
388         \r
389         switch( eWantedParity )\r
390         {       \r
391                 case serNO_PARITY:              ucCommParam = 0x00;\r
392                                                                 break;\r
393                 case serODD_PARITY:             ucCommParam = 0x08;\r
394                                                                 break;\r
395                 case serEVEN_PARITY:    ucCommParam = 0x18;\r
396                                                                 break;\r
397                 case serMARK_PARITY:    ucCommParam = 0x28;\r
398                                                                 break;\r
399                 case serSPACE_PARITY:   ucCommParam = 0x38;\r
400                                                                 break;\r
401                 default:                                ucCommParam = 0x00;\r
402                                                                 break;\r
403         }\r
404 \r
405         switch ( eWantedDataBits )\r
406         {\r
407                 case serBITS_5: ucCommParam |= 0x00;\r
408                                                 break;\r
409                 case serBITS_6: ucCommParam |= 0x01;\r
410                                                 break;\r
411                 case serBITS_7: ucCommParam |= 0x02;\r
412                                                 break;\r
413                 case serBITS_8: ucCommParam |= 0x03;\r
414                                                 break;\r
415                 default:                ucCommParam |= 0x03;\r
416                                                 break;\r
417         }\r
418 \r
419         if( eWantedStopBits == serSTOP_2 ) \r
420         {\r
421                 ucCommParam |= 0x04;\r
422         }\r
423 \r
424         /* Reset UART into known state - Thanks to Bradley Town */\r
425         portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 );                 /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */\r
426         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 );  /* Disable interrupts from UART */\r
427         portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 );                /* Enable some multi-port cards */\r
428 \r
429         /* Code based on stuff from SVAsync lib. Clear UART Status and data registers\r
430         setting up FIFO if possible */\r
431         sIn = portINPUT_BYTE( pxPort->usSCRReg );\r
432         portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );\r
433 \r
434         if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )\r
435         {\r
436                 /* The chip is better than an 8250 */\r
437                 portOUTPUT_BYTE( pxPort->usSCRReg, sIn );       /* Set usSCRReg back to what it was before */\r
438                 portINPUT_BYTE( pxPort->usSCRReg);                      /* Give slow motherboards a chance */\r
439 \r
440                 /* Try and start the FIFO. It appears that some chips need a two call \r
441                 protocol, but those that don't seem to work even if you do start it twice. \r
442                 The first call is simply to start it, the second starts it and sets an 8 \r
443                 byte FIFO trigger level. */\r
444                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );\r
445                 portINPUT_BYTE( pxPort->usFIFOCtrlReg );                        /* Give slow motherboards a chance to catch up */\r
446                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );\r
447 \r
448                 /* Check that the FIFO initialised */\r
449                 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )\r
450                 {\r
451                         /* It didn't so we assume it isn't there but disable it to be on the \r
452                         safe side. */\r
453                         portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );\r
454                 }\r
455         }\r
456 \r
457         /* End of (modified) SVAsync code.  \r
458         Set interrupt parameters calculating mask for 8259 controller's \r
459         IMR and number of interrupt handler for given irq level  */\r
460         if (pxPort->ucIRQ <= 7)\r
461         {       \r
462                 /* if 0<=irq<=7 first IMR address used */\r
463                 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);\r
464                 pxPort->usIRQVector = pxPort->ucIRQ + 8;\r
465                 pxPort->us8259InterruptMaskReg = serIMR_8259_0;\r
466                 pxPort->us8259InterruptServiceReg = serISR_8259_0;\r
467         }\r
468         else\r
469         {\r
470                 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );\r
471                 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;\r
472                 pxPort->us8259InterruptMaskReg = serIMR_8259_1;\r
473                 pxPort->us8259InterruptServiceReg = serISR_8259_1;\r
474         }\r
475 \r
476         /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers \r
477         to set baud rate */\r
478         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );\r
479         portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );\r
480         portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );\r
481 \r
482         /* reset usLineCtrlReg and Port Toggleout */\r
483         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );\r
484 \r
485         portENTER_CRITICAL();\r
486 \r
487         if( xPortStatus[ pxPort->ucIRQ ] == NULL )\r
488         {       \r
489                 xPortStatus[ pxPort->ucIRQ ] = pxPort;\r
490         }\r
491         \r
492         xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );\r
493         _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );\r
494 \r
495         /* enable interrupt pxPort->ucIRQ level */\r
496         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
497 \r
498         /* And allow interrupts again now the hairy bit's done */\r
499         portEXIT_CRITICAL();            \r
500 \r
501         /* This version does not allow flow control. */\r
502         portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );\r
503 \r
504         /* enable all communication's interrupts */\r
505         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );\r
506 }\r
507 /*-----------------------------------------------------------*/\r
508 \r
509 static short sComPortISR( const xComPort * const pxPort )\r
510 {\r
511 short sInterruptID;\r
512 char cIn, cOut;\r
513 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
514 extern void vComTestUnsuspendTask( void );\r
515 \r
516         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );\r
517 \r
518         /* Decide which UART has issued the interrupt */\r
519         sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );\r
520 \r
521         /* service whatever requests the calling UART may have. The top 4 bits are\r
522         either unused or indicate the presence of a functioning FIFO, which we don't\r
523         need to know. So trim them off to simplify the switch statement below. */\r
524         sInterruptID &= 0x0f;\r
525         do\r
526         {\r
527                 switch( sInterruptID )\r
528                 {\r
529                         case 0x0c:      /* Timeout\r
530                                                 Called when FIFO not up to trigger level but no activity for \r
531                                                 a while. Handled exactly as RDAINT, see below for \r
532                                                 description. */\r
533                                                 do\r
534                                                 {\r
535                                                         cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                         \r
536                                                         xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );\r
537 \r
538                                                         /* Also release the semaphore - this does nothing interesting and is just a test.\r
539                                                         We first attempt to unsuspend the task to check the scheduler correctely detects\r
540                                                         this as an invalid call, then give the semaphore for real. */\r
541                                                         vComTestUnsuspendTask();\r
542                                                         xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );\r
543 \r
544                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
545                                                 break;\r
546 \r
547                         case 0x06:      /* LSINT */\r
548                                                 portINPUT_BYTE( pxPort->usLineStatusReg );\r
549                                                 break;\r
550 \r
551                         case 0x04:      /* RDAINT */\r
552                                                 /* The usInterruptIDReg flag tested above stops when the \r
553                                                 FIFO is below the trigger level rather than empty, whereas \r
554                                                 this flag allows one to empty it: (do loop because there \r
555                                                 must be at least one to read by virtue of having got here.) */\r
556                                                 do\r
557                                                 {\r
558                                                         cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                         \r
559                                                         xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );\r
560 \r
561                                                         /* Also release the semaphore - this does nothing interesting and is just a test.\r
562                                                         We first attempt to unsuspend the task to check the scheduler correctely detects\r
563                                                         this as an invalid call, then give the semaphore for real. */\r
564                                                         vComTestUnsuspendTask();\r
565                                                         xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );\r
566 \r
567                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
568                                                 break;\r
569 \r
570                         case 0x02:      /* serTRANSMIT_HOLD_EMPTY_INT */\r
571                                                 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xHigherPriorityTaskWoken ) != pdTRUE )                                           \r
572                                                 {                                                                                                                                                                               \r
573                                                         /* Queue empty, nothing to send */                                                                                                      \r
574                                                         vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);                                                                     \r
575                                                 }                                                                                                                                                                               \r
576                                                 else                                                                                                                                                                    \r
577                                                 {                                                                                                                                                                               \r
578                                                         portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( short ) cOut );                                   \r
579                                                 }\r
580                                                 break;\r
581 \r
582                         case 0x00:      /* MSINT */\r
583                                                 portINPUT_BYTE( pxPort->usModemStatusReg );\r
584                                                 break;\r
585                 }               \r
586 \r
587                 /* Get the next instruction, trimming as above */\r
588                 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;\r
589 \r
590         } while( !( sInterruptID & 0x01 ) );\r
591 \r
592         if( pxPort->ucIRQ > 7 )\r
593         {\r
594                 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );\r
595                 portOUTPUT_BYTE( 0x20, 0x62);\r
596         }\r
597         else\r
598         {\r
599                 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );\r
600         }\r
601 \r
602         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
603 \r
604         /* If posting any of the characters to a queue woke a task that was blocked on\r
605         the queue we may want to return to the task just woken (depending on its \r
606         priority relative to the task this ISR interrupted. */\r
607         return xHigherPriorityTaskWoken;\r
608 }\r
609 /*-----------------------------------------------------------*/\r
610 \r
611 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime )\r
612 {\r
613         /* Get the next character from the buffer, note that this routine is only \r
614         called having checked that the is (at least) one to get */\r
615         if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )\r
616         {\r
617                 return pdTRUE;\r
618         }\r
619         else\r
620         {\r
621                 return pdFALSE;\r
622         }\r
623 }\r
624 /*-----------------------------------------------------------*/\r
625 \r
626 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime )\r
627 {\r
628         if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
629         {\r
630                 return pdFAIL;\r
631         }\r
632 \r
633         vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );\r
634 \r
635         return pdPASS;\r
636 }\r
637 /*-----------------------------------------------------------*/\r
638 \r
639 void vSerialPutString( xComPortHandle pxPort, const char * const pcString, unsigned short usStringLength )\r
640 {\r
641 char * pcNextChar;\r
642 const portTickType xNoBlock = ( portTickType ) 0;\r
643 \r
644         /* Stop warnings. */\r
645         ( void ) usStringLength;\r
646 \r
647         pcNextChar = ( char * ) pcString;\r
648         while( *pcNextChar )\r
649         {\r
650                 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );\r
651                 pcNextChar++;\r
652         }\r
653 }\r
654 /*-----------------------------------------------------------*/\r
655 \r
656 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )\r
657 {\r
658 const portTickType xBlockTime = ( portTickType ) 0xffff;\r
659 \r
660         /* This function does nothing interesting, but test the \r
661         semaphore from ISR mechanism. */\r
662         return xSemaphoreTake( xPort->xTestSem, xBlockTime );   \r
663 }\r
664 /*-----------------------------------------------------------*/\r
665 \r
666 void vSerialClose( xComPortHandle xPort )\r
667 {\r
668         portENTER_CRITICAL();\r
669 \r
670         /* Turn off the interrupts. */\r
671         portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );\r
672         portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );\r
673 \r
674         /* Put back the original ISR. */\r
675         _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );\r
676 \r
677         /* Remove the reference in the array of xComPort structures. */\r
678         xPortStatus[ xPort->ucIRQ ] = NULL;\r
679 \r
680         /* Delete the queues. */\r
681         vQueueDelete( xPort->xRxedChars );\r
682         vQueueDelete( xPort->xCharsForTx );\r
683 \r
684         vPortFree( ( void * ) xPort );\r
685 \r
686         portEXIT_CRITICAL();\r
687 }\r
688 \r