2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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78 + Clear overrun errors in the Rx ISR. Overrun errors prevent any further
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79 characters being received.
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83 + Use portTickType in place of unsigned pdLONG for delay periods.
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84 + cQueueReieveFromISR() used in place of xQueueReceive() in ISR.
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87 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER. */
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89 /* Scheduler header files. */
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90 #include "FreeRTOS.h"
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96 * Prototypes for ISR's. The PIC architecture means that these functions
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97 * have to be called from port.c. The prototypes are not however included
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98 * in the header as the header is common to all ports.
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100 void vSerialTxISR( void );
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101 void vSerialRxISR( void );
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103 /* Hardware pin definitions. */
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104 #define serTX_PIN TRISCbits.TRISC6
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105 #define serRX_PIN TRISCbits.TRISC7
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107 /* Bit/register definitions. */
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108 #define serINPUT ( 1 )
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109 #define serOUTPUT ( 0 )
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110 #define serTX_ENABLE ( ( unsigned short ) 1 )
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111 #define serRX_ENABLE ( ( unsigned short ) 1 )
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112 #define serHIGH_SPEED ( ( unsigned short ) 1 )
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113 #define serCONTINUOUS_RX ( ( unsigned short ) 1 )
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114 #define serCLEAR_OVERRUN ( ( unsigned short ) 0 )
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115 #define serINTERRUPT_ENABLED ( ( unsigned short ) 1 )
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116 #define serINTERRUPT_DISABLED ( ( unsigned short ) 0 )
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118 /* All ISR's use the PIC18 low priority interrupt. */
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119 #define serLOW_PRIORITY ( 0 )
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121 /*-----------------------------------------------------------*/
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123 /* Queues to interface between comms API and interrupt routines. */
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124 static xQueueHandle xRxedChars;
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125 static xQueueHandle xCharsForTx;
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127 /*-----------------------------------------------------------*/
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129 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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131 unsigned long ulBaud;
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133 /* Calculate the baud rate generator constant.
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134 SPBRG = ( (FOSC / Desired Baud Rate) / 16 ) - 1 */
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135 ulBaud = configCPU_CLOCK_HZ / ulWantedBaud;
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136 ulBaud /= ( unsigned long ) 16;
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137 ulBaud -= ( unsigned long ) 1;
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139 /* Create the queues used by the ISR's to interface to tasks. */
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140 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
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141 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
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143 portENTER_CRITICAL();
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145 /* Start with config registers cleared, so we can just set the wanted
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147 TXSTA = ( unsigned short ) 0;
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148 RCSTA = ( unsigned short ) 0;
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150 /* Set the baud rate generator using the above calculated constant. */
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151 SPBRG = ( unsigned char ) ulBaud;
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153 /* Setup the IO pins to enable the USART IO. */
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154 serTX_PIN = serOUTPUT;
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155 serRX_PIN = serINPUT;
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157 /* Set the serial interrupts to use the same priority as the tick. */
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158 IPR1bits.TXIP = serLOW_PRIORITY;
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159 IPR1bits.RCIP = serLOW_PRIORITY;
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161 /* Setup Tx configuration. */
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162 TXSTAbits.BRGH = serHIGH_SPEED;
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163 TXSTAbits.TXEN = serTX_ENABLE;
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165 /* Setup Rx configuration. */
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166 RCSTAbits.SPEN = serRX_ENABLE;
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167 RCSTAbits.CREN = serCONTINUOUS_RX;
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169 /* Enable the Rx interrupt now, the Tx interrupt will get enabled when
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170 we have data to send. */
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171 PIE1bits.RCIE = serINTERRUPT_ENABLED;
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173 portEXIT_CRITICAL();
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175 /* Unlike other ports, this serial code does not allow for more than one
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176 com port. We therefore don't return a pointer to a port structure and
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177 can instead just return NULL. */
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180 /*-----------------------------------------------------------*/
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182 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
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184 /* This is not implemented in this port.
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185 Use xSerialPortInitMinimal() instead. */
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187 /*-----------------------------------------------------------*/
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189 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
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191 /* Get the next character from the buffer. Return false if no characters
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192 are available, or arrive before xBlockTime expires. */
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193 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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202 /*-----------------------------------------------------------*/
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204 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
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206 /* Return false if after the block time there is no room on the Tx queue. */
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207 if( xQueueSend( xCharsForTx, ( const void * ) &cOutChar, xBlockTime ) != pdPASS )
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212 /* Turn interrupt on - ensure the compiler only generates a single
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213 instruction for this. */
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214 PIE1bits.TXIE = serINTERRUPT_ENABLED;
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218 /*-----------------------------------------------------------*/
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220 void vSerialClose( xComPortHandle xPort )
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222 /* Not implemented for this port.
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223 To implement, turn off the interrupts and delete the memory
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224 allocated to the queues. */
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226 /*-----------------------------------------------------------*/
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228 #pragma interruptlow vSerialRxISR save=PRODH, PRODL, TABLAT, section(".tmpdata")
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229 void vSerialRxISR( void )
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232 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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234 /* Get the character and post it on the queue of Rxed characters.
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235 If the post causes a task to wake force a context switch as the woken task
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236 may have a higher priority than the task we have interrupted. */
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239 /* Clear any overrun errors. */
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240 if( RCSTAbits.OERR )
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242 RCSTAbits.CREN = serCLEAR_OVERRUN;
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243 RCSTAbits.CREN = serCONTINUOUS_RX;
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246 xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, &xHigherPriorityTaskWoken );
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248 if( xHigherPriorityTaskWoken )
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253 /*-----------------------------------------------------------*/
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255 #pragma interruptlow vSerialTxISR save=PRODH, PRODL, TABLAT, section(".tmpdata")
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256 void vSerialTxISR( void )
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258 char cChar, cTaskWoken = pdFALSE;
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260 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &cTaskWoken ) == pdTRUE )
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262 /* Send the next character queued for Tx. */
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267 /* Queue empty, nothing to send. */
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268 PIE1bits.TXIE = serINTERRUPT_DISABLED;
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