2 <EDKSYSTEM EDKVERSION="11.2" EDWVERSION="1.1" TIMESTAMP="Tue Jun 30 20:53:27 2009">
4 <SYSTEMINFO ARCH="virtex5" DEVICE="5vfx70t" PACKAGE="ff1136" PART="5vfx70tff1136-1" SOURCE="C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/" SPEEDGRADE="-1"/>
7 <PORT DIR="I" MHS_INDEX="0" NAME="fpga_0_RS232_Uart_1_RX_pin" SIGNAME="fpga_0_RS232_Uart_1_RX_pin"/>
8 <PORT DIR="O" MHS_INDEX="1" NAME="fpga_0_RS232_Uart_1_TX_pin" SIGNAME="fpga_0_RS232_Uart_1_TX_pin"/>
9 <PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="2" MSB="7" NAME="fpga_0_LEDs_8Bit_GPIO_IO_pin" SIGNAME="fpga_0_LEDs_8Bit_GPIO_IO_pin"/>
10 <PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="3" MSB="4" NAME="fpga_0_LEDs_Positions_GPIO_IO_pin" SIGNAME="fpga_0_LEDs_Positions_GPIO_IO_pin"/>
11 <PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="4" MSB="4" NAME="fpga_0_Push_Buttons_5Bit_GPIO_IO_pin" SIGNAME="fpga_0_Push_Buttons_5Bit_GPIO_IO_pin"/>
12 <PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="5" MSB="7" NAME="fpga_0_DIP_Switches_8Bit_GPIO_IO_pin" SIGNAME="fpga_0_DIP_Switches_8Bit_GPIO_IO_pin"/>
13 <PORT DIR="IO" MHS_INDEX="6" NAME="fpga_0_IIC_EEPROM_Sda_pin" SIGNAME="fpga_0_IIC_EEPROM_Sda_pin"/>
14 <PORT DIR="IO" MHS_INDEX="7" NAME="fpga_0_IIC_EEPROM_Scl_pin" SIGNAME="fpga_0_IIC_EEPROM_Scl_pin"/>
15 <PORT DIR="O" ENDIAN="LITTLE" LSB="7" MHS_INDEX="8" MSB="30" NAME="fpga_0_SRAM_Mem_A_pin" SIGNAME="fpga_0_SRAM_Mem_A_pin_vslice_7_30_concat"/>
16 <PORT DIR="O" MHS_INDEX="9" NAME="fpga_0_SRAM_Mem_CEN_pin" SIGNAME="fpga_0_SRAM_Mem_CEN_pin"/>
17 <PORT DIR="O" MHS_INDEX="10" NAME="fpga_0_SRAM_Mem_OEN_pin" SIGNAME="fpga_0_SRAM_Mem_OEN_pin"/>
18 <PORT DIR="O" MHS_INDEX="11" NAME="fpga_0_SRAM_Mem_WEN_pin" SIGNAME="fpga_0_SRAM_Mem_WEN_pin"/>
19 <PORT DIR="O" ENDIAN="LITTLE" LSB="0" MHS_INDEX="12" MSB="3" NAME="fpga_0_SRAM_Mem_BEN_pin" SIGNAME="fpga_0_SRAM_Mem_BEN_pin"/>
20 <PORT DIR="O" MHS_INDEX="13" NAME="fpga_0_SRAM_Mem_ADV_LDN_pin" SIGNAME="fpga_0_SRAM_Mem_ADV_LDN_pin"/>
21 <PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="14" MSB="31" NAME="fpga_0_SRAM_Mem_DQ_pin" SIGNAME="fpga_0_SRAM_Mem_DQ_pin"/>
22 <PORT DIR="O" MHS_INDEX="15" NAME="fpga_0_SRAM_ZBT_CLK_OUT_pin" SIGIS="CLK" SIGNAME="SRAM_CLK_OUT_s"/>
23 <PORT CLKFREQUENCY="125000000" DIR="I" MHS_INDEX="16" NAME="fpga_0_SRAM_ZBT_CLK_FB_pin" SIGIS="CLK" SIGNAME="SRAM_CLK_FB_s"/>
24 <PORT DIR="I" MHS_INDEX="17" NAME="fpga_0_PCIe_Bridge_RXN_pin" SIGNAME="fpga_0_PCIe_Bridge_RXN_pin"/>
25 <PORT DIR="I" MHS_INDEX="18" NAME="fpga_0_PCIe_Bridge_RXP_pin" SIGNAME="fpga_0_PCIe_Bridge_RXP_pin"/>
26 <PORT DIR="O" MHS_INDEX="19" NAME="fpga_0_PCIe_Bridge_TXN_pin" SIGNAME="fpga_0_PCIe_Bridge_TXN_pin"/>
27 <PORT DIR="O" MHS_INDEX="20" NAME="fpga_0_PCIe_Bridge_TXP_pin" SIGNAME="fpga_0_PCIe_Bridge_TXP_pin"/>
28 <PORT DIR="I" MHS_INDEX="21" NAME="fpga_0_Ethernet_MAC_PHY_tx_clk_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_clk_pin"/>
29 <PORT DIR="I" MHS_INDEX="22" NAME="fpga_0_Ethernet_MAC_PHY_rx_clk_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_clk_pin"/>
30 <PORT DIR="I" MHS_INDEX="23" NAME="fpga_0_Ethernet_MAC_PHY_crs_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_crs_pin"/>
31 <PORT DIR="I" MHS_INDEX="24" NAME="fpga_0_Ethernet_MAC_PHY_dv_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_dv_pin"/>
32 <PORT DIR="I" ENDIAN="LITTLE" LSB="3" MHS_INDEX="25" MSB="0" NAME="fpga_0_Ethernet_MAC_PHY_rx_data_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_data_pin"/>
33 <PORT DIR="I" MHS_INDEX="26" NAME="fpga_0_Ethernet_MAC_PHY_col_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_col_pin"/>
34 <PORT DIR="I" MHS_INDEX="27" NAME="fpga_0_Ethernet_MAC_PHY_rx_er_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_er_pin"/>
35 <PORT DIR="O" MHS_INDEX="28" NAME="fpga_0_Ethernet_MAC_PHY_rst_n_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rst_n_pin"/>
36 <PORT DIR="O" MHS_INDEX="29" NAME="fpga_0_Ethernet_MAC_PHY_tx_en_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_en_pin"/>
37 <PORT DIR="O" ENDIAN="LITTLE" LSB="3" MHS_INDEX="30" MSB="0" NAME="fpga_0_Ethernet_MAC_PHY_tx_data_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_data_pin"/>
38 <PORT DIR="I" MHS_INDEX="31" NAME="fpga_0_Ethernet_MAC_MDINT_pin" SENSITIVITY="LEVEL_LOW" SIGIS="INTERRUPT" SIGNAME="fpga_0_Ethernet_MAC_MDINT_pin"/>
39 <PORT DIR="IO" ENDIAN="BIG" LSB="63" MHS_INDEX="32" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQ_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQ_pin"/>
40 <PORT DIR="IO" ENDIAN="LITTLE" LSB="7" MHS_INDEX="33" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQS_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_pin"/>
41 <PORT DIR="IO" ENDIAN="BIG" LSB="7" MHS_INDEX="34" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_N_pin"/>
42 <PORT DIR="O" ENDIAN="LITTLE" LSB="12" MHS_INDEX="35" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_A_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_A_pin"/>
43 <PORT DIR="O" ENDIAN="BIG" LSB="1" MHS_INDEX="36" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_BA_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_BA_pin"/>
44 <PORT DIR="O" MHS_INDEX="37" NAME="fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin"/>
45 <PORT DIR="O" MHS_INDEX="38" NAME="fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin"/>
46 <PORT DIR="O" MHS_INDEX="39" NAME="fpga_0_DDR2_SDRAM_DDR2_WE_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_WE_N_pin"/>
47 <PORT DIR="O" MHS_INDEX="40" NAME="fpga_0_DDR2_SDRAM_DDR2_CS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CS_N_pin"/>
48 <PORT DIR="O" ENDIAN="LITTLE" LSB="1" MHS_INDEX="41" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_ODT_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_ODT_pin"/>
49 <PORT DIR="O" MHS_INDEX="42" NAME="fpga_0_DDR2_SDRAM_DDR2_CKE_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CKE_pin"/>
50 <PORT DIR="O" ENDIAN="BIG" LSB="7" MHS_INDEX="43" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DM_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DM_pin"/>
51 <PORT DIR="O" ENDIAN="LITTLE" LSB="1" MHS_INDEX="44" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_CK_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_pin"/>
52 <PORT DIR="O" ENDIAN="BIG" LSB="1" MHS_INDEX="45" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_CK_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_N_pin"/>
53 <PORT DIR="O" ENDIAN="LITTLE" LSB="6" MHS_INDEX="46" MSB="0" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPA_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPA_pin"/>
54 <PORT DIR="I" MHS_INDEX="47" NAME="fpga_0_SysACE_CompactFlash_SysACE_CLK_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CLK_pin"/>
55 <PORT DIR="I" MHS_INDEX="48" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin"/>
56 <PORT DIR="O" MHS_INDEX="49" NAME="fpga_0_SysACE_CompactFlash_SysACE_CEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CEN_pin"/>
57 <PORT DIR="O" MHS_INDEX="50" NAME="fpga_0_SysACE_CompactFlash_SysACE_OEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_OEN_pin"/>
58 <PORT DIR="O" MHS_INDEX="51" NAME="fpga_0_SysACE_CompactFlash_SysACE_WEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_WEN_pin"/>
59 <PORT DIR="IO" ENDIAN="BIG" LSB="15" MHS_INDEX="52" MSB="0" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPD_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPD_pin"/>
60 <PORT CLKFREQUENCY="100000000" DIR="I" MHS_INDEX="53" NAME="fpga_0_clk_1_sys_clk_pin" SIGIS="CLK" SIGNAME="dcm_clk_s"/>
61 <PORT DIR="I" MHS_INDEX="54" NAME="fpga_0_rst_1_sys_rst_pin" RSTPOLARITY="0" SIGIS="RST" SIGNAME="sys_rst_s"/>
62 <PORT DIR="I" MHS_INDEX="55" NAME="fpga_0_PCIe_Diff_Clk_IBUF_DS_P_pin" SIGIS="CLK" SIGNAME="PCIe_Diff_Clk"/>
63 <PORT DIR="I" MHS_INDEX="56" NAME="fpga_0_PCIe_Diff_Clk_IBUF_DS_N_pin" SIGIS="CLK" SIGNAME="PCIe_Diff_Clk"/>
67 <MODULE HWVERSION="1.01.a" INSTANCE="ppc440_0" IPTYPE="PROCESSOR" MHS_INDEX="0" MODCLASS="PROCESSOR" MODTYPE="ppc440_virtex5" PROCTYPE="PPC440">
68 <DESCRIPTION TYPE="SHORT">PowerPC 440 Virtex-5</DESCRIPTION>
69 <DESCRIPTION TYPE="LONG">A wrapper to instantiate the PowerPC 440 Processor Block primitive</DESCRIPTION>
71 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/ppc440_virtex5_v1_01_a/doc/ppc440_virtex5.pdf" TYPE="IP"/>
73 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
74 <PARAMETER MPD_INDEX="0" NAME="C_PIR" TYPE="std_logic_vector(28 to 31)" VALUE="0b1111">
75 <DESCRIPTION>Unique Processor ID</DESCRIPTION>
77 <PARAMETER MPD_INDEX="1" NAME="C_ENDIAN_RESET" TYPE="std_logic" VALUE="0">
78 <DESCRIPTION>Reset Value for Endian Storage Byte Ordering</DESCRIPTION>
80 <PARAMETER MPD_INDEX="2" NAME="C_USER_RESET" TYPE="std_logic_vector(0 to 3)" VALUE="0b0000">
81 <DESCRIPTION>Reset Value for User Defined Storage Attributes: Tattribute[4:7]</DESCRIPTION>
83 <PARAMETER MPD_INDEX="3" NAME="C_INTERCONNECT_IMASK" TYPE="BIT_VECTOR(0 to 31)" VALUE="0xffffffff">
84 <DESCRIPTION>Interrupt Mask for Crossbar-related Interrupts</DESCRIPTION>
86 <PARAMETER MPD_INDEX="4" NAME="C_ICU_RD_FETCH_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
87 <DESCRIPTION>Arbitration Priority for all CPU Fetch Requests</DESCRIPTION>
89 <PARAMETER MPD_INDEX="5" NAME="C_ICU_RD_SPEC_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
90 <DESCRIPTION>Arbitration Priority for all Speculative CPU Fetch Requests</DESCRIPTION>
92 <PARAMETER MPD_INDEX="6" NAME="C_ICU_RD_TOUCH_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
93 <DESCRIPTION>Arbitration Priority for all CPU Fetch Requests Initiated by ICBT Instructions</DESCRIPTION>
95 <PARAMETER MPD_INDEX="7" NAME="C_DCU_RD_LD_CACHE_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
96 <DESCRIPTION>Arbitration Priority for all CPU Cacheable Load Requests</DESCRIPTION>
98 <PARAMETER MPD_INDEX="8" NAME="C_DCU_RD_NONCACHE_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
99 <DESCRIPTION>Arbitration Priority for CPU Non-cacheable Load Requests</DESCRIPTION>
101 <PARAMETER MPD_INDEX="9" NAME="C_DCU_RD_TOUCH_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
102 <DESCRIPTION>Arbitration Priority for all CPU Load Requests Initiated by DCBT Instructions</DESCRIPTION>
104 <PARAMETER MPD_INDEX="10" NAME="C_DCU_RD_URGENT_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
105 <DESCRIPTION>Arbitration Priority for an Urgent CPU Load Request</DESCRIPTION>
107 <PARAMETER MPD_INDEX="11" NAME="C_DCU_WR_FLUSH_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
108 <DESCRIPTION>Arbitration Priority for CPU Write Requests Initiated by flush Instruction</DESCRIPTION>
110 <PARAMETER MPD_INDEX="12" NAME="C_DCU_WR_STORE_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
111 <DESCRIPTION>Arbitration Priority for CPU Write Requests Initiated by store Instructions</DESCRIPTION>
113 <PARAMETER MPD_INDEX="13" NAME="C_DCU_WR_URGENT_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
114 <DESCRIPTION>Arbitration Priority for an Urgent CPU Write Request</DESCRIPTION>
116 <PARAMETER MPD_INDEX="14" NAME="C_DMA0_PLB_PRIO" TYPE="bit_vector(0 to 1)" VALUE="0b00">
117 <DESCRIPTION></DESCRIPTION>
119 <PARAMETER MPD_INDEX="15" NAME="C_DMA1_PLB_PRIO" TYPE="bit_vector(0 to 1)" VALUE="0b00">
120 <DESCRIPTION></DESCRIPTION>
122 <PARAMETER MPD_INDEX="16" NAME="C_DMA2_PLB_PRIO" TYPE="bit_vector(0 to 1)" VALUE="0b00">
123 <DESCRIPTION></DESCRIPTION>
125 <PARAMETER MPD_INDEX="17" NAME="C_DMA3_PLB_PRIO" TYPE="bit_vector(0 to 1)" VALUE="0b00">
126 <DESCRIPTION></DESCRIPTION>
128 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="18" NAME="C_IDCR_BASEADDR" TYPE="std_logic_vector(0 to 9)" VALUE="0b0000000000">
129 <DESCRIPTION>Internal DCR Register Base Address</DESCRIPTION>
131 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="19" NAME="C_IDCR_HIGHADDR" TYPE="std_logic_vector(0 to 9)" VALUE="0b0011111111">
132 <DESCRIPTION>Internal DCR Register High Address</DESCRIPTION>
134 <PARAMETER MPD_INDEX="20" NAME="C_APU_CONTROL" TYPE="BIT_VECTOR(0 to 16)" VALUE="0b00010000000000000">
135 <DESCRIPTION>APU Controller Configuration Register Value</DESCRIPTION>
137 <PARAMETER MPD_INDEX="21" NAME="C_APU_UDI_0" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
138 <DESCRIPTION>UDI Configuration Register 0 Value</DESCRIPTION>
140 <PARAMETER MPD_INDEX="22" NAME="C_APU_UDI_1" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
141 <DESCRIPTION>UDI Configuration Register 1 Value</DESCRIPTION>
143 <PARAMETER MPD_INDEX="23" NAME="C_APU_UDI_2" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
144 <DESCRIPTION>UDI Configuration Register 2 Value</DESCRIPTION>
146 <PARAMETER MPD_INDEX="24" NAME="C_APU_UDI_3" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
147 <DESCRIPTION>UDI Configuration Register 3 Value</DESCRIPTION>
149 <PARAMETER MPD_INDEX="25" NAME="C_APU_UDI_4" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
150 <DESCRIPTION>UDI Configuration Register 4 Value</DESCRIPTION>
152 <PARAMETER MPD_INDEX="26" NAME="C_APU_UDI_5" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
153 <DESCRIPTION>UDI Configuration Register 5 Value</DESCRIPTION>
155 <PARAMETER MPD_INDEX="27" NAME="C_APU_UDI_6" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
156 <DESCRIPTION>UDI Configuration Register 6 Value</DESCRIPTION>
158 <PARAMETER MPD_INDEX="28" NAME="C_APU_UDI_7" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
159 <DESCRIPTION>UDI Configuration Register 7 Value</DESCRIPTION>
161 <PARAMETER MPD_INDEX="29" NAME="C_APU_UDI_8" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
162 <DESCRIPTION>UDI Configuration Register 8 Value</DESCRIPTION>
164 <PARAMETER MPD_INDEX="30" NAME="C_APU_UDI_9" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
165 <DESCRIPTION>UDI Configuration Register 9 Value</DESCRIPTION>
167 <PARAMETER MPD_INDEX="31" NAME="C_APU_UDI_10" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
168 <DESCRIPTION>UDI Configuration Register 10 Value</DESCRIPTION>
170 <PARAMETER MPD_INDEX="32" NAME="C_APU_UDI_11" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
171 <DESCRIPTION>UDI Configuration Register 11 Value</DESCRIPTION>
173 <PARAMETER MPD_INDEX="33" NAME="C_APU_UDI_12" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
174 <DESCRIPTION>UDI Configuration Register 12 Value</DESCRIPTION>
176 <PARAMETER MPD_INDEX="34" NAME="C_APU_UDI_13" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
177 <DESCRIPTION>UDI Configuration Register 13 Value</DESCRIPTION>
179 <PARAMETER MPD_INDEX="35" NAME="C_APU_UDI_14" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
180 <DESCRIPTION>UDI Configuration Register 14 Value</DESCRIPTION>
182 <PARAMETER MPD_INDEX="36" NAME="C_APU_UDI_15" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
183 <DESCRIPTION>UDI Configuration Register 15 Value</DESCRIPTION>
185 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="37" NAME="C_PPC440MC_ADDR_BASE" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
186 <DESCRIPTION>Base Address of Memory</DESCRIPTION>
188 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="38" NAME="C_PPC440MC_ADDR_HIGH" TYPE="std_logic_vector(0 to 31)" VALUE="0x0fffffff">
189 <DESCRIPTION>High Address of Memory </DESCRIPTION>
191 <PARAMETER CHANGEDBY="USER" MPD_INDEX="39" NAME="C_PPC440MC_ROW_CONFLICT_MASK" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x003FFE00">
192 <DESCRIPTION>Mask Used to Determine a Row Conflict</DESCRIPTION>
194 <PARAMETER CHANGEDBY="USER" MPD_INDEX="40" NAME="C_PPC440MC_BANK_CONFLICT_MASK" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x00C00000">
195 <DESCRIPTION>Mask Used to Determine a Bank Conflict</DESCRIPTION>
197 <PARAMETER CHANGEDBY="USER" MPD_INDEX="41" NAME="C_PPC440MC_CONTROL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0xF810008F">
198 <DESCRIPTION>Control and Configuration for the MC Interface</DESCRIPTION>
200 <PARAMETER MPD_INDEX="42" NAME="C_PPC440MC_PRIO_ICU" TYPE="integer" VALUE="4">
201 <DESCRIPTION>Secondary Arbitration Priority for all Instruction Fetches from CPU</DESCRIPTION>
203 <PARAMETER MPD_INDEX="43" NAME="C_PPC440MC_PRIO_DCUW" TYPE="integer" VALUE="3">
204 <DESCRIPTION>Secondary Arbitration Priority for all Data Writes from CPU</DESCRIPTION>
206 <PARAMETER MPD_INDEX="44" NAME="C_PPC440MC_PRIO_DCUR" TYPE="integer" VALUE="2">
207 <DESCRIPTION>Secondary Arbitration Priority for all Data Reads from CPU</DESCRIPTION>
209 <PARAMETER MPD_INDEX="45" NAME="C_PPC440MC_PRIO_SPLB1" TYPE="integer" VALUE="0">
210 <DESCRIPTION>Secondary Arbitration Priority for SPLB1, DMA2 and DMA3</DESCRIPTION>
212 <PARAMETER MPD_INDEX="46" NAME="C_PPC440MC_PRIO_SPLB0" TYPE="integer" VALUE="1">
213 <DESCRIPTION>Secondary Arbitration Priority for SPLB0, DMA0 and DMA1</DESCRIPTION>
215 <PARAMETER MPD_INDEX="47" NAME="C_PPC440MC_ARB_MODE" TYPE="integer" VALUE="0">
216 <DESCRIPTION>Memory Control Interface Arbitration Mode</DESCRIPTION>
218 <PARAMETER MPD_INDEX="48" NAME="C_PPC440MC_MAX_BURST" TYPE="integer" VALUE="8">
219 <DESCRIPTION>Max Number of Quad-words per Burst thru Xbar to MC Interface</DESCRIPTION>
221 <PARAMETER MPD_INDEX="49" NAME="C_MPLB_AWIDTH" TYPE="integer" VALUE="32">
222 <DESCRIPTION>C_MPLB_AWIDTH</DESCRIPTION>
224 <PARAMETER MPD_INDEX="50" NAME="C_MPLB_DWIDTH" TYPE="integer" VALUE="128">
225 <DESCRIPTION>C_MPLB_DWIDTH</DESCRIPTION>
227 <PARAMETER MPD_INDEX="51" NAME="C_MPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
228 <DESCRIPTION>C_MPLB_NATIVE_DWIDTH</DESCRIPTION>
230 <PARAMETER MPD_INDEX="52" NAME="C_MPLB_COUNTER" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x00000500">
231 <DESCRIPTION>Watchdog Counter Threshold</DESCRIPTION>
233 <PARAMETER MPD_INDEX="53" NAME="C_MPLB_PRIO_ICU" TYPE="integer" VALUE="4">
234 <DESCRIPTION>Secondary Arbitration Prio for Instr Fetches</DESCRIPTION>
236 <PARAMETER MPD_INDEX="54" NAME="C_MPLB_PRIO_DCUW" TYPE="integer" VALUE="3">
237 <DESCRIPTION>Secondary Arbitration Prio for Data Writes</DESCRIPTION>
239 <PARAMETER MPD_INDEX="55" NAME="C_MPLB_PRIO_DCUR" TYPE="integer" VALUE="2">
240 <DESCRIPTION>Secondary Arbitration Prio for Data Reads</DESCRIPTION>
242 <PARAMETER MPD_INDEX="56" NAME="C_MPLB_PRIO_SPLB1" TYPE="integer" VALUE="0">
243 <DESCRIPTION>Secondary Arbitration Prio for SPLB1, DMA2, DMA3</DESCRIPTION>
245 <PARAMETER MPD_INDEX="57" NAME="C_MPLB_PRIO_SPLB0" TYPE="integer" VALUE="1">
246 <DESCRIPTION>Secondary Arbitration Prio for SPLB0, DMA0, DMA1</DESCRIPTION>
248 <PARAMETER MPD_INDEX="58" NAME="C_MPLB_ARB_MODE" TYPE="integer" VALUE="0">
249 <DESCRIPTION>MPLB Arbitration Mode</DESCRIPTION>
251 <PARAMETER MPD_INDEX="59" NAME="C_MPLB_SYNC_TATTRIBUTE" TYPE="integer" VALUE="0">
252 <DESCRIPTION>Allow MBusy to Block MPLB</DESCRIPTION>
254 <PARAMETER MPD_INDEX="60" NAME="C_MPLB_MAX_BURST" TYPE="integer" VALUE="8">
255 <DESCRIPTION>Max Num of Quad-words in Bursts</DESCRIPTION>
257 <PARAMETER MPD_INDEX="61" NAME="C_MPLB_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
258 <DESCRIPTION>Allow Locked Transfer</DESCRIPTION>
260 <PARAMETER MPD_INDEX="62" NAME="C_MPLB_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
261 <DESCRIPTION>Allow Read Addr Pipelining</DESCRIPTION>
263 <PARAMETER MPD_INDEX="63" NAME="C_MPLB_WRITE_PIPE_ENABLE" TYPE="integer" VALUE="1">
264 <DESCRIPTION>Allow Write Addr Pipelining</DESCRIPTION>
266 <PARAMETER MPD_INDEX="64" NAME="C_MPLB_WRITE_POST_ENABLE" TYPE="integer" VALUE="1">
267 <DESCRIPTION>Allow Posted Writes</DESCRIPTION>
269 <PARAMETER MPD_INDEX="65" NAME="C_MPLB_P2P" TYPE="integer" VALUE="0">
270 <DESCRIPTION>C_MPLB_P2P</DESCRIPTION>
272 <PARAMETER MPD_INDEX="66" NAME="C_MPLB_WDOG_ENABLE" TYPE="integer" VALUE="1">
273 <DESCRIPTION>Enable Watchdog Timer</DESCRIPTION>
275 <PARAMETER MPD_INDEX="67" NAME="C_SPLB0_AWIDTH" TYPE="integer" VALUE="32">
276 <DESCRIPTION>C_SPLB0_AWIDTH</DESCRIPTION>
278 <PARAMETER MPD_INDEX="68" NAME="C_SPLB0_DWIDTH" TYPE="integer" VALUE="128">
279 <DESCRIPTION>C_SPLB0_DWIDTH</DESCRIPTION>
281 <PARAMETER MPD_INDEX="69" NAME="C_SPLB0_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
282 <DESCRIPTION>C_SPLB0_NATIVE_DWIDTH</DESCRIPTION>
284 <PARAMETER MPD_INDEX="70" NAME="C_SPLB0_SUPPORT_BURSTS" TYPE="integer" VALUE="1">
285 <DESCRIPTION>SPLB Support Bursts</DESCRIPTION>
287 <PARAMETER CHANGEDBY="USER" MPD_INDEX="71" NAME="C_SPLB0_USE_MPLB_ADDR" TYPE="integer" VALUE="1">
288 <DESCRIPTION>Allow SPLB0 to Access MPLB Addr</DESCRIPTION>
290 <PARAMETER CHANGEDBY="USER" MPD_INDEX="72" NAME="C_SPLB0_NUM_MPLB_ADDR_RNG" TYPE="integer" VALUE="1">
291 <DESCRIPTION>Number of MPLB Addr Ranges</DESCRIPTION>
293 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="73" NAME="C_SPLB0_RNG_MC_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
294 <DESCRIPTION>Base Addr </DESCRIPTION>
296 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="74" NAME="C_SPLB0_RNG_MC_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x0fffffff">
297 <DESCRIPTION>High Addr </DESCRIPTION>
299 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="75" NAME="C_SPLB0_RNG0_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x80000000">
300 <DESCRIPTION></DESCRIPTION>
302 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="76" NAME="C_SPLB0_RNG0_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
303 <DESCRIPTION></DESCRIPTION>
305 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="77" NAME="C_SPLB0_RNG1_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
306 <DESCRIPTION></DESCRIPTION>
308 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="78" NAME="C_SPLB0_RNG1_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
309 <DESCRIPTION></DESCRIPTION>
311 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="79" NAME="C_SPLB0_RNG2_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
312 <DESCRIPTION></DESCRIPTION>
314 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="80" NAME="C_SPLB0_RNG2_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
315 <DESCRIPTION></DESCRIPTION>
317 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="81" NAME="C_SPLB0_RNG3_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
318 <DESCRIPTION></DESCRIPTION>
320 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="82" NAME="C_SPLB0_RNG3_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
321 <DESCRIPTION></DESCRIPTION>
323 <PARAMETER MPD_INDEX="83" NAME="C_SPLB0_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
324 <DESCRIPTION>Number of Masters</DESCRIPTION>
326 <PARAMETER MPD_INDEX="84" NAME="C_SPLB0_MID_WIDTH" TYPE="INTEGER" VALUE="1">
327 <DESCRIPTION>Mid Width</DESCRIPTION>
329 <PARAMETER MPD_INDEX="85" NAME="C_SPLB0_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
330 <DESCRIPTION>SPLB Allow Locked Transfer</DESCRIPTION>
332 <PARAMETER MPD_INDEX="86" NAME="C_SPLB0_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
333 <DESCRIPTION>Enable SPLB Read Pipeline</DESCRIPTION>
335 <PARAMETER MPD_INDEX="87" NAME="C_SPLB0_PROPAGATE_MIRQ" TYPE="integer" VALUE="0">
336 <DESCRIPTION>Propagate MIRQ Signals from Xbar onto SPLB </DESCRIPTION>
338 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="88" NAME="C_SPLB0_P2P" TYPE="integer" VALUE="0">
339 <DESCRIPTION>Use P2P</DESCRIPTION>
341 <PARAMETER MPD_INDEX="89" NAME="C_SPLB1_AWIDTH" TYPE="integer" VALUE="32">
342 <DESCRIPTION>C_SPLB1_AWIDTH</DESCRIPTION>
344 <PARAMETER MPD_INDEX="90" NAME="C_SPLB1_DWIDTH" TYPE="integer" VALUE="128">
345 <DESCRIPTION>C_SPLB1_DWIDTH</DESCRIPTION>
347 <PARAMETER MPD_INDEX="91" NAME="C_SPLB1_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
348 <DESCRIPTION>C_SPLB1_NATIVE_DWIDTH</DESCRIPTION>
350 <PARAMETER MPD_INDEX="92" NAME="C_SPLB1_SUPPORT_BURSTS" TYPE="integer" VALUE="1">
351 <DESCRIPTION></DESCRIPTION>
353 <PARAMETER MPD_INDEX="93" NAME="C_SPLB1_USE_MPLB_ADDR" TYPE="integer" VALUE="0">
354 <DESCRIPTION>Allow SPLB1 to Access MPLB Addr</DESCRIPTION>
356 <PARAMETER MPD_INDEX="94" NAME="C_SPLB1_NUM_MPLB_ADDR_RNG" TYPE="integer" VALUE="0">
357 <DESCRIPTION>Number of MPLB Address Ranges</DESCRIPTION>
359 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="95" NAME="C_SPLB1_RNG_MC_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
360 <DESCRIPTION>Base Addr </DESCRIPTION>
362 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="96" NAME="C_SPLB1_RNG_MC_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
363 <DESCRIPTION>High Addr</DESCRIPTION>
365 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="97" NAME="C_SPLB1_RNG0_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
366 <DESCRIPTION></DESCRIPTION>
368 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="98" NAME="C_SPLB1_RNG0_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
369 <DESCRIPTION></DESCRIPTION>
371 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="99" NAME="C_SPLB1_RNG1_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
372 <DESCRIPTION></DESCRIPTION>
374 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="100" NAME="C_SPLB1_RNG1_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
375 <DESCRIPTION></DESCRIPTION>
377 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="101" NAME="C_SPLB1_RNG2_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
378 <DESCRIPTION></DESCRIPTION>
380 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="102" NAME="C_SPLB1_RNG2_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
381 <DESCRIPTION></DESCRIPTION>
383 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="103" NAME="C_SPLB1_RNG3_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
384 <DESCRIPTION></DESCRIPTION>
386 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="104" NAME="C_SPLB1_RNG3_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
387 <DESCRIPTION></DESCRIPTION>
389 <PARAMETER MPD_INDEX="105" NAME="C_SPLB1_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
390 <DESCRIPTION>Number of Masters</DESCRIPTION>
392 <PARAMETER MPD_INDEX="106" NAME="C_SPLB1_MID_WIDTH" TYPE="INTEGER" VALUE="1">
393 <DESCRIPTION>Mid Width</DESCRIPTION>
395 <PARAMETER MPD_INDEX="107" NAME="C_SPLB1_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
396 <DESCRIPTION></DESCRIPTION>
398 <PARAMETER MPD_INDEX="108" NAME="C_SPLB1_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
399 <DESCRIPTION></DESCRIPTION>
401 <PARAMETER MPD_INDEX="109" NAME="C_SPLB1_PROPAGATE_MIRQ" TYPE="integer" VALUE="0">
402 <DESCRIPTION></DESCRIPTION>
404 <PARAMETER MPD_INDEX="110" NAME="C_SPLB1_P2P" TYPE="integer" VALUE="-1">
405 <DESCRIPTION></DESCRIPTION>
407 <PARAMETER MPD_INDEX="111" NAME="C_NUM_DMA" TYPE="INTEGER" VALUE="0">
408 <DESCRIPTION>Number of DMA Channel</DESCRIPTION>
410 <PARAMETER MPD_INDEX="112" NAME="C_DMA0_TXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
411 <DESCRIPTION></DESCRIPTION>
413 <PARAMETER MPD_INDEX="113" NAME="C_DMA0_RXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
414 <DESCRIPTION> DMA 0 </DESCRIPTION>
416 <PARAMETER MPD_INDEX="114" NAME="C_DMA0_CONTROL" TYPE="BIT_VECTOR(0 to 7)" VALUE="0b00000000">
417 <DESCRIPTION></DESCRIPTION>
419 <PARAMETER MPD_INDEX="115" NAME="C_DMA0_TXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
420 <DESCRIPTION></DESCRIPTION>
422 <PARAMETER MPD_INDEX="116" NAME="C_DMA0_RXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
423 <DESCRIPTION></DESCRIPTION>
425 <PARAMETER MPD_INDEX="117" NAME="C_DMA1_TXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
426 <DESCRIPTION></DESCRIPTION>
428 <PARAMETER MPD_INDEX="118" NAME="C_DMA1_RXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
429 <DESCRIPTION> DMA 1</DESCRIPTION>
431 <PARAMETER MPD_INDEX="119" NAME="C_DMA1_CONTROL" TYPE="BIT_VECTOR(0 to 7)" VALUE="0b00000000">
432 <DESCRIPTION></DESCRIPTION>
434 <PARAMETER MPD_INDEX="120" NAME="C_DMA1_TXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
435 <DESCRIPTION></DESCRIPTION>
437 <PARAMETER MPD_INDEX="121" NAME="C_DMA1_RXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
438 <DESCRIPTION></DESCRIPTION>
440 <PARAMETER MPD_INDEX="122" NAME="C_DMA2_TXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
441 <DESCRIPTION></DESCRIPTION>
443 <PARAMETER MPD_INDEX="123" NAME="C_DMA2_RXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
444 <DESCRIPTION> DMA 2</DESCRIPTION>
446 <PARAMETER MPD_INDEX="124" NAME="C_DMA2_CONTROL" TYPE="BIT_VECTOR(0 to 7)" VALUE="0b00000000">
447 <DESCRIPTION></DESCRIPTION>
449 <PARAMETER MPD_INDEX="125" NAME="C_DMA2_TXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
450 <DESCRIPTION></DESCRIPTION>
452 <PARAMETER MPD_INDEX="126" NAME="C_DMA2_RXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
453 <DESCRIPTION></DESCRIPTION>
455 <PARAMETER MPD_INDEX="127" NAME="C_DMA3_TXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
456 <DESCRIPTION></DESCRIPTION>
458 <PARAMETER MPD_INDEX="128" NAME="C_DMA3_RXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
459 <DESCRIPTION> DMA 3</DESCRIPTION>
461 <PARAMETER MPD_INDEX="129" NAME="C_DMA3_CONTROL" TYPE="BIT_VECTOR(0 to 7)" VALUE="0b00000000">
462 <DESCRIPTION></DESCRIPTION>
464 <PARAMETER MPD_INDEX="130" NAME="C_DMA3_TXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
465 <DESCRIPTION></DESCRIPTION>
467 <PARAMETER MPD_INDEX="131" NAME="C_DMA3_RXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
468 <DESCRIPTION></DESCRIPTION>
470 <PARAMETER MPD_INDEX="132" NAME="C_DCR_AUTOLOCK_ENABLE" TYPE="INTEGER" VALUE="1">
471 <DESCRIPTION>Enable the Auto-lock Feature for the DCR Indirect Mode</DESCRIPTION>
473 <PARAMETER MPD_INDEX="133" NAME="C_PPCDM_ASYNCMODE" TYPE="INTEGER" VALUE="0">
474 <DESCRIPTION>Synchronization Mode for the External MDCR Interface</DESCRIPTION>
476 <PARAMETER MPD_INDEX="134" NAME="C_PPCDS_ASYNCMODE" TYPE="INTEGER" VALUE="0">
477 <DESCRIPTION>Synchronization Mode for the External SDCR Interface</DESCRIPTION>
479 <PARAMETER MPD_INDEX="135" NAME="C_GENERATE_PLB_TIMESPECS" TYPE="INTEGER" VALUE="1">
480 <DESCRIPTION>Generate Timing Constraint to Resynchronize SPLB MBusy Outputs</DESCRIPTION>
483 <MEMRANGE BASEDECIMAL="0" BASENAME="C_IDCR_BASEADDR" BASEVALUE="0b0000000000" HIGHDECIMAL="255" HIGHNAME="C_IDCR_HIGHADDR" HIGHVALUE="0b0011111111" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="256" SIZEABRV="256">
485 <BUSINTERFACE NAME="SDCR"/>
486 <BUSINTERFACE NAME="MDCR"/>
489 <MEMRANGE BASEDECIMAL="0" BASENAME="C_SPLB0_RNG_MC_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="268435455" HIGHNAME="C_SPLB0_RNG_MC_HIGHADDR" HIGHVALUE="0x0fffffff" MEMTYPE="REGISTER" MINSIZE="0x08000000" SIZE="268435456" SIZEABRV="256M">
491 <BUSINTERFACE NAME="SPLB0"/>
494 <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_SPLB0_RNG0_MPLB_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="4294967295" HIGHNAME="C_SPLB0_RNG0_MPLB_HIGHADDR" HIGHVALUE="0xffffffff" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="-2147483648" SIZEABRV="2G">
496 <BUSINTERFACE NAME="SPLB0"/>
499 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG1_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG1_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
501 <BUSINTERFACE NAME="SPLB0"/>
504 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG2_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG2_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
506 <BUSINTERFACE NAME="SPLB0"/>
509 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG3_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG3_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
511 <BUSINTERFACE NAME="SPLB0"/>
514 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG_MC_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG_MC_HIGHADDR" HIGHVALUE="0x00000000" MEMTYPE="REGISTER" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
516 <BUSINTERFACE NAME="SPLB1"/>
519 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG0_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG0_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
521 <BUSINTERFACE NAME="SPLB1"/>
524 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG1_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG1_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
526 <BUSINTERFACE NAME="SPLB1"/>
529 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG2_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG2_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
531 <BUSINTERFACE NAME="SPLB1"/>
534 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG3_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG3_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
536 <BUSINTERFACE NAME="SPLB1"/>
539 <MEMRANGE BASEDECIMAL="4294959104" BASENAME="C_BASEADDR" BASEVALUE="0xffffe000" HIGHDECIMAL="4294967295" HIGHNAME="C_HIGHADDR" HIGHVALUE="0xffffffff" INSTANCE="xps_bram_if_cntlr_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
541 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
544 <MEMRANGE BASEDECIMAL="2214592512" BASENAME="C_BASEADDR" BASEVALUE="0x84000000" HIGHDECIMAL="2214658047" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8400ffff" INSTANCE="RS232_Uart_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
546 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
549 <MEMRANGE BASEDECIMAL="2168717312" BASENAME="C_BASEADDR" BASEVALUE="0x81440000" HIGHDECIMAL="2168782847" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8144ffff" INSTANCE="LEDs_8Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
551 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
554 <MEMRANGE BASEDECIMAL="2168586240" BASENAME="C_BASEADDR" BASEVALUE="0x81420000" HIGHDECIMAL="2168651775" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8142ffff" INSTANCE="LEDs_Positions" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
556 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
559 <MEMRANGE BASEDECIMAL="2168455168" BASENAME="C_BASEADDR" BASEVALUE="0x81400000" HIGHDECIMAL="2168520703" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8140ffff" INSTANCE="Push_Buttons_5Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
561 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
564 <MEMRANGE BASEDECIMAL="2168848384" BASENAME="C_BASEADDR" BASEVALUE="0x81460000" HIGHDECIMAL="2168913919" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8146ffff" INSTANCE="DIP_Switches_8Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
566 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
569 <MEMRANGE BASEDECIMAL="2170552320" BASENAME="C_BASEADDR" BASEVALUE="0x81600000" HIGHDECIMAL="2170617855" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8160ffff" INSTANCE="IIC_EEPROM" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
571 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
574 <MEMRANGE BASEDECIMAL="4160749568" BASENAME="C_MEM0_BASEADDR" BASEVALUE="0xf8000000" HIGHDECIMAL="4161798143" HIGHNAME="C_MEM0_HIGHADDR" HIGHVALUE="0xf80fffff" INSTANCE="SRAM" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="1048576" SIZEABRV="1M">
576 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
579 <MEMRANGE BASEDECIMAL="2243952640" BASENAME="C_BASEADDR" BASEVALUE="0x85c00000" HIGHDECIMAL="2244018175" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x85c0ffff" INSTANCE="PCIe_Bridge" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
581 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
584 <MEMRANGE BASEDECIMAL="3221225472" BASENAME="C_IPIFBAR_0" BASEVALUE="0xc0000000" HIGHDECIMAL="3758096383" HIGHNAME="C_IPIFBAR_HIGHADDR_0" HIGHVALUE="0xdfffffff" INSTANCE="PCIe_Bridge" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="BRIDGE" SIZE="536870912" SIZEABRV="512M">
586 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
589 <MEMRANGE BASEDECIMAL="3758096384" BASENAME="C_IPIFBAR_1" BASEVALUE="0xe0000000" HIGHDECIMAL="4026531839" HIGHNAME="C_IPIFBAR_HIGHADDR_1" HIGHVALUE="0xefffffff" INSTANCE="PCIe_Bridge" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="BRIDGE" SIZE="268435456" SIZEABRV="256M">
591 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
594 <MEMRANGE BASEDECIMAL="2164260864" BASENAME="C_BASEADDR" BASEVALUE="0x81000000" HIGHDECIMAL="2164326399" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8100ffff" INSTANCE="Ethernet_MAC" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
596 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
599 <MEMRANGE BASEDECIMAL="2204106752" BASENAME="C_BASEADDR" BASEVALUE="0x83600000" HIGHDECIMAL="2204172287" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8360ffff" INSTANCE="SysACE_CompactFlash" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
601 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
604 <MEMRANGE BASEDECIMAL="2172649472" BASENAME="C_BASEADDR" BASEVALUE="0x81800000" HIGHDECIMAL="2172715007" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8180ffff" INSTANCE="xps_intc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
606 <ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
609 <MEMRANGE BASEDECIMAL="0" BASENAME="C_MEM_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="268435455" HIGHNAME="C_MEM_HIGHADDR" HIGHVALUE="0x0fffffff" INSTANCE="DDR2_SDRAM" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="268435456" SIZEABRV="256M">
611 <ROUTEPNT INDEX="0" INSTANCE="ppc440_0_PPC440MC"/>
615 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="CPMC440CLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0"/>
616 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="2" NAME="CPMINTERCONNECTCLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0"/>
617 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="4" NAME="CPMINTERCONNECTCLKNTO1" SIGNAME="net_vcc"/>
618 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="24" NAME="EICC440EXTIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ppc440_0_EICC440EXTIRQ"/>
619 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="78" NAME="CPMMCCLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
620 <PORT BUS="MPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="91" NAME="CPMPPCMPLBCLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
621 <PORT BUS="SPLB0" CLKFREQUENCY="125000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="127" NAME="CPMPPCS0PLBCLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
622 <PORT DIR="I" MPD_INDEX="1" NAME="CPMC440CLKEN" SIGNAME="__NOC__"/>
623 <PORT DIR="I" MPD_INDEX="3" NAME="CPMINTERCONNECTCLKEN" SIGNAME="__NOC__"/>
624 <PORT DIR="I" MPD_INDEX="5" NAME="CPMC440CORECLOCKINACTIVE" SIGNAME="__NOC__"/>
625 <PORT DIR="I" MPD_INDEX="6" NAME="CPMC440TIMERCLOCK" SIGIS="CLK" SIGNAME="__NOC__"/>
626 <PORT DIR="O" MPD_INDEX="7" NAME="C440MACHINECHECK" SIGNAME="__NOC__"/>
627 <PORT DIR="O" MPD_INDEX="8" NAME="C440CPMCORESLEEPREQ" SIGNAME="__NOC__"/>
628 <PORT DIR="O" MPD_INDEX="9" NAME="C440CPMDECIRPTREQ" SIGNAME="__NOC__"/>
629 <PORT DIR="O" MPD_INDEX="10" NAME="C440CPMFITIRPTREQ" SIGNAME="__NOC__"/>
630 <PORT DIR="O" MPD_INDEX="11" NAME="C440CPMMSRCE" SIGNAME="__NOC__"/>
631 <PORT DIR="O" MPD_INDEX="12" NAME="C440CPMMSREE" SIGNAME="__NOC__"/>
632 <PORT DIR="O" MPD_INDEX="13" NAME="C440CPMTIMERRESETREQ" SIGNAME="__NOC__"/>
633 <PORT DIR="O" MPD_INDEX="14" NAME="C440CPMWDIRPTREQ" SIGNAME="__NOC__"/>
634 <PORT DIR="O" MPD_INDEX="15" NAME="PPCCPMINTERCONNECTBUSY" SIGNAME="__NOC__"/>
635 <PORT DIR="I" MPD_INDEX="16" NAME="DBGC440DEBUGHALT" SIGNAME="__NOC__">
636 <DESCRIPTION>JTAG HALT</DESCRIPTION>
638 <PORT DIR="I" MPD_INDEX="17" NAME="DBGC440DEBUGHALTNEG" SIGNAME="__NOC__">
639 <DESCRIPTION>JTAG HALT INV</DESCRIPTION>
641 <PORT DIR="I" MPD_INDEX="18" NAME="DBGC440SYSTEMSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:4]"/>
642 <PORT DIR="I" MPD_INDEX="19" NAME="DBGC440UNCONDDEBUGEVENT" SIGNAME="__NOC__"/>
643 <PORT DIR="O" MPD_INDEX="20" NAME="C440DBGSYSTEMCONTROL" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
644 <PORT DIR="O" MPD_INDEX="21" NAME="SPLB0_Error" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
645 <PORT DIR="O" MPD_INDEX="22" NAME="SPLB1_Error" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
646 <PORT DIR="I" MPD_INDEX="23" NAME="EICC440CRITIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
647 <PORT DIR="O" MPD_INDEX="25" NAME="PPCEICINTERCONNECTIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
648 <PORT DIR="I" MPD_INDEX="26" NAME="CPMDCRCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
649 <PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="27" NAME="DCRPPCDMACK" SIGNAME="__NOC__"/>
650 <PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="28" NAME="DCRPPCDMDBUSIN" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
651 <PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="29" NAME="DCRPPCDMTIMEOUTWAIT" SIGNAME="__NOC__"/>
652 <PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="30" NAME="PPCDMDCRREAD" SIGNAME="__NOC__"/>
653 <PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="PPCDMDCRWRITE" SIGNAME="__NOC__"/>
654 <PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="PPCDMDCRABUS" SIGNAME="__NOC__" VECFORMULA="[0:9]"/>
655 <PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="33" NAME="PPCDMDCRDBUSOUT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
656 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="34" NAME="DCRPPCDSREAD" SIGNAME="__NOC__"/>
657 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="35" NAME="DCRPPCDSWRITE" SIGNAME="__NOC__"/>
658 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="36" NAME="DCRPPCDSABUS" SIGNAME="__NOC__" VECFORMULA="[0:9]"/>
659 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="37" NAME="DCRPPCDSDBUSOUT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
660 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="38" NAME="PPCDSDCRACK" SIGNAME="__NOC__"/>
661 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="39" NAME="PPCDSDCRDBUSIN" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
662 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="40" NAME="PPCDSDCRTIMEOUTWAIT" SIGNAME="__NOC__"/>
663 <PORT BUS="MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="41" NAME="CPMFCMCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
664 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="FCMAPUCR" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
665 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="FCMAPUDONE" SIGNAME="__NOC__"/>
666 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="FCMAPUEXCEPTION" SIGNAME="__NOC__"/>
667 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="45" NAME="FCMAPUFPSCRFEX" SIGNAME="__NOC__"/>
668 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="46" NAME="FCMAPURESULT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
669 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="47" NAME="FCMAPURESULTVALID" SIGNAME="__NOC__"/>
670 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="48" NAME="FCMAPUSLEEPNOTREADY" SIGNAME="__NOC__"/>
671 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="49" NAME="FCMAPUCONFIRMINSTR" SIGNAME="__NOC__"/>
672 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="50" NAME="FCMAPUSTOREDATA" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
673 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="51" NAME="APUFCMDECNONAUTON" SIGNAME="__NOC__"/>
674 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="52" NAME="APUFCMDECFPUOP" SIGNAME="__NOC__"/>
675 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="53" NAME="APUFCMDECLDSTXFERSIZE" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
676 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="54" NAME="APUFCMDECLOAD" SIGNAME="__NOC__"/>
677 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="55" NAME="APUFCMNEXTINSTRREADY" SIGNAME="__NOC__"/>
678 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="56" NAME="APUFCMDECSTORE" SIGNAME="__NOC__"/>
679 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="57" NAME="APUFCMDECUDI" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
680 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="58" NAME="APUFCMDECUDIVALID" SIGNAME="__NOC__"/>
681 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="APUFCMENDIAN" SIGNAME="__NOC__"/>
682 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="APUFCMFLUSH" SIGNAME="__NOC__"/>
683 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="61" NAME="APUFCMINSTRUCTION" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
684 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="62" NAME="APUFCMINSTRVALID" SIGNAME="__NOC__"/>
685 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="63" NAME="APUFCMLOADBYTEADDR" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
686 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="64" NAME="APUFCMLOADDATA" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
687 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="65" NAME="APUFCMLOADDVALID" SIGNAME="__NOC__"/>
688 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="66" NAME="APUFCMOPERANDVALID" SIGNAME="__NOC__"/>
689 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="67" NAME="APUFCMRADATA" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
690 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="68" NAME="APUFCMRBDATA" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
691 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="69" NAME="APUFCMWRITEBACKOK" SIGNAME="__NOC__"/>
692 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="70" NAME="APUFCMMSRFE0" SIGNAME="__NOC__"/>
693 <PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="71" NAME="APUFCMMSRFE1" SIGNAME="__NOC__"/>
694 <PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK" DIR="I" MPD_INDEX="72" NAME="JTGC440TCK" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK">
695 <DESCRIPTION>JTAG TCK</DESCRIPTION>
697 <PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI" DIR="I" MPD_INDEX="73" NAME="JTGC440TDI" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI">
698 <DESCRIPTION>JTAG TDI</DESCRIPTION>
700 <PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS" DIR="I" MPD_INDEX="74" NAME="JTGC440TMS" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS">
701 <DESCRIPTION>JTAG TMS</DESCRIPTION>
703 <PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG" DIR="I" MPD_INDEX="75" NAME="JTGC440TRSTNEG" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG">
704 <DESCRIPTION>JTAG TRST</DESCRIPTION>
706 <PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO" DIR="O" MPD_INDEX="76" NAME="C440JTGTDO" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO">
707 <DESCRIPTION>JTAG TDO</DESCRIPTION>
709 <PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN" DIR="O" MPD_INDEX="77" NAME="C440JTGTDOEN" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN"/>
710 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATA" DIR="I" MPD_INDEX="79" NAME="MCMIREADDATA" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATA" VECFORMULA="[0:127]"/>
711 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAVALID" DIR="I" MPD_INDEX="80" NAME="MCMIREADDATAVALID" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAVALID"/>
712 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAERR" DIR="I" MPD_INDEX="81" NAME="MCMIREADDATAERR" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAERR"/>
713 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIADDRREADYTOACCEPT" DIR="I" MPD_INDEX="82" NAME="MCMIADDRREADYTOACCEPT" SIGNAME="ppc440_0_PPC440MC_MCMIADDRREADYTOACCEPT"/>
714 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCREADNOTWRITE" DIR="O" MPD_INDEX="83" NAME="MIMCREADNOTWRITE" SIGNAME="ppc440_0_PPC440MC_MIMCREADNOTWRITE"/>
715 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCADDRESS" DIR="O" MPD_INDEX="84" NAME="MIMCADDRESS" SIGNAME="ppc440_0_PPC440MC_MIMCADDRESS" VECFORMULA="[0:35]"/>
716 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCADDRESSVALID" DIR="O" MPD_INDEX="85" NAME="MIMCADDRESSVALID" SIGNAME="ppc440_0_PPC440MC_MIMCADDRESSVALID"/>
717 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATA" DIR="O" MPD_INDEX="86" NAME="MIMCWRITEDATA" SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATA" VECFORMULA="[0:127]"/>
718 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATAVALID" DIR="O" MPD_INDEX="87" NAME="MIMCWRITEDATAVALID" SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATAVALID"/>
719 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCBYTEENABLE" DIR="O" MPD_INDEX="88" NAME="MIMCBYTEENABLE" SIGNAME="ppc440_0_PPC440MC_MIMCBYTEENABLE" VECFORMULA="[0:15]"/>
720 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCBANKCONFLICT" DIR="O" MPD_INDEX="89" NAME="MIMCBANKCONFLICT" SIGNAME="ppc440_0_PPC440MC_MIMCBANKCONFLICT"/>
721 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCROWCONFLICT" DIR="O" MPD_INDEX="90" NAME="MIMCROWCONFLICT" SIGNAME="ppc440_0_PPC440MC_MIMCROWCONFLICT"/>
722 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MBusy" DIR="I" MPD_INDEX="92" NAME="PLBPPCMMBUSY" SIGNAME="plb_v46_0_PLB_MBusy"/>
723 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MIRQ" DIR="I" MPD_INDEX="93" NAME="PLBPPCMMIRQ" SIGNAME="plb_v46_0_PLB_MIRQ"/>
724 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdErr" DIR="I" MPD_INDEX="94" NAME="PLBPPCMMRDERR" SIGNAME="plb_v46_0_PLB_MRdErr"/>
725 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrErr" DIR="I" MPD_INDEX="95" NAME="PLBPPCMMWRERR" SIGNAME="plb_v46_0_PLB_MWrErr"/>
726 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MAddrAck" DIR="I" MPD_INDEX="96" NAME="PLBPPCMADDRACK" SIGNAME="plb_v46_0_PLB_MAddrAck"/>
727 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdBTerm" DIR="I" MPD_INDEX="97" NAME="PLBPPCMRDBTERM" SIGNAME="plb_v46_0_PLB_MRdBTerm"/>
728 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdDAck" DIR="I" MPD_INDEX="98" NAME="PLBPPCMRDDACK" SIGNAME="plb_v46_0_PLB_MRdDAck"/>
729 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdDBus" DIR="I" MPD_INDEX="99" NAME="PLBPPCMRDDBUS" SIGNAME="plb_v46_0_PLB_MRdDBus" VECFORMULA="[0:127]"/>
730 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdWdAddr" DIR="I" MPD_INDEX="100" NAME="PLBPPCMRDWDADDR" SIGNAME="plb_v46_0_PLB_MRdWdAddr" VECFORMULA="[0:3]"/>
731 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRearbitrate" DIR="I" MPD_INDEX="101" NAME="PLBPPCMREARBITRATE" SIGNAME="plb_v46_0_PLB_MRearbitrate"/>
732 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MSSize" DIR="I" MPD_INDEX="102" NAME="PLBPPCMSSIZE" SIGNAME="plb_v46_0_PLB_MSSize" VECFORMULA="[0:1]"/>
733 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MTimeout" DIR="I" MPD_INDEX="103" NAME="PLBPPCMTIMEOUT" SIGNAME="plb_v46_0_PLB_MTimeout"/>
734 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrBTerm" DIR="I" MPD_INDEX="104" NAME="PLBPPCMWRBTERM" SIGNAME="plb_v46_0_PLB_MWrBTerm"/>
735 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrDAck" DIR="I" MPD_INDEX="105" NAME="PLBPPCMWRDACK" SIGNAME="plb_v46_0_PLB_MWrDAck"/>
736 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="106" NAME="PLBPPCMRDPENDPRI" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
737 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="107" NAME="PLBPPCMRDPENDREQ" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
738 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="108" NAME="PLBPPCMREQPRI" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
739 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="109" NAME="PLBPPCMWRPENDPRI" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
740 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="110" NAME="PLBPPCMWRPENDREQ" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
741 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_abort" DIR="O" MPD_INDEX="111" NAME="PPCMPLBABORT" SIGNAME="plb_v46_0_M_abort"/>
742 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_ABus" DIR="O" MPD_INDEX="112" NAME="PPCMPLBABUS" SIGNAME="plb_v46_0_M_ABus" VECFORMULA="[0:31]"/>
743 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_BE" DIR="O" MPD_INDEX="113" NAME="PPCMPLBBE" SIGNAME="plb_v46_0_M_BE" VECFORMULA="[0:15]"/>
744 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_busLock" DIR="O" MPD_INDEX="114" NAME="PPCMPLBBUSLOCK" SIGNAME="plb_v46_0_M_busLock"/>
745 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_lockErr" DIR="O" MPD_INDEX="115" NAME="PPCMPLBLOCKERR" SIGNAME="plb_v46_0_M_lockErr"/>
746 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_MSize" DIR="O" MPD_INDEX="116" NAME="PPCMPLBMSIZE" SIGNAME="plb_v46_0_M_MSize" VECFORMULA="[0:1]"/>
747 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_priority" DIR="O" MPD_INDEX="117" NAME="PPCMPLBPRIORITY" SIGNAME="plb_v46_0_M_priority" VECFORMULA="[0:1]"/>
748 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_rdBurst" DIR="O" MPD_INDEX="118" NAME="PPCMPLBRDBURST" SIGNAME="plb_v46_0_M_rdBurst"/>
749 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_request" DIR="O" MPD_INDEX="119" NAME="PPCMPLBREQUEST" SIGNAME="plb_v46_0_M_request"/>
750 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_RNW" DIR="O" MPD_INDEX="120" NAME="PPCMPLBRNW" SIGNAME="plb_v46_0_M_RNW"/>
751 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_size" DIR="O" MPD_INDEX="121" NAME="PPCMPLBSIZE" SIGNAME="plb_v46_0_M_size" VECFORMULA="[0:3]"/>
752 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_TAttribute" DIR="O" MPD_INDEX="122" NAME="PPCMPLBTATTRIBUTE" SIGNAME="plb_v46_0_M_TAttribute" VECFORMULA="[0:15]"/>
753 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_type" DIR="O" MPD_INDEX="123" NAME="PPCMPLBTYPE" SIGNAME="plb_v46_0_M_type" VECFORMULA="[0:2]"/>
754 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_UABus" DIR="O" MPD_INDEX="124" NAME="PPCMPLBUABUS" SIGNAME="plb_v46_0_M_UABus" VECFORMULA="[0:31]"/>
755 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_wrBurst" DIR="O" MPD_INDEX="125" NAME="PPCMPLBWRBURST" SIGNAME="plb_v46_0_M_wrBurst"/>
756 <PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_wrDBus" DIR="O" MPD_INDEX="126" NAME="PPCMPLBWRDBUS" SIGNAME="plb_v46_0_M_wrDBus" VECFORMULA="[0:127]"/>
757 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_masterID" DIR="I" MPD_INDEX="128" NAME="PLBPPCS0MASTERID" SIGNAME="ppc440_0_SPLB0_PLB_masterID" VECFORMULA="[0:(C_SPLB0_MID_WIDTH-1)]"/>
758 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_PAValid" DIR="I" MPD_INDEX="129" NAME="PLBPPCS0PAVALID" SIGNAME="ppc440_0_SPLB0_PLB_PAValid"/>
759 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_SAValid" DIR="I" MPD_INDEX="130" NAME="PLBPPCS0SAVALID" SIGNAME="ppc440_0_SPLB0_PLB_SAValid"/>
760 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_rdPendReq" DIR="I" MPD_INDEX="131" NAME="PLBPPCS0RDPENDREQ" SIGNAME="ppc440_0_SPLB0_PLB_rdPendReq"/>
761 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrPendReq" DIR="I" MPD_INDEX="132" NAME="PLBPPCS0WRPENDREQ" SIGNAME="ppc440_0_SPLB0_PLB_wrPendReq"/>
762 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_rdPendPri" DIR="I" MPD_INDEX="133" NAME="PLBPPCS0RDPENDPRI" SIGNAME="ppc440_0_SPLB0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
763 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrPendPri" DIR="I" MPD_INDEX="134" NAME="PLBPPCS0WRPENDPRI" SIGNAME="ppc440_0_SPLB0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
764 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_reqPri" DIR="I" MPD_INDEX="135" NAME="PLBPPCS0REQPRI" SIGNAME="ppc440_0_SPLB0_PLB_reqPri" VECFORMULA="[0:1]"/>
765 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_rdPrim" DIR="I" MPD_INDEX="136" NAME="PLBPPCS0RDPRIM" SIGNAME="ppc440_0_SPLB0_PLB_rdPrim"/>
766 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrPrim" DIR="I" MPD_INDEX="137" NAME="PLBPPCS0WRPRIM" SIGNAME="ppc440_0_SPLB0_PLB_wrPrim"/>
767 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_busLock" DIR="I" MPD_INDEX="138" NAME="PLBPPCS0BUSLOCK" SIGNAME="ppc440_0_SPLB0_PLB_busLock"/>
768 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_abort" DIR="I" MPD_INDEX="139" NAME="PLBPPCS0ABORT" SIGNAME="ppc440_0_SPLB0_PLB_abort"/>
769 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_RNW" DIR="I" MPD_INDEX="140" NAME="PLBPPCS0RNW" SIGNAME="ppc440_0_SPLB0_PLB_RNW"/>
770 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_BE" DIR="I" MPD_INDEX="141" NAME="PLBPPCS0BE" SIGNAME="ppc440_0_SPLB0_PLB_BE" VECFORMULA="[0:15]"/>
771 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_size" DIR="I" MPD_INDEX="142" NAME="PLBPPCS0SIZE" SIGNAME="ppc440_0_SPLB0_PLB_size" VECFORMULA="[0:3]"/>
772 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_type" DIR="I" MPD_INDEX="143" NAME="PLBPPCS0TYPE" SIGNAME="ppc440_0_SPLB0_PLB_type" VECFORMULA="[0:2]"/>
773 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_TAttribute" DIR="I" MPD_INDEX="144" NAME="PLBPPCS0TATTRIBUTE" SIGNAME="ppc440_0_SPLB0_PLB_TAttribute" VECFORMULA="[0:15]"/>
774 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_lockErr" DIR="I" MPD_INDEX="145" NAME="PLBPPCS0LOCKERR" SIGNAME="ppc440_0_SPLB0_PLB_lockErr"/>
775 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MSize" DIR="I" MPD_INDEX="146" NAME="PLBPPCS0MSIZE" SIGNAME="ppc440_0_SPLB0_PLB_MSize" VECFORMULA="[0:1]"/>
776 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_UABus" DIR="I" MPD_INDEX="147" NAME="PLBPPCS0UABUS" SIGNAME="ppc440_0_SPLB0_PLB_UABus" VECFORMULA="[0:31]"/>
777 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_ABus" DIR="I" MPD_INDEX="148" NAME="PLBPPCS0ABUS" SIGNAME="ppc440_0_SPLB0_PLB_ABus" VECFORMULA="[0:31]"/>
778 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrDBus" DIR="I" MPD_INDEX="149" NAME="PLBPPCS0WRDBUS" SIGNAME="ppc440_0_SPLB0_PLB_wrDBus" VECFORMULA="[0:127]"/>
779 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrBurst" DIR="I" MPD_INDEX="150" NAME="PLBPPCS0WRBURST" SIGNAME="ppc440_0_SPLB0_PLB_wrBurst"/>
780 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_rdBurst" DIR="I" MPD_INDEX="151" NAME="PLBPPCS0RDBURST" SIGNAME="ppc440_0_SPLB0_PLB_rdBurst"/>
781 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_addrAck" DIR="O" MPD_INDEX="152" NAME="PPCS0PLBADDRACK" SIGNAME="ppc440_0_SPLB0_Sl_addrAck"/>
782 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_wait" DIR="O" MPD_INDEX="153" NAME="PPCS0PLBWAIT" SIGNAME="ppc440_0_SPLB0_Sl_wait"/>
783 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_rearbitrate" DIR="O" MPD_INDEX="154" NAME="PPCS0PLBREARBITRATE" SIGNAME="ppc440_0_SPLB0_Sl_rearbitrate"/>
784 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_wrDAck" DIR="O" MPD_INDEX="155" NAME="PPCS0PLBWRDACK" SIGNAME="ppc440_0_SPLB0_Sl_wrDAck"/>
785 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_wrComp" DIR="O" MPD_INDEX="156" NAME="PPCS0PLBWRCOMP" SIGNAME="ppc440_0_SPLB0_Sl_wrComp"/>
786 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_rdDBus" DIR="O" MPD_INDEX="157" NAME="PPCS0PLBRDDBUS" SIGNAME="ppc440_0_SPLB0_Sl_rdDBus" VECFORMULA="[0:127]"/>
787 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_rdWdAddr" DIR="O" MPD_INDEX="158" NAME="PPCS0PLBRDWDADDR" SIGNAME="ppc440_0_SPLB0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
788 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_rdDAck" DIR="O" MPD_INDEX="159" NAME="PPCS0PLBRDDACK" SIGNAME="ppc440_0_SPLB0_Sl_rdDAck"/>
789 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_rdComp" DIR="O" MPD_INDEX="160" NAME="PPCS0PLBRDCOMP" SIGNAME="ppc440_0_SPLB0_Sl_rdComp"/>
790 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_rdBTerm" DIR="O" MPD_INDEX="161" NAME="PPCS0PLBRDBTERM" SIGNAME="ppc440_0_SPLB0_Sl_rdBTerm"/>
791 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_wrBTerm" DIR="O" MPD_INDEX="162" NAME="PPCS0PLBWRBTERM" SIGNAME="ppc440_0_SPLB0_Sl_wrBTerm"/>
792 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_MBusy" DIR="O" MPD_INDEX="163" NAME="PPCS0PLBMBUSY" SIGNAME="ppc440_0_SPLB0_Sl_MBusy" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
793 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_MRdErr" DIR="O" MPD_INDEX="164" NAME="PPCS0PLBMRDERR" SIGNAME="ppc440_0_SPLB0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
794 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_MWrErr" DIR="O" MPD_INDEX="165" NAME="PPCS0PLBMWRERR" SIGNAME="ppc440_0_SPLB0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
795 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_MIRQ" DIR="O" MPD_INDEX="166" NAME="PPCS0PLBMIRQ" SIGNAME="ppc440_0_SPLB0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
796 <PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_SSize" DIR="O" MPD_INDEX="167" NAME="PPCS0PLBSSIZE" SIGNAME="ppc440_0_SPLB0_Sl_SSize" VECFORMULA="[0:1]"/>
797 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="168" NAME="CPMPPCS1PLBCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
798 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="169" NAME="PLBPPCS1MASTERID" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_MID_WIDTH-1)]"/>
799 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="170" NAME="PLBPPCS1PAVALID" SIGNAME="__NOC__"/>
800 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="171" NAME="PLBPPCS1SAVALID" SIGNAME="__NOC__"/>
801 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="172" NAME="PLBPPCS1RDPENDREQ" SIGNAME="__NOC__"/>
802 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="173" NAME="PLBPPCS1WRPENDREQ" SIGNAME="__NOC__"/>
803 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="174" NAME="PLBPPCS1RDPENDPRI" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
804 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="175" NAME="PLBPPCS1WRPENDPRI" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
805 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="176" NAME="PLBPPCS1REQPRI" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
806 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="177" NAME="PLBPPCS1RDPRIM" SIGNAME="__NOC__"/>
807 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="178" NAME="PLBPPCS1WRPRIM" SIGNAME="__NOC__"/>
808 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="179" NAME="PLBPPCS1BUSLOCK" SIGNAME="__NOC__"/>
809 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="180" NAME="PLBPPCS1ABORT" SIGNAME="__NOC__"/>
810 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="181" NAME="PLBPPCS1RNW" SIGNAME="__NOC__"/>
811 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="182" NAME="PLBPPCS1BE" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
812 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="183" NAME="PLBPPCS1SIZE" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
813 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="184" NAME="PLBPPCS1TYPE" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
814 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="185" NAME="PLBPPCS1TATTRIBUTE" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
815 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="186" NAME="PLBPPCS1LOCKERR" SIGNAME="__NOC__"/>
816 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="187" NAME="PLBPPCS1MSIZE" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
817 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="188" NAME="PLBPPCS1UABUS" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
818 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="189" NAME="PLBPPCS1ABUS" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
819 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="190" NAME="PLBPPCS1WRDBUS" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
820 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="191" NAME="PLBPPCS1WRBURST" SIGNAME="__NOC__"/>
821 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="192" NAME="PLBPPCS1RDBURST" SIGNAME="__NOC__"/>
822 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="193" NAME="PPCS1PLBADDRACK" SIGNAME="__NOC__"/>
823 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="194" NAME="PPCS1PLBWAIT" SIGNAME="__NOC__"/>
824 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="195" NAME="PPCS1PLBREARBITRATE" SIGNAME="__NOC__"/>
825 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="196" NAME="PPCS1PLBWRDACK" SIGNAME="__NOC__"/>
826 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="197" NAME="PPCS1PLBWRCOMP" SIGNAME="__NOC__"/>
827 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="198" NAME="PPCS1PLBRDDBUS" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
828 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="199" NAME="PPCS1PLBRDWDADDR" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
829 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="200" NAME="PPCS1PLBRDDACK" SIGNAME="__NOC__"/>
830 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="201" NAME="PPCS1PLBRDCOMP" SIGNAME="__NOC__"/>
831 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="202" NAME="PPCS1PLBRDBTERM" SIGNAME="__NOC__"/>
832 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="203" NAME="PPCS1PLBWRBTERM" SIGNAME="__NOC__"/>
833 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="204" NAME="PPCS1PLBMBUSY" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_NUM_MASTERS-1)]"/>
834 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="205" NAME="PPCS1PLBMRDERR" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_NUM_MASTERS-1)]"/>
835 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="206" NAME="PPCS1PLBMWRERR" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_NUM_MASTERS-1)]"/>
836 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="207" NAME="PPCS1PLBMIRQ" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_NUM_MASTERS-1)]"/>
837 <PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="208" NAME="PPCS1PLBSSIZE" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
838 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="209" NAME="CPMDMA0LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
839 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="210" NAME="LLDMA0TXDSTRDYN" SIGNAME="__NOC__"/>
840 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="211" NAME="LLDMA0RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
841 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="212" NAME="LLDMA0RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
842 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="213" NAME="LLDMA0RXSOFN" SIGNAME="__NOC__"/>
843 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="214" NAME="LLDMA0RXEOFN" SIGNAME="__NOC__"/>
844 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="215" NAME="LLDMA0RXSOPN" SIGNAME="__NOC__"/>
845 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="216" NAME="LLDMA0RXEOPN" SIGNAME="__NOC__"/>
846 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="217" NAME="LLDMA0RXSRCRDYN" SIGNAME="__NOC__"/>
847 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="218" NAME="LLDMA0RSTENGINEREQ" SIGNAME="__NOC__"/>
848 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="219" NAME="DMA0LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
849 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="220" NAME="DMA0LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
850 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="221" NAME="DMA0LLTXSOFN" SIGNAME="__NOC__"/>
851 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="222" NAME="DMA0LLTXEOFN" SIGNAME="__NOC__"/>
852 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="223" NAME="DMA0LLTXSOPN" SIGNAME="__NOC__"/>
853 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="224" NAME="DMA0LLTXEOPN" SIGNAME="__NOC__"/>
854 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="225" NAME="DMA0LLTXSRCRDYN" SIGNAME="__NOC__"/>
855 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="226" NAME="DMA0LLRXDSTRDYN" SIGNAME="__NOC__"/>
856 <PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="227" NAME="DMA0LLRSTENGINEACK" SIGNAME="__NOC__"/>
857 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="228" NAME="DMA0TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
858 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="229" NAME="DMA0RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
859 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="230" NAME="CPMDMA1LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
860 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="231" NAME="LLDMA1TXDSTRDYN" SIGNAME="__NOC__"/>
861 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="232" NAME="LLDMA1RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
862 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="233" NAME="LLDMA1RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
863 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="234" NAME="LLDMA1RXSOFN" SIGNAME="__NOC__"/>
864 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="235" NAME="LLDMA1RXEOFN" SIGNAME="__NOC__"/>
865 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="236" NAME="LLDMA1RXSOPN" SIGNAME="__NOC__"/>
866 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="237" NAME="LLDMA1RXEOPN" SIGNAME="__NOC__"/>
867 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="238" NAME="LLDMA1RXSRCRDYN" SIGNAME="__NOC__"/>
868 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="239" NAME="LLDMA1RSTENGINEREQ" SIGNAME="__NOC__"/>
869 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="240" NAME="DMA1LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
870 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="241" NAME="DMA1LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
871 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="242" NAME="DMA1LLTXSOFN" SIGNAME="__NOC__"/>
872 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="243" NAME="DMA1LLTXEOFN" SIGNAME="__NOC__"/>
873 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="244" NAME="DMA1LLTXSOPN" SIGNAME="__NOC__"/>
874 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="245" NAME="DMA1LLTXEOPN" SIGNAME="__NOC__"/>
875 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="246" NAME="DMA1LLTXSRCRDYN" SIGNAME="__NOC__"/>
876 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="247" NAME="DMA1LLRXDSTRDYN" SIGNAME="__NOC__"/>
877 <PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="248" NAME="DMA1LLRSTENGINEACK" SIGNAME="__NOC__"/>
878 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="249" NAME="DMA1TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
879 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="250" NAME="DMA1RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
880 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="251" NAME="CPMDMA2LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
881 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="252" NAME="LLDMA2TXDSTRDYN" SIGNAME="__NOC__"/>
882 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="253" NAME="LLDMA2RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
883 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="254" NAME="LLDMA2RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
884 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="255" NAME="LLDMA2RXSOFN" SIGNAME="__NOC__"/>
885 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="256" NAME="LLDMA2RXEOFN" SIGNAME="__NOC__"/>
886 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="257" NAME="LLDMA2RXSOPN" SIGNAME="__NOC__"/>
887 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="258" NAME="LLDMA2RXEOPN" SIGNAME="__NOC__"/>
888 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="259" NAME="LLDMA2RXSRCRDYN" SIGNAME="__NOC__"/>
889 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="260" NAME="LLDMA2RSTENGINEREQ" SIGNAME="__NOC__"/>
890 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="261" NAME="DMA2LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
891 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="262" NAME="DMA2LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
892 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="263" NAME="DMA2LLTXSOFN" SIGNAME="__NOC__"/>
893 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="264" NAME="DMA2LLTXEOFN" SIGNAME="__NOC__"/>
894 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="265" NAME="DMA2LLTXSOPN" SIGNAME="__NOC__"/>
895 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="266" NAME="DMA2LLTXEOPN" SIGNAME="__NOC__"/>
896 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="267" NAME="DMA2LLTXSRCRDYN" SIGNAME="__NOC__"/>
897 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="268" NAME="DMA2LLRXDSTRDYN" SIGNAME="__NOC__"/>
898 <PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="269" NAME="DMA2LLRSTENGINEACK" SIGNAME="__NOC__"/>
899 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="270" NAME="DMA2TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
900 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="271" NAME="DMA2RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
901 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="272" NAME="CPMDMA3LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
902 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="273" NAME="LLDMA3TXDSTRDYN" SIGNAME="__NOC__"/>
903 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="274" NAME="LLDMA3RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
904 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="275" NAME="LLDMA3RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
905 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="276" NAME="LLDMA3RXSOFN" SIGNAME="__NOC__"/>
906 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="277" NAME="LLDMA3RXEOFN" SIGNAME="__NOC__"/>
907 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="278" NAME="LLDMA3RXSOPN" SIGNAME="__NOC__"/>
908 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="279" NAME="LLDMA3RXEOPN" SIGNAME="__NOC__"/>
909 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="280" NAME="LLDMA3RXSRCRDYN" SIGNAME="__NOC__"/>
910 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="281" NAME="LLDMA3RSTENGINEREQ" SIGNAME="__NOC__"/>
911 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="282" NAME="DMA3LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
912 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="283" NAME="DMA3LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
913 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="284" NAME="DMA3LLTXSOFN" SIGNAME="__NOC__"/>
914 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="285" NAME="DMA3LLTXEOFN" SIGNAME="__NOC__"/>
915 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="286" NAME="DMA3LLTXSOPN" SIGNAME="__NOC__"/>
916 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="287" NAME="DMA3LLTXEOPN" SIGNAME="__NOC__"/>
917 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="288" NAME="DMA3LLTXSRCRDYN" SIGNAME="__NOC__"/>
918 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="289" NAME="DMA3LLRXDSTRDYN" SIGNAME="__NOC__"/>
919 <PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="290" NAME="DMA3LLRSTENGINEACK" SIGNAME="__NOC__"/>
920 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="291" NAME="DMA3TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
921 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="292" NAME="DMA3RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
922 <PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetcore" DIR="I" MPD_INDEX="293" NAME="RSTC440RESETCORE" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetcore"/>
923 <PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstsPPCresetchip" DIR="I" MPD_INDEX="294" NAME="RSTC440RESETCHIP" SIGIS="RST" SIGNAME="ppc_reset_bus_RstsPPCresetchip"/>
924 <PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetsys" DIR="I" MPD_INDEX="295" NAME="RSTC440RESETSYSTEM" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetsys"/>
925 <PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_Core_Reset_Req" DIR="O" MPD_INDEX="296" NAME="C440RSTCORERESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_Core_Reset_Req"/>
926 <PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_Chip_Reset_Req" DIR="O" MPD_INDEX="297" NAME="C440RSTCHIPRESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_Chip_Reset_Req"/>
927 <PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_System_Reset_Req" DIR="O" MPD_INDEX="298" NAME="C440RSTSYSTEMRESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_System_Reset_Req"/>
928 <PORT DIR="I" MPD_INDEX="299" NAME="TRCC440TRACEDISABLE" SIGNAME="__NOC__"/>
929 <PORT DIR="I" MPD_INDEX="300" NAME="TRCC440TRIGGEREVENTIN" SIGNAME="__NOC__">
930 <DESCRIPTION>Trace Trigger Event In</DESCRIPTION>
932 <PORT DIR="O" MPD_INDEX="301" NAME="C440TRCBRANCHSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:2]">
933 <DESCRIPTION>Trace Branch Status</DESCRIPTION>
935 <PORT DIR="O" MPD_INDEX="302" NAME="C440TRCCYCLE" SIGNAME="__NOC__">
936 <DESCRIPTION>Trace Clock</DESCRIPTION>
938 <PORT DIR="O" MPD_INDEX="303" NAME="C440TRCEXECUTIONSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:4]">
939 <DESCRIPTION>Trace Execution Status</DESCRIPTION>
941 <PORT DIR="O" MPD_INDEX="304" NAME="C440TRCTRACESTATUS" SIGNAME="__NOC__" VECFORMULA="[0:6]">
942 <DESCRIPTION>Trace Status</DESCRIPTION>
944 <PORT DIR="O" MPD_INDEX="305" NAME="C440TRCTRIGGEREVENTOUT" SIGNAME="__NOC__">
945 <DESCRIPTION>Trace Trigger Event Out</DESCRIPTION>
947 <PORT DIR="O" MPD_INDEX="306" NAME="C440TRCTRIGGEREVENTTYPE" SIGNAME="__NOC__" VECFORMULA="[0:13]"/>
948 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_DATA="TRUE" IS_INMHS="TRUE" IS_INSTRUCTION="TRUE" MPD_INDEX="0" NAME="MPLB" TYPE="MASTER"/>
949 <BUSINTERFACE BUSNAME="ppc440_0_SPLB0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="1" NAME="SPLB0" TYPE="SLAVE"/>
950 <BUSINTERFACE BUSNAME="ppc440_0_PPC440MC" BUSSTD="XIL" BUSSTD_PSF="XIL_PPC440MC" IS_DATA="TRUE" IS_INMHS="TRUE" IS_INSTRUCTION="TRUE" MPD_INDEX="3" NAME="PPC440MC" TYPE="INITIATOR"/>
951 <BUSINTERFACE BUSNAME="ppc440_0_jtagppc_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_JTAGPPC" IS_INMHS="TRUE" MPD_INDEX="12" NAME="JTAGPPC" TYPE="TARGET"/>
952 <BUSINTERFACE BUSNAME="ppc_reset_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_INMHS="TRUE" MPD_INDEX="13" NAME="RESETPPC" TYPE="TARGET"/>
953 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" MPD_INDEX="2" NAME="SPLB1" TYPE="SLAVE"/>
954 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="4" NAME="LLDMA0" TYPE="TARGET"/>
955 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="5" NAME="LLDMA1" TYPE="TARGET"/>
956 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="6" NAME="LLDMA2" TYPE="TARGET"/>
957 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="7" NAME="LLDMA3" TYPE="TARGET"/>
958 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" MPD_INDEX="8" NAME="MDCR" TYPE="MASTER"/>
959 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" MPD_INDEX="9" NAME="SDCR" TYPE="SLAVE"/>
960 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FCB" BUSSTD_PSF="FCB2" MPD_INDEX="10" NAME="MFCB" TYPE="MASTER"/>
961 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_FCM2" MPD_INDEX="11" NAME="MFCM" TYPE="INITIATOR"/>
963 <MODULE INSTANCE="xps_bram_if_cntlr_1"/>
964 <MODULE INSTANCE="RS232_Uart_1"/>
965 <MODULE INSTANCE="LEDs_8Bit"/>
966 <MODULE INSTANCE="LEDs_Positions"/>
967 <MODULE INSTANCE="Push_Buttons_5Bit"/>
968 <MODULE INSTANCE="DIP_Switches_8Bit"/>
969 <MODULE INSTANCE="IIC_EEPROM"/>
970 <MODULE INSTANCE="SRAM"/>
971 <MODULE INSTANCE="PCIe_Bridge"/>
972 <MODULE INSTANCE="Ethernet_MAC"/>
973 <MODULE INSTANCE="SysACE_CompactFlash"/>
974 <MODULE INSTANCE="xps_intc_0"/>
975 <MODULE INSTANCE="DDR2_SDRAM"/>
977 <INTERRUPTINFO INTC_INDEX="0" INTERRUPT_CNTLR="xps_intc_0" TYPE="TARGET"/>
979 <MODULE BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" HWVERSION="1.04.a" INSTANCE="plb_v46_0" IPTYPE="BUS" MHS_INDEX="1" MODCLASS="BUS" MODTYPE="plb_v46">
980 <DESCRIPTION TYPE="SHORT">Processor Local Bus (PLB) 4.6</DESCRIPTION>
981 <DESCRIPTION TYPE="LONG">'Xilinx 64-bit Processor Local Bus (PLB) consists of a bus control unit, a watchdog timer, and separate address, write, and read data path units with a a three-cycle only arbitration feature'</DESCRIPTION>
983 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v46_v1_04_a/doc/plb_v46.pdf" TYPE="IP"/>
985 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
986 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_PLBV46_NUM_MASTERS" TYPE="integer" VALUE="1">
987 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
989 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_PLBV46_NUM_SLAVES" TYPE="integer" VALUE="12">
990 <DESCRIPTION>Number of PLB Slaves</DESCRIPTION>
992 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_PLBV46_MID_WIDTH" TYPE="integer" VALUE="1">
993 <DESCRIPTION>PLB Master ID Bus Width</DESCRIPTION>
995 <PARAMETER MPD_INDEX="3" NAME="C_PLBV46_AWIDTH" TYPE="integer" VALUE="32">
996 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
998 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_PLBV46_DWIDTH" TYPE="integer" VALUE="128">
999 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
1001 <PARAMETER MPD_INDEX="5" NAME="C_DCR_INTFCE" TYPE="integer" VALUE="0">
1002 <DESCRIPTION>Include DCR Interface and Error Registers</DESCRIPTION>
1004 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="6" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0b1111111111">
1005 <DESCRIPTION>Base Address</DESCRIPTION>
1007 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="7" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0b0000000000">
1008 <DESCRIPTION>High Address</DESCRIPTION>
1010 <PARAMETER MPD_INDEX="8" NAME="C_DCR_AWIDTH" TYPE="integer" VALUE="10">
1011 <DESCRIPTION>DCR Address Bus Width</DESCRIPTION>
1013 <PARAMETER MPD_INDEX="9" NAME="C_DCR_DWIDTH" TYPE="integer" VALUE="32">
1014 <DESCRIPTION>DCR Data Bus Width</DESCRIPTION>
1016 <PARAMETER MPD_INDEX="10" NAME="C_EXT_RESET_HIGH" TYPE="integer" VALUE="1">
1017 <DESCRIPTION>External Reset Active High </DESCRIPTION>
1019 <PARAMETER MPD_INDEX="11" NAME="C_IRQ_ACTIVE" TYPE="std_logic" VALUE="1">
1020 <DESCRIPTION>IRQ Active State </DESCRIPTION>
1022 <PARAMETER MPD_INDEX="12" NAME="C_NUM_CLK_PLB2OPB_REARB" TYPE="integer" VALUE="5">
1023 <DESCRIPTION><qt>Number of PLB Clock Periods a PLB Master that Received a Rearbitrate from an OPB2PLB Bridge on a Read Operation is Denied Grant on the PLB Bus</qt></DESCRIPTION>
1025 <PARAMETER MPD_INDEX="13" NAME="C_ADDR_PIPELINING_TYPE" TYPE="integer" VALUE="1">
1026 <DESCRIPTION>Enable Address Pipelining Type</DESCRIPTION>
1028 <PARAMETER MPD_INDEX="14" NAME="C_FAMILY" TYPE="string" VALUE="virtex5">
1029 <DESCRIPTION>Device Family</DESCRIPTION>
1031 <PARAMETER MPD_INDEX="15" NAME="C_P2P" TYPE="integer" VALUE="0">
1032 <DESCRIPTION>Optimize PLB for Point-to-point Topology</DESCRIPTION>
1034 <PARAMETER MPD_INDEX="16" NAME="C_ARB_TYPE" TYPE="integer" VALUE="0">
1035 <DESCRIPTION>Selects the Arbitration Scheme</DESCRIPTION>
1038 <MEMRANGE BASEDECIMAL="1023" BASENAME="C_BASEADDR" BASEVALUE="0b1111111111" HIGHDECIMAL="0" HIGHNAME="C_HIGHADDR" HIGHVALUE="0b0000000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x08" SIZE="0" SIZEABRV="U">
1040 <BUSINTERFACE NAME="SDCR"/>
1044 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="PLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
1045 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="SYS_Rst" SIGIS="RST" SIGNAME="sys_bus_reset"/>
1046 <PORT DEF_SIGNAME="plb_v46_0_PLB_Rst" DIR="O" MPD_INDEX="2" NAME="PLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_PLB_Rst"/>
1047 <PORT DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="O" MPD_INDEX="3" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1048 <PORT DEF_SIGNAME="plb_v46_0_MPLB_Rst" DIR="O" MPD_INDEX="4" NAME="MPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_MPLB_Rst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1049 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="5" NAME="PLB_dcrAck" SIGNAME="__NOC__"/>
1050 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="6" NAME="PLB_dcrDBus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_DWIDTH-1]"/>
1051 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="DCR_ABus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_AWIDTH-1]"/>
1052 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="DCR_DBus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_DWIDTH-1]"/>
1053 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="DCR_Read" SIGNAME="__NOC__"/>
1054 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="10" NAME="DCR_Write" SIGNAME="__NOC__"/>
1055 <PORT DEF_SIGNAME="plb_v46_0_M_ABus" DIR="I" MPD_INDEX="11" NAME="M_ABus" SIGNAME="plb_v46_0_M_ABus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*32)-1]"/>
1056 <PORT DEF_SIGNAME="plb_v46_0_M_UABus" DIR="I" MPD_INDEX="12" NAME="M_UABus" SIGNAME="plb_v46_0_M_UABus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*32)-1]"/>
1057 <PORT DEF_SIGNAME="plb_v46_0_M_BE" DIR="I" MPD_INDEX="13" NAME="M_BE" SIGNAME="plb_v46_0_M_BE" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*(C_PLBV46_DWIDTH/8))-1]"/>
1058 <PORT DEF_SIGNAME="plb_v46_0_M_RNW" DIR="I" MPD_INDEX="14" NAME="M_RNW" SIGNAME="plb_v46_0_M_RNW" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1059 <PORT DEF_SIGNAME="plb_v46_0_M_abort" DIR="I" MPD_INDEX="15" NAME="M_abort" SIGNAME="plb_v46_0_M_abort" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1060 <PORT DEF_SIGNAME="plb_v46_0_M_busLock" DIR="I" MPD_INDEX="16" NAME="M_busLock" SIGNAME="plb_v46_0_M_busLock" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1061 <PORT DEF_SIGNAME="plb_v46_0_M_TAttribute" DIR="I" MPD_INDEX="17" NAME="M_TAttribute" SIGNAME="plb_v46_0_M_TAttribute" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*16)-1]"/>
1062 <PORT DEF_SIGNAME="plb_v46_0_M_lockErr" DIR="I" MPD_INDEX="18" NAME="M_lockErr" SIGNAME="plb_v46_0_M_lockErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1063 <PORT DEF_SIGNAME="plb_v46_0_M_MSize" DIR="I" MPD_INDEX="19" NAME="M_MSize" SIGNAME="plb_v46_0_M_MSize" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
1064 <PORT DEF_SIGNAME="plb_v46_0_M_priority" DIR="I" MPD_INDEX="20" NAME="M_priority" SIGNAME="plb_v46_0_M_priority" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
1065 <PORT DEF_SIGNAME="plb_v46_0_M_rdBurst" DIR="I" MPD_INDEX="21" NAME="M_rdBurst" SIGNAME="plb_v46_0_M_rdBurst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1066 <PORT DEF_SIGNAME="plb_v46_0_M_request" DIR="I" MPD_INDEX="22" NAME="M_request" SIGNAME="plb_v46_0_M_request" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1067 <PORT DEF_SIGNAME="plb_v46_0_M_size" DIR="I" MPD_INDEX="23" NAME="M_size" SIGNAME="plb_v46_0_M_size" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*4)-1]"/>
1068 <PORT DEF_SIGNAME="plb_v46_0_M_type" DIR="I" MPD_INDEX="24" NAME="M_type" SIGNAME="plb_v46_0_M_type" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*3)-1]"/>
1069 <PORT DEF_SIGNAME="plb_v46_0_M_wrBurst" DIR="I" MPD_INDEX="25" NAME="M_wrBurst" SIGNAME="plb_v46_0_M_wrBurst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1070 <PORT DEF_SIGNAME="plb_v46_0_M_wrDBus" DIR="I" MPD_INDEX="26" NAME="M_wrDBus" SIGNAME="plb_v46_0_M_wrDBus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*C_PLBV46_DWIDTH)-1]"/>
1071 <PORT DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="I" MPD_INDEX="27" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1072 <PORT DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="I" MPD_INDEX="28" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS)-1]"/>
1073 <PORT DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="I" MPD_INDEX="29" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS)-1]"/>
1074 <PORT DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="I" MPD_INDEX="30" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS - 1 ]"/>
1075 <PORT DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="I" MPD_INDEX="31" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1076 <PORT DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="I" MPD_INDEX="32" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1077 <PORT DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="I" MPD_INDEX="33" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1078 <PORT DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="I" MPD_INDEX="34" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_DWIDTH-1]"/>
1079 <PORT DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="I" MPD_INDEX="35" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*4-1]"/>
1080 <PORT DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="I" MPD_INDEX="36" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1081 <PORT DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="I" MPD_INDEX="37" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*2-1]"/>
1082 <PORT DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="I" MPD_INDEX="38" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1083 <PORT DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="I" MPD_INDEX="39" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1084 <PORT DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="I" MPD_INDEX="40" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1085 <PORT DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="I" MPD_INDEX="41" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1086 <PORT DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="I" MPD_INDEX="42" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS-1]"/>
1087 <PORT DEF_SIGNAME="plb_v46_0_PLB_MIRQ" DIR="O" MPD_INDEX="43" NAME="PLB_MIRQ" SIGNAME="plb_v46_0_PLB_MIRQ" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1088 <PORT DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="O" MPD_INDEX="44" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
1089 <PORT DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="O" MPD_INDEX="45" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
1090 <PORT DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="O" MPD_INDEX="46" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:(C_PLBV46_DWIDTH/8)-1]"/>
1091 <PORT DEF_SIGNAME="plb_v46_0_PLB_MAddrAck" DIR="O" MPD_INDEX="47" NAME="PLB_MAddrAck" SIGNAME="plb_v46_0_PLB_MAddrAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1092 <PORT DEF_SIGNAME="plb_v46_0_PLB_MTimeout" DIR="O" MPD_INDEX="48" NAME="PLB_MTimeout" SIGNAME="plb_v46_0_PLB_MTimeout" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1093 <PORT DEF_SIGNAME="plb_v46_0_PLB_MBusy" DIR="O" MPD_INDEX="49" NAME="PLB_MBusy" SIGNAME="plb_v46_0_PLB_MBusy" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1094 <PORT DEF_SIGNAME="plb_v46_0_PLB_MRdErr" DIR="O" MPD_INDEX="50" NAME="PLB_MRdErr" SIGNAME="plb_v46_0_PLB_MRdErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1095 <PORT DEF_SIGNAME="plb_v46_0_PLB_MWrErr" DIR="O" MPD_INDEX="51" NAME="PLB_MWrErr" SIGNAME="plb_v46_0_PLB_MWrErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1096 <PORT DEF_SIGNAME="plb_v46_0_PLB_MRdBTerm" DIR="O" MPD_INDEX="52" NAME="PLB_MRdBTerm" SIGNAME="plb_v46_0_PLB_MRdBTerm" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1097 <PORT DEF_SIGNAME="plb_v46_0_PLB_MRdDAck" DIR="O" MPD_INDEX="53" NAME="PLB_MRdDAck" SIGNAME="plb_v46_0_PLB_MRdDAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1098 <PORT DEF_SIGNAME="plb_v46_0_PLB_MRdDBus" DIR="O" MPD_INDEX="54" NAME="PLB_MRdDBus" SIGNAME="plb_v46_0_PLB_MRdDBus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*C_PLBV46_DWIDTH)-1]"/>
1099 <PORT DEF_SIGNAME="plb_v46_0_PLB_MRdWdAddr" DIR="O" MPD_INDEX="55" NAME="PLB_MRdWdAddr" SIGNAME="plb_v46_0_PLB_MRdWdAddr" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*4)-1]"/>
1100 <PORT DEF_SIGNAME="plb_v46_0_PLB_MRearbitrate" DIR="O" MPD_INDEX="56" NAME="PLB_MRearbitrate" SIGNAME="plb_v46_0_PLB_MRearbitrate" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1101 <PORT DEF_SIGNAME="plb_v46_0_PLB_MWrBTerm" DIR="O" MPD_INDEX="57" NAME="PLB_MWrBTerm" SIGNAME="plb_v46_0_PLB_MWrBTerm" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1102 <PORT DEF_SIGNAME="plb_v46_0_PLB_MWrDAck" DIR="O" MPD_INDEX="58" NAME="PLB_MWrDAck" SIGNAME="plb_v46_0_PLB_MWrDAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1103 <PORT DEF_SIGNAME="plb_v46_0_PLB_MSSize" DIR="O" MPD_INDEX="59" NAME="PLB_MSSize" SIGNAME="plb_v46_0_PLB_MSSize" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
1104 <PORT DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="O" MPD_INDEX="60" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
1105 <PORT DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="O" MPD_INDEX="61" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
1106 <PORT DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="O" MPD_INDEX="62" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
1107 <PORT DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="O" MPD_INDEX="63" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
1108 <PORT DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="O" MPD_INDEX="64" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
1109 <PORT DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="O" MPD_INDEX="65" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
1110 <PORT DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="O" MPD_INDEX="66" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
1111 <PORT DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="O" MPD_INDEX="67" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:C_PLBV46_MID_WIDTH-1]"/>
1112 <PORT DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="O" MPD_INDEX="68" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
1113 <PORT DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="O" MPD_INDEX="69" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
1114 <PORT DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="O" MPD_INDEX="70" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
1115 <PORT DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="O" MPD_INDEX="71" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
1116 <PORT DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="O" MPD_INDEX="72" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
1117 <PORT DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="O" MPD_INDEX="73" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
1118 <PORT DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="O" MPD_INDEX="74" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1119 <PORT DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="O" MPD_INDEX="75" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
1120 <PORT DEF_SIGNAME="plb_v46_0_PLB_size" DIR="O" MPD_INDEX="76" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
1121 <PORT DEF_SIGNAME="plb_v46_0_PLB_type" DIR="O" MPD_INDEX="77" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
1122 <PORT DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="O" MPD_INDEX="78" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
1123 <PORT DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="O" MPD_INDEX="79" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:C_PLBV46_DWIDTH-1]"/>
1124 <PORT DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="O" MPD_INDEX="80" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
1125 <PORT DEF_SIGNAME="plb_v46_0_PLB_SaddrAck" DIR="O" MPD_INDEX="81" NAME="PLB_SaddrAck" SIGNAME="plb_v46_0_PLB_SaddrAck"/>
1126 <PORT DEF_SIGNAME="plb_v46_0_PLB_SMRdErr" DIR="O" MPD_INDEX="82" NAME="PLB_SMRdErr" SIGNAME="plb_v46_0_PLB_SMRdErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1127 <PORT DEF_SIGNAME="plb_v46_0_PLB_SMWrErr" DIR="O" MPD_INDEX="83" NAME="PLB_SMWrErr" SIGNAME="plb_v46_0_PLB_SMWrErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1128 <PORT DEF_SIGNAME="plb_v46_0_PLB_SMBusy" DIR="O" MPD_INDEX="84" NAME="PLB_SMBusy" SIGNAME="plb_v46_0_PLB_SMBusy" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
1129 <PORT DEF_SIGNAME="plb_v46_0_PLB_SrdBTerm" DIR="O" MPD_INDEX="85" NAME="PLB_SrdBTerm" SIGNAME="plb_v46_0_PLB_SrdBTerm"/>
1130 <PORT DEF_SIGNAME="plb_v46_0_PLB_SrdComp" DIR="O" MPD_INDEX="86" NAME="PLB_SrdComp" SIGNAME="plb_v46_0_PLB_SrdComp"/>
1131 <PORT DEF_SIGNAME="plb_v46_0_PLB_SrdDAck" DIR="O" MPD_INDEX="87" NAME="PLB_SrdDAck" SIGNAME="plb_v46_0_PLB_SrdDAck"/>
1132 <PORT DEF_SIGNAME="plb_v46_0_PLB_SrdDBus" DIR="O" MPD_INDEX="88" NAME="PLB_SrdDBus" SIGNAME="plb_v46_0_PLB_SrdDBus" VECFORMULA="[0:C_PLBV46_DWIDTH-1]"/>
1133 <PORT DEF_SIGNAME="plb_v46_0_PLB_SrdWdAddr" DIR="O" MPD_INDEX="89" NAME="PLB_SrdWdAddr" SIGNAME="plb_v46_0_PLB_SrdWdAddr" VECFORMULA="[0:3]"/>
1134 <PORT DEF_SIGNAME="plb_v46_0_PLB_Srearbitrate" DIR="O" MPD_INDEX="90" NAME="PLB_Srearbitrate" SIGNAME="plb_v46_0_PLB_Srearbitrate"/>
1135 <PORT DEF_SIGNAME="plb_v46_0_PLB_Sssize" DIR="O" MPD_INDEX="91" NAME="PLB_Sssize" SIGNAME="plb_v46_0_PLB_Sssize" VECFORMULA="[0:1]"/>
1136 <PORT DEF_SIGNAME="plb_v46_0_PLB_Swait" DIR="O" MPD_INDEX="92" NAME="PLB_Swait" SIGNAME="plb_v46_0_PLB_Swait"/>
1137 <PORT DEF_SIGNAME="plb_v46_0_PLB_SwrBTerm" DIR="O" MPD_INDEX="93" NAME="PLB_SwrBTerm" SIGNAME="plb_v46_0_PLB_SwrBTerm"/>
1138 <PORT DEF_SIGNAME="plb_v46_0_PLB_SwrComp" DIR="O" MPD_INDEX="94" NAME="PLB_SwrComp" SIGNAME="plb_v46_0_PLB_SwrComp"/>
1139 <PORT DEF_SIGNAME="plb_v46_0_PLB_SwrDAck" DIR="O" MPD_INDEX="95" NAME="PLB_SwrDAck" SIGNAME="plb_v46_0_PLB_SwrDAck"/>
1140 <PORT DIR="O" MPD_INDEX="96" NAME="Bus_Error_Det" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
1141 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" IS_VALID="FALSE" MPD_INDEX="0" NAME="SDCR" TYPE="SLAVE"/>
1143 <MODULE HWVERSION="1.00.b" INSTANCE="xps_bram_if_cntlr_1" IPTYPE="PERIPHERAL" MHS_INDEX="2" MODCLASS="MEMORY_CNTLR" MODTYPE="xps_bram_if_cntlr">
1144 <DESCRIPTION TYPE="SHORT">XPS BRAM Controller</DESCRIPTION>
1145 <DESCRIPTION TYPE="LONG">Attaches BRAM to the PLBV46</DESCRIPTION>
1147 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_bram_if_cntlr_v1_00_b/doc/xps_bram_if_cntlr.pdf" TYPE="IP"/>
1149 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
1150 <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffe000">
1151 <DESCRIPTION>Base Address</DESCRIPTION>
1153 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
1154 <DESCRIPTION>High Address</DESCRIPTION>
1156 <PARAMETER CHANGEDBY="USER" MPD_INDEX="2" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="64">
1157 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
1159 <PARAMETER MPD_INDEX="3" NAME="C_SPLB_AWIDTH" TYPE="integer" VALUE="32">
1160 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
1162 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_SPLB_DWIDTH" TYPE="integer" VALUE="128">
1163 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
1165 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_SPLB_NUM_MASTERS" TYPE="integer" VALUE="1">
1166 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
1168 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_MID_WIDTH" TYPE="integer" VALUE="1">
1169 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
1171 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="integer" VALUE="1">
1172 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
1174 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_P2P" TYPE="integer" VALUE="0">
1175 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
1177 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="9" NAME="C_SPLB_SMALLEST_MASTER" TYPE="integer" VALUE="128">
1178 <DESCRIPTION>Smallest Master Data Bus Width</DESCRIPTION>
1180 <PARAMETER MPD_INDEX="10" NAME="C_FAMILY" TYPE="string" VALUE="virtex5">
1181 <DESCRIPTION>Device Family</DESCRIPTION>
1184 <MEMRANGE BASEDECIMAL="4294959104" BASENAME="C_BASEADDR" BASEVALUE="0xffffe000" HIGHDECIMAL="4294967295" HIGHNAME="C_HIGHADDR" HIGHVALUE="0xffffffff" IS_CACHEABLE="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
1186 <BUSINTERFACE NAME="SPLB"/>
1190 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
1191 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
1192 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
1193 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
1194 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
1195 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
1196 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
1197 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
1198 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:C_SPLB_MID_WIDTH-1]"/>
1199 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
1200 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
1201 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
1202 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:(C_SPLB_DWIDTH/8)-1]"/>
1203 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
1204 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
1205 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
1206 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
1207 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:C_SPLB_DWIDTH-1]"/>
1208 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
1209 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
1210 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
1211 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
1212 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
1213 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
1214 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
1215 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
1216 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
1217 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
1218 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
1219 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
1220 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
1221 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
1222 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
1223 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:C_SPLB_DWIDTH-1]"/>
1224 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
1225 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
1226 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
1227 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
1228 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:C_SPLB_NUM_MASTERS-1]"/>
1229 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:C_SPLB_NUM_MASTERS-1]"/>
1230 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:C_SPLB_NUM_MASTERS-1]"/>
1231 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:C_SPLB_NUM_MASTERS-1]"/>
1232 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Rst" DIR="O" MPD_INDEX="42" NAME="BRAM_Rst" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Rst"/>
1233 <PORT BUS="PORTA" CLKFREQUENCY="125000000" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Clk" DIR="O" MPD_INDEX="43" NAME="BRAM_Clk" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Clk"/>
1234 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_EN" DIR="O" MPD_INDEX="44" NAME="BRAM_EN" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_EN"/>
1235 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_WEN" DIR="O" MPD_INDEX="45" NAME="BRAM_WEN" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_WEN" VECFORMULA="[0:(C_SPLB_NATIVE_DWIDTH/8)-1]"/>
1236 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Addr" DIR="O" MPD_INDEX="46" NAME="BRAM_Addr" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Addr" VECFORMULA="[0:C_SPLB_AWIDTH-1]"/>
1237 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Din" DIR="I" MPD_INDEX="47" NAME="BRAM_Din" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Din" VECFORMULA="[0:C_SPLB_NATIVE_DWIDTH-1]"/>
1238 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Dout" DIR="O" MPD_INDEX="48" NAME="BRAM_Dout" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Dout" VECFORMULA="[0:C_SPLB_NATIVE_DWIDTH-1]"/>
1239 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
1240 <BUSINTERFACE BUSNAME="xps_bram_if_cntlr_1_port" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INMHS="TRUE" MPD_INDEX="1" NAME="PORTA" TYPE="INITIATOR"/>
1242 <MODULE HWVERSION="1.00.a" INSTANCE="xps_bram_if_cntlr_1_bram" IPTYPE="PERIPHERAL" MHS_INDEX="3" MODCLASS="MEMORY" MODTYPE="bram_block">
1243 <DESCRIPTION TYPE="SHORT">Block RAM (BRAM) Block</DESCRIPTION>
1244 <DESCRIPTION TYPE="LONG">The BRAM Block is a configurable memory module that attaches to a variety of BRAM Interface Controllers.</DESCRIPTION>
1246 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/bram_block_v1_00_a/doc/bram_block.pdf" TYPE="IP"/>
1248 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
1249 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_MEMSIZE" TYPE="integer" VALUE="0x2000">
1250 <DESCRIPTION>Size of BRAM(s) in Bytes</DESCRIPTION>
1252 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_PORT_DWIDTH" TYPE="integer" VALUE="64">
1253 <DESCRIPTION>Data Width of Port A and B</DESCRIPTION>
1255 <PARAMETER MPD_INDEX="2" NAME="C_PORT_AWIDTH" TYPE="integer" VALUE="32">
1256 <DESCRIPTION>Address Width of Port A and B</DESCRIPTION>
1258 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_NUM_WE" TYPE="integer" VALUE="8">
1259 <DESCRIPTION>Number of Byte Write Enables</DESCRIPTION>
1261 <PARAMETER CHANGEDBY="USER" MPD_INDEX="4" NAME="C_FAMILY" TYPE="string" VALUE="virtex5">
1262 <DESCRIPTION>Device Family</DESCRIPTION>
1264 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Rst" DIR="I" MPD_INDEX="0" NAME="BRAM_Rst_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Rst"/>
1265 <PORT BUS="PORTA" CLKFREQUENCY="125000000" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Clk" DIR="I" MPD_INDEX="1" NAME="BRAM_Clk_A" SIGIS="CLK" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Clk"/>
1266 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_EN" DIR="I" MPD_INDEX="2" NAME="BRAM_EN_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_EN"/>
1267 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_WEN" DIR="I" MPD_INDEX="3" NAME="BRAM_WEN_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_WEN" VECFORMULA="[0:C_NUM_WE-1]"/>
1268 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Addr" DIR="I" MPD_INDEX="4" NAME="BRAM_Addr_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Addr" VECFORMULA="[0:C_PORT_AWIDTH-1]"/>
1269 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Din" DIR="O" MPD_INDEX="5" NAME="BRAM_Din_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Din" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
1270 <PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Dout" DIR="I" MPD_INDEX="6" NAME="BRAM_Dout_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Dout" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
1271 <PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="BRAM_Rst_B" SIGNAME="__NOC__"/>
1272 <PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="BRAM_Clk_B" SIGIS="CLK" SIGNAME="__NOC__"/>
1273 <PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="BRAM_EN_B" SIGNAME="__NOC__"/>
1274 <PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="10" NAME="BRAM_WEN_B" SIGNAME="__NOC__" VECFORMULA="[0:C_NUM_WE-1]"/>
1275 <PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="11" NAME="BRAM_Addr_B" SIGNAME="__NOC__" VECFORMULA="[0:C_PORT_AWIDTH-1]"/>
1276 <PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="12" NAME="BRAM_Din_B" SIGNAME="__NOC__" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
1277 <PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="13" NAME="BRAM_Dout_B" SIGNAME="__NOC__" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
1278 <BUSINTERFACE BUSNAME="xps_bram_if_cntlr_1_port" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INMHS="TRUE" MPD_INDEX="0" NAME="PORTA" TYPE="TARGET"/>
1279 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" MPD_INDEX="1" NAME="PORTB" TYPE="TARGET"/>
1281 <MODULE HWVERSION="1.01.a" INSTANCE="RS232_Uart_1" IPTYPE="PERIPHERAL" MHS_INDEX="4" MODCLASS="PERIPHERAL" MODTYPE="xps_uartlite">
1282 <DESCRIPTION TYPE="SHORT">XPS UART (Lite)</DESCRIPTION>
1283 <DESCRIPTION TYPE="LONG">Generic UART (Universal Asynchronous Receiver/Transmitter) for PLBV46 bus.</DESCRIPTION>
1285 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_uartlite_v1_01_a/doc/xps_uartlite.pdf" TYPE="IP"/>
1287 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
1288 <PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
1289 <DESCRIPTION>Device Family</DESCRIPTION>
1291 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_SPLB_CLK_FREQ_HZ" TYPE="INTEGER" VALUE="125000000">
1292 <DESCRIPTION>Clock Frequency of PLB Slave</DESCRIPTION>
1294 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="2" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x84000000">
1295 <DESCRIPTION>Base Address</DESCRIPTION>
1297 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="3" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8400ffff">
1298 <DESCRIPTION>High Address</DESCRIPTION>
1300 <PARAMETER MPD_INDEX="4" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
1301 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
1303 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
1304 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
1306 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
1307 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
1309 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
1310 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
1312 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
1313 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
1315 <PARAMETER MPD_INDEX="9" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
1316 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
1318 <PARAMETER MPD_INDEX="10" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
1319 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
1321 <PARAMETER MPD_INDEX="11" NAME="C_BAUDRATE" TYPE="INTEGER" VALUE="9600">
1322 <DESCRIPTION>UART Lite Baud Rate </DESCRIPTION>
1323 <DESCRIPTION>Baud Rate</DESCRIPTION>
1325 <PARAMETER MPD_INDEX="12" NAME="C_DATA_BITS" TYPE="INTEGER" VALUE="8">
1326 <DESCRIPTION>Number of Data Bits in a Serial Frame</DESCRIPTION>
1327 <DESCRIPTION>Data Bits</DESCRIPTION>
1329 <PARAMETER CHANGEDBY="USER" MPD_INDEX="13" NAME="C_USE_PARITY" TYPE="INTEGER" VALUE="0">
1330 <DESCRIPTION>Use Parity </DESCRIPTION>
1332 <PARAMETER CHANGEDBY="USER" MPD_INDEX="14" NAME="C_ODD_PARITY" TYPE="INTEGER" VALUE="0">
1333 <DESCRIPTION>Parity Type </DESCRIPTION>
1336 <MEMRANGE BASEDECIMAL="2214592512" BASENAME="C_BASEADDR" BASEVALUE="0x84000000" HIGHDECIMAL="2214658047" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8400ffff" MEMTYPE="REGISTER" MINSIZE="0x10" SIZE="65536" SIZEABRV="64K">
1338 <BUSINTERFACE NAME="SPLB"/>
1342 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="42" NAME="RX" SIGNAME="fpga_0_RS232_Uart_1_RX_pin">
1343 <DESCRIPTION>Serial Data In</DESCRIPTION>
1345 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="43" NAME="TX" SIGNAME="fpga_0_RS232_Uart_1_TX_pin">
1346 <DESCRIPTION>Serial Data Out</DESCRIPTION>
1348 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="44" NAME="Interrupt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="RS232_Uart_1_Interrupt"/>
1349 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
1350 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
1351 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
1352 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="3" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
1353 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="4" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
1354 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="5" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
1355 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="6" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
1356 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="7" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
1357 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="8" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
1358 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="9" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1359 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="10" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
1360 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="11" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
1361 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="12" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
1362 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="13" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
1363 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="14" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
1364 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="15" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
1365 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="16" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
1366 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="17" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
1367 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
1368 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
1369 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
1370 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
1371 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
1372 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
1373 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
1374 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
1375 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
1376 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
1377 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
1378 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
1379 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
1380 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
1381 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="32" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1382 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="33" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
1383 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="34" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
1384 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="35" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1385 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="36" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1386 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="37" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1387 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="38" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
1388 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="39" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
1389 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="40" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
1390 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1391 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
1392 <INTERRUPTINFO TYPE="SOURCE">
1393 <TARGET INTC_INDEX="0" PRIORITY="1"/>
1396 <MODULE HWVERSION="2.00.a" INSTANCE="LEDs_8Bit" IPTYPE="PERIPHERAL" MHS_INDEX="5" MODCLASS="PERIPHERAL" MODTYPE="xps_gpio">
1397 <DESCRIPTION TYPE="SHORT">XPS General Purpose IO</DESCRIPTION>
1398 <DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the PLBV46 bus.</DESCRIPTION>
1400 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_gpio_v2_00_a/doc/xps_gpio.pdf" TYPE="IP"/>
1402 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
1403 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81440000">
1404 <DESCRIPTION>Base Address</DESCRIPTION>
1406 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8144ffff">
1407 <DESCRIPTION>High Address</DESCRIPTION>
1409 <PARAMETER MPD_INDEX="2" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
1410 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
1412 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
1413 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
1415 <PARAMETER MPD_INDEX="4" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
1416 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
1418 <PARAMETER MPD_INDEX="5" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
1419 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
1421 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
1422 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
1424 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
1425 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
1427 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
1428 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
1430 <PARAMETER MPD_INDEX="9" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
1431 <DESCRIPTION>Device Family</DESCRIPTION>
1433 <PARAMETER MPD_INDEX="10" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="0">
1434 <DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
1436 <PARAMETER MPD_INDEX="11" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
1437 <DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
1439 <PARAMETER CHANGEDBY="USER" MPD_INDEX="12" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="8">
1440 <DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
1441 <DESCRIPTION>GPIO Data Width</DESCRIPTION>
1443 <PARAMETER MPD_INDEX="13" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
1444 <DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
1446 <PARAMETER MPD_INDEX="14" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
1447 <DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
1449 <PARAMETER MPD_INDEX="15" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
1450 <DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
1452 <PARAMETER MPD_INDEX="16" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
1453 <DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
1455 <PARAMETER MPD_INDEX="17" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
1456 <DESCRIPTION>Enable Channel 2 </DESCRIPTION>
1458 <PARAMETER MPD_INDEX="18" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
1459 <DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
1461 <PARAMETER MPD_INDEX="19" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
1462 <DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
1465 <MEMRANGE BASEDECIMAL="2168717312" BASENAME="C_BASEADDR" BASEVALUE="0x81440000" HIGHDECIMAL="2168782847" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8144ffff" MEMTYPE="REGISTER" MINSIZE="0x200" SIZE="65536" SIZEABRV="64K">
1467 <BUSINTERFACE NAME="SPLB"/>
1471 <PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="49" MSB="7" NAME="GPIO_IO" SIGNAME="fpga_0_LEDs_8Bit_GPIO_IO_pin" VECFORMULA="[0:(C_GPIO_WIDTH-1)]">
1472 <DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
1474 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
1475 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
1476 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
1477 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
1478 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
1479 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
1480 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
1481 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
1482 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
1483 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
1484 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
1485 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
1486 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
1487 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
1488 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
1489 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
1490 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
1491 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1492 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
1493 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
1494 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
1495 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
1496 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
1497 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
1498 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
1499 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
1500 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
1501 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
1502 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
1503 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
1504 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
1505 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
1506 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
1507 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1508 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
1509 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
1510 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
1511 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
1512 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1513 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1514 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1515 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1516 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="42" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
1517 <PORT DIR="I" MPD_INDEX="43" NAME="GPIO_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1518 <PORT DIR="O" MPD_INDEX="44" NAME="GPIO_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1519 <PORT DIR="O" MPD_INDEX="45" NAME="GPIO_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1520 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="46" NAME="GPIO2_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1521 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="47" NAME="GPIO2_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1522 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="48" NAME="GPIO2_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1523 <PORT DIR="IO" IS_VALID="FALSE" MPD_INDEX="50" NAME="GPIO2_IO" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]">
1524 <DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
1526 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
1528 <MODULE HWVERSION="2.00.a" INSTANCE="LEDs_Positions" IPTYPE="PERIPHERAL" MHS_INDEX="6" MODCLASS="PERIPHERAL" MODTYPE="xps_gpio">
1529 <DESCRIPTION TYPE="SHORT">XPS General Purpose IO</DESCRIPTION>
1530 <DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the PLBV46 bus.</DESCRIPTION>
1532 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_gpio_v2_00_a/doc/xps_gpio.pdf" TYPE="IP"/>
1534 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
1535 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81420000">
1536 <DESCRIPTION>Base Address</DESCRIPTION>
1538 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8142ffff">
1539 <DESCRIPTION>High Address</DESCRIPTION>
1541 <PARAMETER MPD_INDEX="2" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
1542 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
1544 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
1545 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
1547 <PARAMETER MPD_INDEX="4" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
1548 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
1550 <PARAMETER MPD_INDEX="5" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
1551 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
1553 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
1554 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
1556 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
1557 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
1559 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
1560 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
1562 <PARAMETER MPD_INDEX="9" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
1563 <DESCRIPTION>Device Family</DESCRIPTION>
1565 <PARAMETER MPD_INDEX="10" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="0">
1566 <DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
1568 <PARAMETER MPD_INDEX="11" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
1569 <DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
1571 <PARAMETER CHANGEDBY="USER" MPD_INDEX="12" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="5">
1572 <DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
1573 <DESCRIPTION>GPIO Data Width</DESCRIPTION>
1575 <PARAMETER MPD_INDEX="13" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
1576 <DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
1578 <PARAMETER MPD_INDEX="14" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
1579 <DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
1581 <PARAMETER MPD_INDEX="15" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
1582 <DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
1584 <PARAMETER MPD_INDEX="16" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
1585 <DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
1587 <PARAMETER MPD_INDEX="17" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
1588 <DESCRIPTION>Enable Channel 2 </DESCRIPTION>
1590 <PARAMETER MPD_INDEX="18" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
1591 <DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
1593 <PARAMETER MPD_INDEX="19" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
1594 <DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
1597 <MEMRANGE BASEDECIMAL="2168586240" BASENAME="C_BASEADDR" BASEVALUE="0x81420000" HIGHDECIMAL="2168651775" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8142ffff" MEMTYPE="REGISTER" MINSIZE="0x200" SIZE="65536" SIZEABRV="64K">
1599 <BUSINTERFACE NAME="SPLB"/>
1603 <PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="49" MSB="4" NAME="GPIO_IO" SIGNAME="fpga_0_LEDs_Positions_GPIO_IO_pin" VECFORMULA="[0:(C_GPIO_WIDTH-1)]">
1604 <DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
1606 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
1607 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
1608 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
1609 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
1610 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
1611 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
1612 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
1613 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
1614 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
1615 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
1616 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
1617 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
1618 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
1619 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
1620 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
1621 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
1622 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
1623 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1624 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
1625 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
1626 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
1627 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
1628 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
1629 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
1630 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
1631 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
1632 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
1633 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
1634 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
1635 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
1636 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
1637 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
1638 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
1639 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1640 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
1641 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
1642 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
1643 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
1644 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1645 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1646 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1647 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1648 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="42" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
1649 <PORT DIR="I" MPD_INDEX="43" NAME="GPIO_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1650 <PORT DIR="O" MPD_INDEX="44" NAME="GPIO_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1651 <PORT DIR="O" MPD_INDEX="45" NAME="GPIO_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1652 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="46" NAME="GPIO2_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1653 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="47" NAME="GPIO2_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1654 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="48" NAME="GPIO2_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1655 <PORT DIR="IO" IS_VALID="FALSE" MPD_INDEX="50" NAME="GPIO2_IO" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]">
1656 <DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
1658 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
1660 <MODULE HWVERSION="2.00.a" INSTANCE="Push_Buttons_5Bit" IPTYPE="PERIPHERAL" MHS_INDEX="7" MODCLASS="PERIPHERAL" MODTYPE="xps_gpio">
1661 <DESCRIPTION TYPE="SHORT">XPS General Purpose IO</DESCRIPTION>
1662 <DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the PLBV46 bus.</DESCRIPTION>
1664 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_gpio_v2_00_a/doc/xps_gpio.pdf" TYPE="IP"/>
1666 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
1667 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81400000">
1668 <DESCRIPTION>Base Address</DESCRIPTION>
1670 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8140ffff">
1671 <DESCRIPTION>High Address</DESCRIPTION>
1673 <PARAMETER MPD_INDEX="2" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
1674 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
1676 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
1677 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
1679 <PARAMETER MPD_INDEX="4" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
1680 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
1682 <PARAMETER MPD_INDEX="5" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
1683 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
1685 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
1686 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
1688 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
1689 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
1691 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
1692 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
1694 <PARAMETER MPD_INDEX="9" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
1695 <DESCRIPTION>Device Family</DESCRIPTION>
1697 <PARAMETER CHANGEDBY="USER" MPD_INDEX="10" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="1">
1698 <DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
1700 <PARAMETER MPD_INDEX="11" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
1701 <DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
1703 <PARAMETER CHANGEDBY="USER" MPD_INDEX="12" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="5">
1704 <DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
1705 <DESCRIPTION>GPIO Data Width</DESCRIPTION>
1707 <PARAMETER MPD_INDEX="13" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
1708 <DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
1710 <PARAMETER MPD_INDEX="14" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
1711 <DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
1713 <PARAMETER MPD_INDEX="15" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
1714 <DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
1716 <PARAMETER MPD_INDEX="16" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
1717 <DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
1719 <PARAMETER MPD_INDEX="17" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
1720 <DESCRIPTION>Enable Channel 2 </DESCRIPTION>
1722 <PARAMETER MPD_INDEX="18" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
1723 <DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
1725 <PARAMETER MPD_INDEX="19" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
1726 <DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
1729 <MEMRANGE BASEDECIMAL="2168455168" BASENAME="C_BASEADDR" BASEVALUE="0x81400000" HIGHDECIMAL="2168520703" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8140ffff" MEMTYPE="REGISTER" MINSIZE="0x200" SIZE="65536" SIZEABRV="64K">
1731 <BUSINTERFACE NAME="SPLB"/>
1735 <PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="49" MSB="4" NAME="GPIO_IO" SIGNAME="fpga_0_Push_Buttons_5Bit_GPIO_IO_pin" VECFORMULA="[0:(C_GPIO_WIDTH-1)]">
1736 <DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
1738 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
1739 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
1740 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
1741 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
1742 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
1743 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
1744 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
1745 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
1746 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
1747 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
1748 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
1749 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
1750 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
1751 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
1752 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
1753 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
1754 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
1755 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1756 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
1757 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
1758 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
1759 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
1760 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
1761 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
1762 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
1763 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
1764 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
1765 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
1766 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
1767 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
1768 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
1769 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
1770 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
1771 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1772 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
1773 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
1774 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
1775 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
1776 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1777 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1778 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1779 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1780 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="42" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
1781 <PORT DIR="I" MPD_INDEX="43" NAME="GPIO_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1782 <PORT DIR="O" MPD_INDEX="44" NAME="GPIO_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1783 <PORT DIR="O" MPD_INDEX="45" NAME="GPIO_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1784 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="46" NAME="GPIO2_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1785 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="47" NAME="GPIO2_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1786 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="48" NAME="GPIO2_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1787 <PORT DIR="IO" IS_VALID="FALSE" MPD_INDEX="50" NAME="GPIO2_IO" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]">
1788 <DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
1790 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
1792 <MODULE HWVERSION="2.00.a" INSTANCE="DIP_Switches_8Bit" IPTYPE="PERIPHERAL" MHS_INDEX="8" MODCLASS="PERIPHERAL" MODTYPE="xps_gpio">
1793 <DESCRIPTION TYPE="SHORT">XPS General Purpose IO</DESCRIPTION>
1794 <DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the PLBV46 bus.</DESCRIPTION>
1796 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_gpio_v2_00_a/doc/xps_gpio.pdf" TYPE="IP"/>
1798 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
1799 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81460000">
1800 <DESCRIPTION>Base Address</DESCRIPTION>
1802 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8146ffff">
1803 <DESCRIPTION>High Address</DESCRIPTION>
1805 <PARAMETER MPD_INDEX="2" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
1806 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
1808 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
1809 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
1811 <PARAMETER MPD_INDEX="4" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
1812 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
1814 <PARAMETER MPD_INDEX="5" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
1815 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
1817 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
1818 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
1820 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
1821 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
1823 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
1824 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
1826 <PARAMETER MPD_INDEX="9" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
1827 <DESCRIPTION>Device Family</DESCRIPTION>
1829 <PARAMETER CHANGEDBY="USER" MPD_INDEX="10" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="1">
1830 <DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
1832 <PARAMETER MPD_INDEX="11" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
1833 <DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
1835 <PARAMETER CHANGEDBY="USER" MPD_INDEX="12" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="8">
1836 <DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
1837 <DESCRIPTION>GPIO Data Width</DESCRIPTION>
1839 <PARAMETER MPD_INDEX="13" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
1840 <DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
1842 <PARAMETER MPD_INDEX="14" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
1843 <DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
1845 <PARAMETER MPD_INDEX="15" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
1846 <DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
1848 <PARAMETER MPD_INDEX="16" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
1849 <DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
1851 <PARAMETER MPD_INDEX="17" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
1852 <DESCRIPTION>Enable Channel 2 </DESCRIPTION>
1854 <PARAMETER MPD_INDEX="18" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
1855 <DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
1857 <PARAMETER MPD_INDEX="19" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
1858 <DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
1861 <MEMRANGE BASEDECIMAL="2168848384" BASENAME="C_BASEADDR" BASEVALUE="0x81460000" HIGHDECIMAL="2168913919" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8146ffff" MEMTYPE="REGISTER" MINSIZE="0x200" SIZE="65536" SIZEABRV="64K">
1863 <BUSINTERFACE NAME="SPLB"/>
1867 <PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="49" MSB="7" NAME="GPIO_IO" SIGNAME="fpga_0_DIP_Switches_8Bit_GPIO_IO_pin" VECFORMULA="[0:(C_GPIO_WIDTH-1)]">
1868 <DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
1870 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
1871 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
1872 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
1873 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
1874 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
1875 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
1876 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
1877 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
1878 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
1879 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
1880 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
1881 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
1882 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
1883 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
1884 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
1885 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
1886 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
1887 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1888 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
1889 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
1890 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
1891 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
1892 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
1893 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
1894 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
1895 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
1896 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
1897 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
1898 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
1899 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
1900 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
1901 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
1902 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
1903 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
1904 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
1905 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
1906 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
1907 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
1908 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1909 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1910 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1911 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
1912 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="42" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
1913 <PORT DIR="I" MPD_INDEX="43" NAME="GPIO_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1914 <PORT DIR="O" MPD_INDEX="44" NAME="GPIO_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1915 <PORT DIR="O" MPD_INDEX="45" NAME="GPIO_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
1916 <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="46" NAME="GPIO2_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1917 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="47" NAME="GPIO2_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1918 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="48" NAME="GPIO2_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
1919 <PORT DIR="IO" IS_VALID="FALSE" MPD_INDEX="50" NAME="GPIO2_IO" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]">
1920 <DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
1922 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
1924 <MODULE HWVERSION="2.01.a" INSTANCE="IIC_EEPROM" IPTYPE="PERIPHERAL" MHS_INDEX="9" MODCLASS="PERIPHERAL" MODTYPE="xps_iic">
1925 <DESCRIPTION TYPE="SHORT">XPS IIC Interface</DESCRIPTION>
1926 <DESCRIPTION TYPE="LONG">PLBV46 interface to Philips I2C bus v2.1</DESCRIPTION>
1928 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_iic_v2_01_a/doc/xps_iic.pdf" TYPE="IP"/>
1930 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
1931 <PARAMETER MPD_INDEX="0" NAME="C_IIC_FREQ" TYPE="INTEGER" VALUE="100000">
1932 <DESCRIPTION>Output Frequency of SCL Signal</DESCRIPTION>
1934 <PARAMETER MPD_INDEX="1" NAME="C_TEN_BIT_ADR" TYPE="INTEGER" VALUE="0">
1935 <DESCRIPTION>Use 10-bit Address</DESCRIPTION>
1937 <PARAMETER MPD_INDEX="2" NAME="C_GPO_WIDTH" TYPE="INTEGER" VALUE="1">
1938 <DESCRIPTION>Width of GPIO</DESCRIPTION>
1940 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_CLK_FREQ" TYPE="INTEGER" VALUE="125000000">
1941 <DESCRIPTION>PLBv46 Bus Clock Frequency</DESCRIPTION>
1943 <PARAMETER MPD_INDEX="4" NAME="C_SCL_INERTIAL_DELAY" TYPE="INTEGER" VALUE="0">
1944 <DESCRIPTION>Width of glitches removed on SCL input</DESCRIPTION>
1946 <PARAMETER MPD_INDEX="5" NAME="C_SDA_INERTIAL_DELAY" TYPE="INTEGER" VALUE="0">
1947 <DESCRIPTION>Width of glitches removed on SDA input</DESCRIPTION>
1949 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="6" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81600000">
1950 <DESCRIPTION>Base Address</DESCRIPTION>
1952 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="7" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8160ffff">
1953 <DESCRIPTION>High Address</DESCRIPTION>
1955 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
1956 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
1958 <PARAMETER MPD_INDEX="9" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
1959 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
1961 <PARAMETER MPD_INDEX="10" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
1962 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
1964 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
1965 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
1967 <PARAMETER MPD_INDEX="12" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
1968 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
1970 <PARAMETER MPD_INDEX="13" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
1971 <DESCRIPTION>Device Family</DESCRIPTION>
1974 <MEMRANGE BASEDECIMAL="2170552320" BASENAME="C_BASEADDR" BASEVALUE="0x81600000" HIGHDECIMAL="2170617855" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8160ffff" MEMTYPE="REGISTER" MINSIZE="0x00200" SIZE="65536" SIZEABRV="64K">
1976 <BUSINTERFACE NAME="SPLB"/>
1980 <PORT DIR="IO" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="50" NAME="Sda" SIGNAME="fpga_0_IIC_EEPROM_Sda_pin">
1981 <DESCRIPTION>IIC Serial Data</DESCRIPTION>
1983 <PORT DIR="IO" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="51" NAME="Scl" SIGNAME="fpga_0_IIC_EEPROM_Scl_pin">
1984 <DESCRIPTION>IIC Serial Clock</DESCRIPTION>
1986 <PORT DIR="I" MPD_INDEX="0" NAME="Sda_I" SIGNAME="__NOC__"/>
1987 <PORT DIR="O" MPD_INDEX="1" NAME="Sda_O" SIGNAME="__NOC__"/>
1988 <PORT DIR="O" MPD_INDEX="2" NAME="Sda_T" SIGNAME="__NOC__"/>
1989 <PORT DIR="I" MPD_INDEX="3" NAME="Scl_I" SIGNAME="__NOC__"/>
1990 <PORT DIR="O" MPD_INDEX="4" NAME="Scl_O" SIGNAME="__NOC__"/>
1991 <PORT DIR="O" MPD_INDEX="5" NAME="Scl_T" SIGNAME="__NOC__"/>
1992 <PORT DIR="O" MPD_INDEX="6" NAME="Gpo" SIGNAME="__NOC__" VECFORMULA="[(32-C_GPO_WIDTH):(32-1)]">
1993 <DESCRIPTION>IIC General Purpose Output</DESCRIPTION>
1995 <PORT DIR="O" MPD_INDEX="7" NAME="IIC2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
1996 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="8" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
1997 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="9" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
1998 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="10" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
1999 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="11" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
2000 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="12" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
2001 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="13" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
2002 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="14" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
2003 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="15" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
2004 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="16" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
2005 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="17" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
2006 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="18" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
2007 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="19" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
2008 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="20" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
2009 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="21" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
2010 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="22" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
2011 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="23" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
2012 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="24" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
2013 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="25" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
2014 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="26" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
2015 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="27" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
2016 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="28" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
2017 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="29" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
2018 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="30" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
2019 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="31" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
2020 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="32" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
2021 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="33" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
2022 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="34" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
2023 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="35" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
2024 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="36" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
2025 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="37" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
2026 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="38" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
2027 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="39" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
2028 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="40" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
2029 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="41" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
2030 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="42" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
2031 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="43" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
2032 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="44" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
2033 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="45" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
2034 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="46" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2035 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="47" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2036 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="48" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2037 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="49" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2038 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
2040 <MODULE HWVERSION="3.00.a" INSTANCE="SRAM" IPTYPE="PERIPHERAL" MHS_INDEX="10" MODCLASS="MEMORY_CNTLR" MODTYPE="xps_mch_emc">
2041 <DESCRIPTION TYPE="SHORT">XPS Multi-Channel External Memory Controller(SRAM/Flash)</DESCRIPTION>
2042 <DESCRIPTION TYPE="LONG">Xilinx Multi-CHannel (MCH) PLBV46 external memory controller</DESCRIPTION>
2044 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_mch_emc_v3_00_a/doc/xps_mch_emc.pdf" TYPE="IP"/>
2046 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
2047 <PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
2048 <DESCRIPTION>Device Family</DESCRIPTION>
2050 <PARAMETER MPD_INDEX="1" NAME="C_NUM_BANKS_MEM" TYPE="INTEGER" VALUE="1">
2051 <DESCRIPTION>Number of Memory Banks </DESCRIPTION>
2053 <PARAMETER CHANGEDBY="USER" MPD_INDEX="2" NAME="C_NUM_CHANNELS" TYPE="INTEGER" VALUE="0">
2054 <DESCRIPTION>Number of MCH Channels </DESCRIPTION>
2056 <PARAMETER MPD_INDEX="3" NAME="C_PRIORITY_MODE" TYPE="INTEGER" VALUE="0">
2057 <DESCRIPTION>Arbitration Mode Between PLB and MCH Interface </DESCRIPTION>
2059 <PARAMETER MPD_INDEX="4" NAME="C_INCLUDE_PLB_IPIF" TYPE="INTEGER" VALUE="1">
2060 <DESCRIPTION>Include PLB Slave Interface </DESCRIPTION>
2062 <PARAMETER MPD_INDEX="5" NAME="C_INCLUDE_WRBUF" TYPE="INTEGER" VALUE="1">
2063 <DESCRIPTION>Include Write Buffer</DESCRIPTION>
2065 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
2066 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
2068 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
2069 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
2071 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
2072 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
2074 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="9" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
2075 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
2077 <PARAMETER MPD_INDEX="10" NAME="C_MCH_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
2078 <DESCRIPTION>MCH and PLB Address Bus Width </DESCRIPTION>
2080 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_SPLB_SMALLEST_MASTER" TYPE="INTEGER" VALUE="128">
2081 <DESCRIPTION>Smallest Master Data Bus Width</DESCRIPTION>
2083 <PARAMETER MPD_INDEX="12" NAME="C_MCH_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
2084 <DESCRIPTION>Data Bus Width of MCH</DESCRIPTION>
2086 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_MCH_SPLB_CLK_PERIOD_PS" TYPE="INTEGER" VALUE="8000">
2087 <DESCRIPTION>MCH and PLB Clock Period </DESCRIPTION>
2089 <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="14" NAME="C_MEM0_BASEADDR" TYPE="std_logic_vector" VALUE="0xf8000000">
2090 <DESCRIPTION>Base Address of Bank 0 </DESCRIPTION>
2092 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="15" NAME="C_MEM0_HIGHADDR" TYPE="std_logic_vector" VALUE="0xf80fffff">
2093 <DESCRIPTION>High Address of Bank 0 </DESCRIPTION>
2095 <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="16" NAME="C_MEM1_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
2096 <DESCRIPTION>Base Address of Bank 1 </DESCRIPTION>
2098 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="17" NAME="C_MEM1_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
2099 <DESCRIPTION>High Address of Bank 1 </DESCRIPTION>
2101 <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="18" NAME="C_MEM2_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
2102 <DESCRIPTION>Base Address of Bank 2 </DESCRIPTION>
2104 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="19" NAME="C_MEM2_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
2105 <DESCRIPTION>High Address of Bank 2 </DESCRIPTION>
2107 <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="20" NAME="C_MEM3_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
2108 <DESCRIPTION>Base Address of Bank 3 </DESCRIPTION>
2110 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="21" NAME="C_MEM3_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
2111 <DESCRIPTION>High Address of Bank 3 </DESCRIPTION>
2113 <PARAMETER MPD_INDEX="22" NAME="C_PAGEMODE_FLASH_0" TYPE="INTEGER" VALUE="0">
2114 <DESCRIPTION>Page mode flash enable of Bank 0 </DESCRIPTION>
2116 <PARAMETER MPD_INDEX="23" NAME="C_PAGEMODE_FLASH_1" TYPE="INTEGER" VALUE="0">
2117 <DESCRIPTION>Page mode flash enable of Bank 1 </DESCRIPTION>
2119 <PARAMETER MPD_INDEX="24" NAME="C_PAGEMODE_FLASH_2" TYPE="INTEGER" VALUE="0">
2120 <DESCRIPTION>Page mode flash enable of Bank 2 </DESCRIPTION>
2122 <PARAMETER MPD_INDEX="25" NAME="C_PAGEMODE_FLASH_3" TYPE="INTEGER" VALUE="0">
2123 <DESCRIPTION>Page mode flash enable of Bank 3 </DESCRIPTION>
2125 <PARAMETER MPD_INDEX="26" NAME="C_INCLUDE_NEGEDGE_IOREGS" TYPE="INTEGER" VALUE="0">
2126 <DESCRIPTION>Use Falling Edge IO Register in Interface Signals </DESCRIPTION>
2128 <PARAMETER MPD_INDEX="27" NAME="C_MEM0_WIDTH" TYPE="INTEGER" VALUE="32">
2129 <DESCRIPTION>Data Bus Width of Bank 0 </DESCRIPTION>
2130 <DESCRIPTION>Data Width</DESCRIPTION>
2132 <PARAMETER MPD_INDEX="28" NAME="C_MEM1_WIDTH" TYPE="INTEGER" VALUE="32">
2133 <DESCRIPTION>Data Bus Width of Bank 1 </DESCRIPTION>
2135 <PARAMETER MPD_INDEX="29" NAME="C_MEM2_WIDTH" TYPE="INTEGER" VALUE="32">
2136 <DESCRIPTION>Data Bus Width of Bank 2 </DESCRIPTION>
2138 <PARAMETER MPD_INDEX="30" NAME="C_MEM3_WIDTH" TYPE="INTEGER" VALUE="32">
2139 <DESCRIPTION>Data Bus Width of Bank 3 </DESCRIPTION>
2141 <PARAMETER MPD_INDEX="31" NAME="C_MAX_MEM_WIDTH" TYPE="INTEGER" VALUE="32">
2142 <DESCRIPTION>Maximum Data Bus Width </DESCRIPTION>
2143 <DESCRIPTION>Maximum Data Width</DESCRIPTION>
2145 <PARAMETER MPD_INDEX="32" NAME="C_INCLUDE_DATAWIDTH_MATCHING_0" TYPE="INTEGER" VALUE="0">
2146 <DESCRIPTION>Execute Multiple Memory Accesses To Match Bank 0 Data Bus Width To PLB Data Bus Width</DESCRIPTION>
2148 <PARAMETER MPD_INDEX="33" NAME="C_INCLUDE_DATAWIDTH_MATCHING_1" TYPE="INTEGER" VALUE="0">
2149 <DESCRIPTION> Execute Multiple Memory Accesses To Match Bank 1 Data Bus Width To PLB Data Bus Width </DESCRIPTION>
2151 <PARAMETER MPD_INDEX="34" NAME="C_INCLUDE_DATAWIDTH_MATCHING_2" TYPE="INTEGER" VALUE="0">
2152 <DESCRIPTION> Execute Multiple Memory Accesses To Match Bank 2 Data Bus Width To PLB Data Bus Width </DESCRIPTION>
2154 <PARAMETER MPD_INDEX="35" NAME="C_INCLUDE_DATAWIDTH_MATCHING_3" TYPE="INTEGER" VALUE="0">
2155 <DESCRIPTION> Execute Multiple Memory Accesses To Match Bank 3 Data Bus Width To PLB Data Bus Width </DESCRIPTION>
2157 <PARAMETER CHANGEDBY="USER" MPD_INDEX="36" NAME="C_SYNCH_MEM_0" TYPE="INTEGER" VALUE="1">
2158 <DESCRIPTION>Bank 0 is Synchronous </DESCRIPTION>
2160 <PARAMETER MPD_INDEX="37" NAME="C_SYNCH_PIPEDELAY_0" TYPE="INTEGER" VALUE="2">
2161 <DESCRIPTION>Pipeline Latency of Bank 0 </DESCRIPTION>
2163 <PARAMETER CHANGEDBY="USER" MPD_INDEX="38" NAME="C_TCEDV_PS_MEM_0" TYPE="INTEGER" VALUE="0">
2164 <DESCRIPTION>TCEDV of Bank 0 </DESCRIPTION>
2166 <PARAMETER CHANGEDBY="USER" MPD_INDEX="39" NAME="C_TAVDV_PS_MEM_0" TYPE="INTEGER" VALUE="0">
2167 <DESCRIPTION>TAVDV of Bank 0 </DESCRIPTION>
2169 <PARAMETER MPD_INDEX="40" NAME="C_TPACC_PS_FLASH_0" TYPE="INTEGER" VALUE="25000">
2170 <DESCRIPTION>TPACC of Bank 0 </DESCRIPTION>
2172 <PARAMETER CHANGEDBY="USER" MPD_INDEX="41" NAME="C_THZCE_PS_MEM_0" TYPE="INTEGER" VALUE="0">
2173 <DESCRIPTION>THZCE of Bank 0 </DESCRIPTION>
2175 <PARAMETER CHANGEDBY="USER" MPD_INDEX="42" NAME="C_THZOE_PS_MEM_0" TYPE="INTEGER" VALUE="0">
2176 <DESCRIPTION>THZOE of Bank 0 </DESCRIPTION>
2178 <PARAMETER CHANGEDBY="USER" MPD_INDEX="43" NAME="C_TWC_PS_MEM_0" TYPE="INTEGER" VALUE="0">
2179 <DESCRIPTION>TWC of Bank 0 </DESCRIPTION>
2181 <PARAMETER CHANGEDBY="USER" MPD_INDEX="44" NAME="C_TWP_PS_MEM_0" TYPE="INTEGER" VALUE="0">
2182 <DESCRIPTION>TWP of Bank 0 </DESCRIPTION>
2184 <PARAMETER MPD_INDEX="45" NAME="C_TLZWE_PS_MEM_0" TYPE="INTEGER" VALUE="0">
2185 <DESCRIPTION>TLZWE of Bank 0 </DESCRIPTION>
2187 <PARAMETER MPD_INDEX="46" NAME="C_SYNCH_MEM_1" TYPE="INTEGER" VALUE="0">
2188 <DESCRIPTION>Bank 1 is Synchronous </DESCRIPTION>
2190 <PARAMETER MPD_INDEX="47" NAME="C_SYNCH_PIPEDELAY_1" TYPE="INTEGER" VALUE="2">
2191 <DESCRIPTION>Pipeline Latency of Bank 1 </DESCRIPTION>
2193 <PARAMETER MPD_INDEX="48" NAME="C_TCEDV_PS_MEM_1" TYPE="INTEGER" VALUE="15000">
2194 <DESCRIPTION>TCEDV of Bank 1 </DESCRIPTION>
2196 <PARAMETER MPD_INDEX="49" NAME="C_TAVDV_PS_MEM_1" TYPE="INTEGER" VALUE="15000">
2197 <DESCRIPTION>TAVDV of Bank 1 </DESCRIPTION>
2199 <PARAMETER MPD_INDEX="50" NAME="C_TPACC_PS_FLASH_1" TYPE="INTEGER" VALUE="25000">
2200 <DESCRIPTION>TPACC of Bank 1 </DESCRIPTION>
2202 <PARAMETER MPD_INDEX="51" NAME="C_THZCE_PS_MEM_1" TYPE="INTEGER" VALUE="7000">
2203 <DESCRIPTION>THZCE of Bank 1 </DESCRIPTION>
2205 <PARAMETER MPD_INDEX="52" NAME="C_THZOE_PS_MEM_1" TYPE="INTEGER" VALUE="7000">
2206 <DESCRIPTION>THZOE of Bank 1 </DESCRIPTION>
2208 <PARAMETER MPD_INDEX="53" NAME="C_TWC_PS_MEM_1" TYPE="INTEGER" VALUE="15000">
2209 <DESCRIPTION>TWC of Bank 1 </DESCRIPTION>
2211 <PARAMETER MPD_INDEX="54" NAME="C_TWP_PS_MEM_1" TYPE="INTEGER" VALUE="12000">
2212 <DESCRIPTION>TWP of Bank 1 </DESCRIPTION>
2214 <PARAMETER MPD_INDEX="55" NAME="C_TLZWE_PS_MEM_1" TYPE="INTEGER" VALUE="0">
2215 <DESCRIPTION>TLZWE of Bank 1 </DESCRIPTION>
2217 <PARAMETER MPD_INDEX="56" NAME="C_SYNCH_MEM_2" TYPE="INTEGER" VALUE="0">
2218 <DESCRIPTION>Bank 2 is Synchronous </DESCRIPTION>
2220 <PARAMETER MPD_INDEX="57" NAME="C_SYNCH_PIPEDELAY_2" TYPE="INTEGER" VALUE="2">
2221 <DESCRIPTION>Pipeline Latency of Bank 2 </DESCRIPTION>
2223 <PARAMETER MPD_INDEX="58" NAME="C_TCEDV_PS_MEM_2" TYPE="INTEGER" VALUE="15000">
2224 <DESCRIPTION>TCEDV of Bank 2 </DESCRIPTION>
2226 <PARAMETER MPD_INDEX="59" NAME="C_TAVDV_PS_MEM_2" TYPE="INTEGER" VALUE="15000">
2227 <DESCRIPTION>TAVDV of Bank 2 </DESCRIPTION>
2229 <PARAMETER MPD_INDEX="60" NAME="C_TPACC_PS_FLASH_2" TYPE="INTEGER" VALUE="25000">
2230 <DESCRIPTION>TPACC of Bank 2 </DESCRIPTION>
2232 <PARAMETER MPD_INDEX="61" NAME="C_THZCE_PS_MEM_2" TYPE="INTEGER" VALUE="7000">
2233 <DESCRIPTION>THZCE of Bank 2 </DESCRIPTION>
2235 <PARAMETER MPD_INDEX="62" NAME="C_THZOE_PS_MEM_2" TYPE="INTEGER" VALUE="7000">
2236 <DESCRIPTION>THZOE of Bank 2 </DESCRIPTION>
2238 <PARAMETER MPD_INDEX="63" NAME="C_TWC_PS_MEM_2" TYPE="INTEGER" VALUE="15000">
2239 <DESCRIPTION>TWC of Bank 2 </DESCRIPTION>
2241 <PARAMETER MPD_INDEX="64" NAME="C_TWP_PS_MEM_2" TYPE="INTEGER" VALUE="12000">
2242 <DESCRIPTION>TWP of Bank 2 </DESCRIPTION>
2244 <PARAMETER MPD_INDEX="65" NAME="C_TLZWE_PS_MEM_2" TYPE="INTEGER" VALUE="0">
2245 <DESCRIPTION>TLZWE of Bank 2 </DESCRIPTION>
2247 <PARAMETER MPD_INDEX="66" NAME="C_SYNCH_MEM_3" TYPE="INTEGER" VALUE="0">
2248 <DESCRIPTION>Bank 3 is Synchronous </DESCRIPTION>
2250 <PARAMETER MPD_INDEX="67" NAME="C_SYNCH_PIPEDELAY_3" TYPE="INTEGER" VALUE="2">
2251 <DESCRIPTION>Pipeline Latency of Bank 3 </DESCRIPTION>
2253 <PARAMETER MPD_INDEX="68" NAME="C_TCEDV_PS_MEM_3" TYPE="INTEGER" VALUE="15000">
2254 <DESCRIPTION>TCEDV of Bank 3 </DESCRIPTION>
2256 <PARAMETER MPD_INDEX="69" NAME="C_TAVDV_PS_MEM_3" TYPE="INTEGER" VALUE="15000">
2257 <DESCRIPTION>TAVDV of Bank 3 </DESCRIPTION>
2259 <PARAMETER MPD_INDEX="70" NAME="C_TPACC_PS_FLASH_3" TYPE="INTEGER" VALUE="25000">
2260 <DESCRIPTION>TPACC of Bank 3 </DESCRIPTION>
2262 <PARAMETER MPD_INDEX="71" NAME="C_THZCE_PS_MEM_3" TYPE="INTEGER" VALUE="7000">
2263 <DESCRIPTION>THZCE of Bank 3 </DESCRIPTION>
2265 <PARAMETER MPD_INDEX="72" NAME="C_THZOE_PS_MEM_3" TYPE="INTEGER" VALUE="7000">
2266 <DESCRIPTION>THZOE of Bank 3 </DESCRIPTION>
2268 <PARAMETER MPD_INDEX="73" NAME="C_TWC_PS_MEM_3" TYPE="INTEGER" VALUE="15000">
2269 <DESCRIPTION>TWC of Bank 3 </DESCRIPTION>
2271 <PARAMETER MPD_INDEX="74" NAME="C_TWP_PS_MEM_3" TYPE="INTEGER" VALUE="12000">
2272 <DESCRIPTION>TWP of Bank 3 </DESCRIPTION>
2274 <PARAMETER MPD_INDEX="75" NAME="C_TLZWE_PS_MEM_3" TYPE="INTEGER" VALUE="0">
2275 <DESCRIPTION>TLZWE of Bank 3 </DESCRIPTION>
2277 <PARAMETER MPD_INDEX="76" NAME="C_MCH0_PROTOCOL" TYPE="INTEGER" VALUE="0">
2278 <DESCRIPTION>Interface Protocol of Ch 0 </DESCRIPTION>
2280 <PARAMETER MPD_INDEX="77" NAME="C_MCH0_ACCESSBUF_DEPTH" TYPE="INTEGER" VALUE="16">
2281 <DESCRIPTION>Depth of Access Buffer of Ch 0 </DESCRIPTION>
2283 <PARAMETER MPD_INDEX="78" NAME="C_MCH0_RDDATABUF_DEPTH" TYPE="INTEGER" VALUE="16">
2284 <DESCRIPTION>Depth of Read Data Buffer Depath of Ch 0 </DESCRIPTION>
2286 <PARAMETER MPD_INDEX="79" NAME="C_MCH1_PROTOCOL" TYPE="INTEGER" VALUE="0">
2287 <DESCRIPTION>Interface Protocol of Ch 1 </DESCRIPTION>
2289 <PARAMETER MPD_INDEX="80" NAME="C_MCH1_ACCESSBUF_DEPTH" TYPE="INTEGER" VALUE="16">
2290 <DESCRIPTION>Depth of Access Buffer of Ch 1 </DESCRIPTION>
2292 <PARAMETER MPD_INDEX="81" NAME="C_MCH1_RDDATABUF_DEPTH" TYPE="INTEGER" VALUE="16">
2293 <DESCRIPTION>Depth of Read Data Buffer of Ch 1 </DESCRIPTION>
2295 <PARAMETER MPD_INDEX="82" NAME="C_MCH2_PROTOCOL" TYPE="INTEGER" VALUE="0">
2296 <DESCRIPTION>Interface Protocol of Ch 2 </DESCRIPTION>
2298 <PARAMETER MPD_INDEX="83" NAME="C_MCH2_ACCESSBUF_DEPTH" TYPE="INTEGER" VALUE="16">
2299 <DESCRIPTION>Depth of Access Buffer of Ch 2 </DESCRIPTION>
2301 <PARAMETER MPD_INDEX="84" NAME="C_MCH2_RDDATABUF_DEPTH" TYPE="INTEGER" VALUE="16">
2302 <DESCRIPTION>Depth of Read Data Buffer of Ch 2 </DESCRIPTION>
2304 <PARAMETER MPD_INDEX="85" NAME="C_MCH3_PROTOCOL" TYPE="INTEGER" VALUE="0">
2305 <DESCRIPTION>Interface Protocol of Ch 3 </DESCRIPTION>
2307 <PARAMETER MPD_INDEX="86" NAME="C_MCH3_ACCESSBUF_DEPTH" TYPE="INTEGER" VALUE="16">
2308 <DESCRIPTION>Depth of Access Buffer of Ch 3 </DESCRIPTION>
2310 <PARAMETER MPD_INDEX="87" NAME="C_MCH3_RDDATABUF_DEPTH" TYPE="INTEGER" VALUE="16">
2311 <DESCRIPTION>Depth of Read Data Buffer of Ch 3 </DESCRIPTION>
2313 <PARAMETER MPD_INDEX="88" NAME="C_XCL0_LINESIZE" TYPE="INTEGER" VALUE="4">
2314 <DESCRIPTION>Cacheline Size of Ch0</DESCRIPTION>
2316 <PARAMETER MPD_INDEX="89" NAME="C_XCL0_WRITEXFER" TYPE="INTEGER" VALUE="1">
2317 <DESCRIPTION>Write Transfer Type of Ch0</DESCRIPTION>
2319 <PARAMETER MPD_INDEX="90" NAME="C_XCL1_LINESIZE" TYPE="INTEGER" VALUE="4">
2320 <DESCRIPTION>Cacheline Size of Ch1</DESCRIPTION>
2322 <PARAMETER MPD_INDEX="91" NAME="C_XCL1_WRITEXFER" TYPE="INTEGER" VALUE="1">
2323 <DESCRIPTION>Write Transfer Type of Ch1</DESCRIPTION>
2325 <PARAMETER MPD_INDEX="92" NAME="C_XCL2_LINESIZE" TYPE="INTEGER" VALUE="4">
2326 <DESCRIPTION>Cacheline Size of Ch2</DESCRIPTION>
2328 <PARAMETER MPD_INDEX="93" NAME="C_XCL2_WRITEXFER" TYPE="INTEGER" VALUE="1">
2329 <DESCRIPTION>Write Transfer Type of Ch2</DESCRIPTION>
2331 <PARAMETER MPD_INDEX="94" NAME="C_XCL3_LINESIZE" TYPE="INTEGER" VALUE="4">
2332 <DESCRIPTION>Cacheline Size of Ch3</DESCRIPTION>
2334 <PARAMETER MPD_INDEX="95" NAME="C_XCL3_WRITEXFER" TYPE="INTEGER" VALUE="1">
2335 <DESCRIPTION>Write Transfer Type of Ch3</DESCRIPTION>
2338 <MEMRANGE BASEDECIMAL="4160749568" BASENAME="C_MEM0_BASEADDR" BASEVALUE="0xf8000000" HIGHDECIMAL="4161798143" HIGHNAME="C_MEM0_HIGHADDR" HIGHVALUE="0xf80fffff" IS_CACHEABLE="TRUE" MEMTYPE="MEMORY" SIZE="1048576" SIZEABRV="1M">
2340 <BUSINTERFACE NAME="SPLB"/>
2341 <BUSINTERFACE NAME="MCH0"/>
2342 <BUSINTERFACE NAME="MCH1"/>
2343 <BUSINTERFACE NAME="MCH2"/>
2344 <BUSINTERFACE NAME="MCH3"/>
2347 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_MEM1_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_MEM1_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" SIZE="0" SIZEABRV="U">
2349 <BUSINTERFACE NAME="SPLB"/>
2350 <BUSINTERFACE NAME="MCH0"/>
2351 <BUSINTERFACE NAME="MCH1"/>
2352 <BUSINTERFACE NAME="MCH2"/>
2353 <BUSINTERFACE NAME="MCH3"/>
2356 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_MEM2_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_MEM2_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" SIZE="0" SIZEABRV="U">
2358 <BUSINTERFACE NAME="SPLB"/>
2359 <BUSINTERFACE NAME="MCH0"/>
2360 <BUSINTERFACE NAME="MCH1"/>
2361 <BUSINTERFACE NAME="MCH2"/>
2362 <BUSINTERFACE NAME="MCH3"/>
2365 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_MEM3_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_MEM3_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" SIZE="0" SIZEABRV="U">
2367 <BUSINTERFACE NAME="SPLB"/>
2368 <BUSINTERFACE NAME="MCH0"/>
2369 <BUSINTERFACE NAME="MCH1"/>
2370 <BUSINTERFACE NAME="MCH2"/>
2371 <BUSINTERFACE NAME="MCH3"/>
2375 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="RdClk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
2376 <PORT DIR="O" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="1" MPD_INDEX="78" MSB="31" NAME="Mem_A" SIGNAME="0b0000000 & fpga_0_SRAM_Mem_A_pin_vslice_7_30_concat & 0b0" VECFORMULA="[0:(C_MCH_SPLB_AWIDTH-1)]">
2377 <DESCRIPTION>Memory Address Bus</DESCRIPTION>
2379 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="80" NAME="Mem_CEN" SIGNAME="fpga_0_SRAM_Mem_CEN_pin" VECFORMULA="[0:(C_NUM_BANKS_MEM-1)]">
2380 <DESCRIPTION>Memory Chip Enable Active Low</DESCRIPTION>
2382 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="81" NAME="Mem_OEN" SIGNAME="fpga_0_SRAM_Mem_OEN_pin" VECFORMULA="[0:(C_NUM_BANKS_MEM-1)]">
2383 <DESCRIPTION>Memory Output Enable</DESCRIPTION>
2385 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="82" NAME="Mem_WEN" SIGNAME="fpga_0_SRAM_Mem_WEN_pin">
2386 <DESCRIPTION>Memory Write Enable</DESCRIPTION>
2388 <PORT DIR="O" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="5" MPD_INDEX="84" MSB="3" NAME="Mem_BEN" SIGNAME="fpga_0_SRAM_Mem_BEN_pin" VECFORMULA="[0:((C_MAX_MEM_WIDTH/8)-1)]">
2389 <DESCRIPTION>Memory Byte Enable</DESCRIPTION>
2391 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="86" NAME="Mem_ADV_LDN" SIGNAME="fpga_0_SRAM_Mem_ADV_LDN_pin">
2392 <DESCRIPTION>Memory Advanced Burst Address/Load New Address</DESCRIPTION>
2394 <PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="7" MPD_INDEX="90" MSB="31" NAME="Mem_DQ" SIGNAME="fpga_0_SRAM_Mem_DQ_pin" VECFORMULA="[0:(C_MAX_MEM_WIDTH-1)]">
2395 <DESCRIPTION>Memory Data Bus</DESCRIPTION>
2397 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="MCH_SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
2398 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="2" NAME="MCH_SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
2399 <PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="3" NAME="MCH0_Access_Control" SIGNAME="__NOC__"/>
2400 <PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="4" NAME="MCH0_Access_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
2401 <PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="5" NAME="MCH0_Access_Write" SIGNAME="__NOC__"/>
2402 <PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="6" NAME="MCH0_Access_Full" SIGNAME="__NOC__"/>
2403 <PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="7" NAME="MCH0_ReadData_Control" SIGNAME="__NOC__"/>
2404 <PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="8" NAME="MCH0_ReadData_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
2405 <PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="MCH0_ReadData_Read" SIGNAME="__NOC__"/>
2406 <PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="10" NAME="MCH0_ReadData_Exists" SIGNAME="__NOC__"/>
2407 <PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="11" NAME="MCH1_Access_Control" SIGNAME="__NOC__"/>
2408 <PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="12" NAME="MCH1_Access_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
2409 <PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="13" NAME="MCH1_Access_Write" SIGNAME="__NOC__"/>
2410 <PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="14" NAME="MCH1_Access_Full" SIGNAME="__NOC__"/>
2411 <PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="15" NAME="MCH1_ReadData_Control" SIGNAME="__NOC__"/>
2412 <PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="16" NAME="MCH1_ReadData_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
2413 <PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="17" NAME="MCH1_ReadData_Read" SIGNAME="__NOC__"/>
2414 <PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="18" NAME="MCH1_ReadData_Exists" SIGNAME="__NOC__"/>
2415 <PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="19" NAME="MCH2_Access_Control" SIGNAME="__NOC__"/>
2416 <PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="20" NAME="MCH2_Access_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
2417 <PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="21" NAME="MCH2_Access_Write" SIGNAME="__NOC__"/>
2418 <PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="22" NAME="MCH2_Access_Full" SIGNAME="__NOC__"/>
2419 <PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="23" NAME="MCH2_ReadData_Control" SIGNAME="__NOC__"/>
2420 <PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="24" NAME="MCH2_ReadData_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
2421 <PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="25" NAME="MCH2_ReadData_Read" SIGNAME="__NOC__"/>
2422 <PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="26" NAME="MCH2_ReadData_Exists" SIGNAME="__NOC__"/>
2423 <PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="27" NAME="MCH3_Access_Control" SIGNAME="__NOC__"/>
2424 <PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="28" NAME="MCH3_Access_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
2425 <PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="29" NAME="MCH3_Access_Write" SIGNAME="__NOC__"/>
2426 <PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="30" NAME="MCH3_Access_Full" SIGNAME="__NOC__"/>
2427 <PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="MCH3_ReadData_Control" SIGNAME="__NOC__"/>
2428 <PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="MCH3_ReadData_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
2429 <PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="33" NAME="MCH3_ReadData_Read" SIGNAME="__NOC__"/>
2430 <PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="34" NAME="MCH3_ReadData_Exists" SIGNAME="__NOC__"/>
2431 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="35" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
2432 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="36" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
2433 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="37" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
2434 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="38" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
2435 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="39" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
2436 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="40" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
2437 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="41" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
2438 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="42" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
2439 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="43" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
2440 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="44" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
2441 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="45" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
2442 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="46" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
2443 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="47" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
2444 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="48" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
2445 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="49" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
2446 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="50" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
2447 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="51" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
2448 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="52" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
2449 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="53" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
2450 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="54" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
2451 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="55" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
2452 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="56" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
2453 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="57" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
2454 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="58" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
2455 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="59" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
2456 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="60" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
2457 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="61" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
2458 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="62" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
2459 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="63" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
2460 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="64" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
2461 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="65" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
2462 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="66" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
2463 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="67" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
2464 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="68" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
2465 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="69" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
2466 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="70" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
2467 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="71" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2468 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="72" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2469 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="73" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2470 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="74" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2471 <PORT DIR="I" MPD_INDEX="75" NAME="Mem_DQ_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_MAX_MEM_WIDTH-1)]"/>
2472 <PORT DIR="O" MPD_INDEX="76" NAME="Mem_DQ_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_MAX_MEM_WIDTH-1)]"/>
2473 <PORT DIR="O" MPD_INDEX="77" NAME="Mem_DQ_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_MAX_MEM_WIDTH-1)]"/>
2474 <PORT DIR="O" MPD_INDEX="79" NAME="Mem_RPN" SIGNAME="__NOC__">
2475 <DESCRIPTION>Memory Reset/Power Down</DESCRIPTION>
2477 <PORT DIR="O" MPD_INDEX="83" NAME="Mem_QWEN" SIGNAME="__NOC__" VECFORMULA="[0:((C_MAX_MEM_WIDTH/8)-1)]">
2478 <DESCRIPTION>Memory Qualified Write Enable</DESCRIPTION>
2480 <PORT DIR="O" MPD_INDEX="85" NAME="Mem_CE" SIGNAME="__NOC__" VECFORMULA="[0:(C_NUM_BANKS_MEM-1)]">
2481 <DESCRIPTION>Memory Chip Enable Active High</DESCRIPTION>
2483 <PORT DIR="O" MPD_INDEX="87" NAME="Mem_LBON" SIGNAME="__NOC__">
2484 <DESCRIPTION>Memory Linear/Interleaved Burst Order</DESCRIPTION>
2486 <PORT DIR="O" MPD_INDEX="88" NAME="Mem_CKEN" SIGNAME="__NOC__">
2487 <DESCRIPTION>Memory Clock Enable</DESCRIPTION>
2489 <PORT DIR="O" MPD_INDEX="89" NAME="Mem_RNW" SIGNAME="__NOC__">
2490 <DESCRIPTION>Memory Read Not Write</DESCRIPTION>
2492 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
2493 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_VALID="FALSE" MPD_INDEX="1" NAME="MCH0" TYPE="TARGET"/>
2494 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_VALID="FALSE" MPD_INDEX="2" NAME="MCH1" TYPE="TARGET"/>
2495 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_VALID="FALSE" MPD_INDEX="3" NAME="MCH2" TYPE="TARGET"/>
2496 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_VALID="FALSE" MPD_INDEX="4" NAME="MCH3" TYPE="TARGET"/>
2498 <MODULE HWVERSION="3.00.b" INSTANCE="PCIe_Bridge" IPTYPE="PERIPHERAL" MHS_INDEX="11" MODCLASS="PERIPHERAL" MODTYPE="plbv46_pcie">
2499 <DESCRIPTION TYPE="SHORT">PLBv46 IP Interface (IPIF) to LogicCORE PCI Express Bridge</DESCRIPTION>
2500 <DESCRIPTION TYPE="LONG">Bridge between the PLBv46 IPIF and the Xilinx LogiCORE PCI Express Interface core</DESCRIPTION>
2502 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/plbv46_pcie_v3_00_b/doc/plbv46_pcie.pdf" TYPE="IP"/>
2504 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
2505 <PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
2506 <DESCRIPTION>Device Family</DESCRIPTION>
2508 <PARAMETER CHANGEDBY="USER" MPD_INDEX="1" NAME="C_IPIFBAR_NUM" TYPE="INTEGER" VALUE="2">
2509 <DESCRIPTION>Number of IPIF devices</DESCRIPTION>
2511 <PARAMETER MPD_INDEX="2" NAME="C_INCLUDE_BAROFFSET_REG" TYPE="INTEGER" VALUE="0">
2512 <DESCRIPTION>Include Registers for Each IPIF BAR High-order Bits to be Substituted in Translation.</DESCRIPTION>
2514 <PARAMETER MPD_INDEX="3" NAME="C_PCIBAR_NUM" TYPE="INTEGER" VALUE="1">
2515 <DESCRIPTION>Number of PCI Devices</DESCRIPTION>
2517 <PARAMETER MPD_INDEX="4" NAME="C_NO_OF_LANES" TYPE="INTEGER" VALUE="1">
2518 <DESCRIPTION>Number of Lanes</DESCRIPTION>
2520 <PARAMETER CHANGEDBY="USER" MPD_INDEX="5" NAME="C_DEVICE_ID" TYPE="std_logic_vector" VALUE="0x0505">
2521 <DESCRIPTION>PCI Configuration Space Header Device ID</DESCRIPTION>
2523 <PARAMETER CHANGEDBY="USER" MPD_INDEX="6" NAME="C_VENDOR_ID" TYPE="std_logic_vector" VALUE="0x10EE">
2524 <DESCRIPTION>PCI Configuration Space Header Vendor ID</DESCRIPTION>
2526 <PARAMETER CHANGEDBY="USER" MPD_INDEX="7" NAME="C_CLASS_CODE" TYPE="std_logic_vector" VALUE="0x058000">
2527 <DESCRIPTION>PCI Configuration Space Header Class Code</DESCRIPTION>
2529 <PARAMETER MPD_INDEX="8" NAME="C_REV_ID" TYPE="std_logic_vector" VALUE="0x00">
2530 <DESCRIPTION>PCI Configuration Space Header Rev ID</DESCRIPTION>
2532 <PARAMETER MPD_INDEX="9" NAME="C_SUBSYSTEM_ID" TYPE="std_logic_vector" VALUE="0x0000">
2533 <DESCRIPTION>PCI Configuration Space Header Subsystem ID</DESCRIPTION>
2535 <PARAMETER MPD_INDEX="10" NAME="C_SUBSYSTEM_VENDOR_ID" TYPE="std_logic_vector" VALUE="0x0000">
2536 <DESCRIPTION>PCI Configuration Space Header Subsystem Vendor ID</DESCRIPTION>
2538 <PARAMETER CHANGEDBY="USER" MPD_INDEX="11" NAME="C_COMP_TIMEOUT" TYPE="INTEGER" VALUE="1">
2539 <DESCRIPTION>Completion Timeout</DESCRIPTION>
2541 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_SUBFAMILY" TYPE="STRING" VALUE="fx">
2542 <DESCRIPTION>Device Sub Family</DESCRIPTION>
2544 <PARAMETER MPD_INDEX="13" NAME="C_MPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
2545 <DESCRIPTION>Master Address Bus Width</DESCRIPTION>
2547 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="14" NAME="C_MPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
2548 <DESCRIPTION>Master Data Bus Width</DESCRIPTION>
2550 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="15" NAME="C_MPLB_SMALLEST_SLAVE" TYPE="INTEGER" VALUE="128">
2551 <DESCRIPTION>Smallest Master Data Bus Width</DESCRIPTION>
2553 <PARAMETER MPD_INDEX="16" NAME="C_MPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="64">
2554 <DESCRIPTION>Native Data Bus Width of PLB Master</DESCRIPTION>
2556 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
2557 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
2559 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="18" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
2560 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
2562 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="19" NAME="C_SPLB_SMALLEST_MASTER" TYPE="INTEGER" VALUE="128">
2563 <DESCRIPTION>Smallest Master Data Bus Width</DESCRIPTION>
2565 <PARAMETER MPD_INDEX="20" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
2566 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
2568 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="21" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x85c00000">
2569 <DESCRIPTION>Base Address</DESCRIPTION>
2571 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="22" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x85c0ffff">
2572 <DESCRIPTION>High Address</DESCRIPTION>
2574 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="23" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
2575 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
2577 <PARAMETER MPD_INDEX="24" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="64">
2578 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
2580 <PARAMETER MPD_INDEX="25" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
2581 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
2583 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="26" NAME="C_IPIFBAR_0" TYPE="std_logic_vector" VALUE="0xc0000000">
2584 <DESCRIPTION>IPIF BAR0 Base Address</DESCRIPTION>
2586 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="27" NAME="C_IPIFBAR_1" TYPE="std_logic_vector" VALUE="0xe0000000">
2587 <DESCRIPTION>IPIF BAR1 Base Address</DESCRIPTION>
2589 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="28" NAME="C_IPIFBAR_2" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2590 <DESCRIPTION>IPIF BAR2 Base Address</DESCRIPTION>
2592 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="29" NAME="C_IPIFBAR_3" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2593 <DESCRIPTION>IPIF BAR3 Base Address</DESCRIPTION>
2595 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="30" NAME="C_IPIFBAR_4" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2596 <DESCRIPTION>IPIF BAR4 Base Address</DESCRIPTION>
2598 <PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="31" NAME="C_IPIFBAR_5" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2599 <DESCRIPTION>IPIF BAR5 Base Address</DESCRIPTION>
2601 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="32" NAME="C_IPIFBAR_HIGHADDR_0" TYPE="std_logic_vector" VALUE="0xdfffffff">
2602 <DESCRIPTION>IPIF BAR0 High Address</DESCRIPTION>
2604 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="33" NAME="C_IPIFBAR_HIGHADDR_1" TYPE="std_logic_vector" VALUE="0xefffffff">
2605 <DESCRIPTION>IPIF BAR1 High Address</DESCRIPTION>
2607 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="34" NAME="C_IPIFBAR_HIGHADDR_2" TYPE="std_logic_vector" VALUE="0x00000000">
2608 <DESCRIPTION>IPIF BAR2 High Address</DESCRIPTION>
2610 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="35" NAME="C_IPIFBAR_HIGHADDR_3" TYPE="std_logic_vector" VALUE="0x00000000">
2611 <DESCRIPTION>IPIF BAR3 High Address</DESCRIPTION>
2613 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="36" NAME="C_IPIFBAR_HIGHADDR_4" TYPE="std_logic_vector" VALUE="0x00000000">
2614 <DESCRIPTION>IPIF BAR4 High Address</DESCRIPTION>
2616 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="37" NAME="C_IPIFBAR_HIGHADDR_5" TYPE="std_logic_vector" VALUE="0x00000000">
2617 <DESCRIPTION>IPIF BAR5 High Address</DESCRIPTION>
2619 <PARAMETER CHANGEDBY="USER" MPD_INDEX="38" NAME="C_IPIFBAR2PCIBAR_0" TYPE="std_logic_vector" VALUE="0x00000000">
2620 <DESCRIPTION>Remote PCI device BAR to which IPIF BAR0 is translated when configured with FIFOs
2623 <PARAMETER CHANGEDBY="USER" MPD_INDEX="39" NAME="C_IPIFBAR2PCIBAR_1" TYPE="std_logic_vector" VALUE="0x00000000">
2624 <DESCRIPTION>Remote PCI device BAR to which IPIF BAR1 is translated when configured with FIFOs
2627 <PARAMETER MPD_INDEX="40" NAME="C_IPIFBAR2PCIBAR_2" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2628 <DESCRIPTION>Remote PCI device BAR to which IPIF BAR2 is translated when configured with FIFOs
2631 <PARAMETER MPD_INDEX="41" NAME="C_IPIFBAR2PCIBAR_3" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2632 <DESCRIPTION>Remote PCI device BAR to which IPIF BAR3 is translated when configured with FIFOs
2635 <PARAMETER MPD_INDEX="42" NAME="C_IPIFBAR2PCIBAR_4" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2636 <DESCRIPTION>Remote PCI device BAR to which IPIF BAR4 is translated when configured with FIFOs
2639 <PARAMETER MPD_INDEX="43" NAME="C_IPIFBAR2PCIBAR_5" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2640 <DESCRIPTION>Remote PCI device BAR to which IPIF BAR5 is translated when configured with FIFOs
2643 <PARAMETER MPD_INDEX="44" NAME="C_IPIFBAR_AS_0" TYPE="INTEGER" VALUE="0">
2644 <DESCRIPTION>IPIF BAR 0 Address Size</DESCRIPTION>
2646 <PARAMETER MPD_INDEX="45" NAME="C_IPIFBAR_AS_1" TYPE="INTEGER" VALUE="0">
2647 <DESCRIPTION>IPIF BAR 1 Address Size</DESCRIPTION>
2649 <PARAMETER MPD_INDEX="46" NAME="C_IPIFBAR_AS_2" TYPE="INTEGER" VALUE="0">
2650 <DESCRIPTION>IPIF BAR 2 Address Size</DESCRIPTION>
2652 <PARAMETER MPD_INDEX="47" NAME="C_IPIFBAR_AS_3" TYPE="INTEGER" VALUE="0">
2653 <DESCRIPTION>IPIF BAR 3 Address Size</DESCRIPTION>
2655 <PARAMETER MPD_INDEX="48" NAME="C_IPIFBAR_AS_4" TYPE="INTEGER" VALUE="0">
2656 <DESCRIPTION>IPIF BAR 4 Address Size</DESCRIPTION>
2658 <PARAMETER MPD_INDEX="49" NAME="C_IPIFBAR_AS_5" TYPE="INTEGER" VALUE="0">
2659 <DESCRIPTION>IPIF BAR 5 Address Size</DESCRIPTION>
2661 <PARAMETER CHANGEDBY="USER" MPD_INDEX="50" NAME="C_PCIBAR2IPIFBAR_0" TYPE="std_logic_vector" VALUE="0xf8000000">
2662 <DESCRIPTION>Remote PLB device BAR to which PCI BAR0 is translated when configured with FIFOs</DESCRIPTION>
2664 <PARAMETER CHANGEDBY="USER" MPD_INDEX="51" NAME="C_PCIBAR2IPIFBAR_1" TYPE="std_logic_vector" VALUE="0x00000000">
2665 <DESCRIPTION>Remote PLB device BAR to which PCI BAR1 is translated when configured with FIFOs</DESCRIPTION>
2667 <PARAMETER MPD_INDEX="52" NAME="C_PCIBAR2IPIFBAR_2" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
2668 <DESCRIPTION>Remote PLB device BAR to which PCI BAR2 is translated when configured with FIFOs</DESCRIPTION>
2670 <PARAMETER CHANGEDBY="USER" MPD_INDEX="53" NAME="C_PCIBAR_LEN_0" TYPE="INTEGER" VALUE="20">
2671 <DESCRIPTION>Power of 2 defining the Size in Bytes of PCI BAR0 Space</DESCRIPTION>
2673 <PARAMETER CHANGEDBY="USER" MPD_INDEX="54" NAME="C_PCIBAR_LEN_1" TYPE="INTEGER" VALUE="28">
2674 <DESCRIPTION>Power of 2 defining the Size in Bytes of PCI BAR1 Space</DESCRIPTION>
2676 <PARAMETER MPD_INDEX="55" NAME="C_PCIBAR_LEN_2" TYPE="INTEGER" VALUE="16">
2677 <DESCRIPTION>Power of 2 defining the Size in Bytes of PCI BAR2 Space</DESCRIPTION>
2679 <PARAMETER CHANGEDBY="USER" MPD_INDEX="56" NAME="C_BOARD" TYPE="STRING" VALUE="ml507">
2680 <DESCRIPTION>Type of Board</DESCRIPTION>
2682 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_DEVICE" TYPE="STRING" VALUE="5vfx70t">
2683 <DESCRIPTION>Device Name</DESCRIPTION>
2686 <MEMRANGE BASEDECIMAL="2243952640" BASENAME="C_BASEADDR" BASEVALUE="0x85c00000" HIGHDECIMAL="2244018175" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x85c0ffff" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
2688 <BUSINTERFACE NAME="SPLB"/>
2691 <MEMRANGE BASEDECIMAL="3221225472" BASENAME="C_IPIFBAR_0" BASEVALUE="0xc0000000" HIGHDECIMAL="3758096383" HIGHNAME="C_IPIFBAR_HIGHADDR_0" HIGHVALUE="0xdfffffff" MEMTYPE="BRIDGE" SIZE="536870912" SIZEABRV="512M">
2693 <BUSINTERFACE NAME="SPLB"/>
2696 <MEMRANGE BASEDECIMAL="3758096384" BASENAME="C_IPIFBAR_1" BASEVALUE="0xe0000000" HIGHDECIMAL="4026531839" HIGHNAME="C_IPIFBAR_HIGHADDR_1" HIGHVALUE="0xefffffff" MEMTYPE="BRIDGE" SIZE="268435456" SIZEABRV="256M">
2698 <BUSINTERFACE NAME="SPLB"/>
2701 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_IPIFBAR_2" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_IPIFBAR_HIGHADDR_2" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" SIZE="0" SIZEABRV="U">
2703 <BUSINTERFACE NAME="SPLB"/>
2706 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_IPIFBAR_3" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_IPIFBAR_HIGHADDR_3" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" SIZE="0" SIZEABRV="U">
2708 <BUSINTERFACE NAME="SPLB"/>
2711 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_IPIFBAR_4" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_IPIFBAR_HIGHADDR_4" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" SIZE="0" SIZEABRV="U">
2713 <BUSINTERFACE NAME="SPLB"/>
2716 <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_IPIFBAR_5" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_IPIFBAR_HIGHADDR_5" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" SIZE="0" SIZEABRV="U">
2718 <BUSINTERFACE NAME="SPLB"/>
2722 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="74" NAME="PERSTN" SIGNAME="net_vcc"/>
2723 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="75" NAME="REFCLK" SIGNAME="PCIe_Diff_Clk"/>
2724 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="78" NAME="RXN" SIGNAME="fpga_0_PCIe_Bridge_RXN_pin" VECFORMULA="[(C_NO_OF_LANES-1):0]"/>
2725 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="79" NAME="RXP" SIGNAME="fpga_0_PCIe_Bridge_RXP_pin" VECFORMULA="[(C_NO_OF_LANES-1):0]"/>
2726 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="80" NAME="TXN" SIGNAME="fpga_0_PCIe_Bridge_TXN_pin" VECFORMULA="[(C_NO_OF_LANES-1):0]"/>
2727 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="81" NAME="TXP" SIGNAME="fpga_0_PCIe_Bridge_TXP_pin" VECFORMULA="[(C_NO_OF_LANES-1):0]"/>
2728 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="83" NAME="MSI_request" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="net_gnd"/>
2729 <PORT BUS="MPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="MPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
2730 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_MPLB_Rst" DIR="I" MPD_INDEX="1" NAME="MPLB_Rst" SIGIS="RST" SIGNAME="ppc440_0_SPLB0_MPLB_Rst"/>
2731 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MTimeout" DIR="I" MPD_INDEX="2" NAME="PLB_MTimeout" SIGNAME="ppc440_0_SPLB0_PLB_MTimeout"/>
2732 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MIRQ" DIR="I" MPD_INDEX="3" NAME="PLB_MIRQ" SIGNAME="ppc440_0_SPLB0_PLB_MIRQ"/>
2733 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MAddrAck" DIR="I" MPD_INDEX="4" NAME="PLB_MAddrAck" SIGNAME="ppc440_0_SPLB0_PLB_MAddrAck"/>
2734 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MSSize" DIR="I" MPD_INDEX="5" NAME="PLB_MSSize" SIGNAME="ppc440_0_SPLB0_PLB_MSSize" VECFORMULA="[0:1]"/>
2735 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRearbitrate" DIR="I" MPD_INDEX="6" NAME="PLB_MRearbitrate" SIGNAME="ppc440_0_SPLB0_PLB_MRearbitrate"/>
2736 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MBusy" DIR="I" MPD_INDEX="7" NAME="PLB_MBusy" SIGNAME="ppc440_0_SPLB0_PLB_MBusy"/>
2737 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdErr" DIR="I" MPD_INDEX="8" NAME="PLB_MRdErr" SIGNAME="ppc440_0_SPLB0_PLB_MRdErr"/>
2738 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MWrErr" DIR="I" MPD_INDEX="9" NAME="PLB_MWrErr" SIGNAME="ppc440_0_SPLB0_PLB_MWrErr"/>
2739 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MWrDAck" DIR="I" MPD_INDEX="10" NAME="PLB_MWrDAck" SIGNAME="ppc440_0_SPLB0_PLB_MWrDAck"/>
2740 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdDBus" DIR="I" MPD_INDEX="11" NAME="PLB_MRdDBus" SIGNAME="ppc440_0_SPLB0_PLB_MRdDBus" VECFORMULA="[0:(C_MPLB_DWIDTH-1)]"/>
2741 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdWdAddr" DIR="I" MPD_INDEX="12" NAME="PLB_MRdWdAddr" SIGNAME="ppc440_0_SPLB0_PLB_MRdWdAddr" VECFORMULA="[0:3]"/>
2742 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdDAck" DIR="I" MPD_INDEX="13" NAME="PLB_MRdDAck" SIGNAME="ppc440_0_SPLB0_PLB_MRdDAck"/>
2743 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdBTerm" DIR="I" MPD_INDEX="14" NAME="PLB_MRdBTerm" SIGNAME="ppc440_0_SPLB0_PLB_MRdBTerm"/>
2744 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MWrBTerm" DIR="I" MPD_INDEX="15" NAME="PLB_MWrBTerm" SIGNAME="ppc440_0_SPLB0_PLB_MWrBTerm"/>
2745 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_request" DIR="O" MPD_INDEX="16" NAME="M_request" SIGNAME="ppc440_0_SPLB0_M_request"/>
2746 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_priority" DIR="O" MPD_INDEX="17" NAME="M_priority" SIGNAME="ppc440_0_SPLB0_M_priority" VECFORMULA="[0:1]"/>
2747 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_busLock" DIR="O" MPD_INDEX="18" NAME="M_buslock" SIGNAME="ppc440_0_SPLB0_M_busLock"/>
2748 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_RNW" DIR="O" MPD_INDEX="19" NAME="M_RNW" SIGNAME="ppc440_0_SPLB0_M_RNW"/>
2749 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_BE" DIR="O" MPD_INDEX="20" NAME="M_BE" SIGNAME="ppc440_0_SPLB0_M_BE" VECFORMULA="[0:((C_MPLB_DWIDTH/8)-1)]"/>
2750 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_MSize" DIR="O" MPD_INDEX="21" NAME="M_MSize" SIGNAME="ppc440_0_SPLB0_M_MSize" VECFORMULA="[0:1]"/>
2751 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_size" DIR="O" MPD_INDEX="22" NAME="M_size" SIGNAME="ppc440_0_SPLB0_M_size" VECFORMULA="[0:3]"/>
2752 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_type" DIR="O" MPD_INDEX="23" NAME="M_type" SIGNAME="ppc440_0_SPLB0_M_type" VECFORMULA="[0:2]"/>
2753 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_lockErr" DIR="O" MPD_INDEX="24" NAME="M_lockErr" SIGNAME="ppc440_0_SPLB0_M_lockErr"/>
2754 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_abort" DIR="O" MPD_INDEX="25" NAME="M_abort" SIGNAME="ppc440_0_SPLB0_M_abort"/>
2755 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_TAttribute" DIR="O" MPD_INDEX="26" NAME="M_TAttribute" SIGNAME="ppc440_0_SPLB0_M_TAttribute" VECFORMULA="[0:15]"/>
2756 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_UABus" DIR="O" MPD_INDEX="27" NAME="M_UABus" SIGNAME="ppc440_0_SPLB0_M_UABus" VECFORMULA="[0:31]"/>
2757 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_ABus" DIR="O" MPD_INDEX="28" NAME="M_ABus" SIGNAME="ppc440_0_SPLB0_M_ABus" VECFORMULA="[0:(C_MPLB_AWIDTH-1)]"/>
2758 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_wrDBus" DIR="O" MPD_INDEX="29" NAME="M_wrDBus" SIGNAME="ppc440_0_SPLB0_M_wrDBus" VECFORMULA="[0:(C_MPLB_DWIDTH-1)]"/>
2759 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_wrBurst" DIR="O" MPD_INDEX="30" NAME="M_wrBurst" SIGNAME="ppc440_0_SPLB0_M_wrBurst"/>
2760 <PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_rdBurst" DIR="O" MPD_INDEX="31" NAME="M_rdBurst" SIGNAME="ppc440_0_SPLB0_M_rdBurst"/>
2761 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="32" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
2762 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="33" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
2763 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="34" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
2764 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="35" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
2765 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="36" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
2766 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="37" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
2767 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="38" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
2768 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="39" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
2769 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="40" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
2770 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="41" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
2771 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="42" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
2772 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="43" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
2773 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="44" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
2774 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="45" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
2775 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="46" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
2776 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="47" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
2777 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="48" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
2778 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="49" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
2779 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="50" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
2780 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="51" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
2781 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="52" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
2782 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="53" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
2783 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="54" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
2784 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="55" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
2785 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="56" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
2786 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="57" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
2787 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="58" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
2788 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="59" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
2789 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="60" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
2790 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="61" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
2791 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="62" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
2792 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="63" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
2793 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="64" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
2794 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="65" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
2795 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="66" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
2796 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="67" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
2797 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="68" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
2798 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="69" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
2799 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="70" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2800 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="71" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2801 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="72" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2802 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="73" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
2803 <PORT DIR="O" MPD_INDEX="76" NAME="Bridge_Clk" SIGNAME="__NOC__"/>
2804 <PORT DIR="O" MPD_INDEX="77" NAME="LinkUp" SIGNAME="__NOC__"/>
2805 <PORT DIR="O" MPD_INDEX="82" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
2806 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
2807 <BUSINTERFACE BUSNAME="ppc440_0_SPLB0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="1" NAME="MPLB" TYPE="MASTER"/>
2809 <MODULE BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" HWVERSION="1.04.a" INSTANCE="ppc440_0_SPLB0" IPTYPE="BUS" MHS_INDEX="12" MODCLASS="BUS" MODTYPE="plb_v46">
2810 <DESCRIPTION TYPE="SHORT">Processor Local Bus (PLB) 4.6</DESCRIPTION>
2811 <DESCRIPTION TYPE="LONG">'Xilinx 64-bit Processor Local Bus (PLB) consists of a bus control unit, a watchdog timer, and separate address, write, and read data path units with a a three-cycle only arbitration feature'</DESCRIPTION>
2813 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v46_v1_04_a/doc/plb_v46.pdf" TYPE="IP"/>
2815 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
2816 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_PLBV46_NUM_MASTERS" TYPE="integer" VALUE="1">
2817 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
2819 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_PLBV46_NUM_SLAVES" TYPE="integer" VALUE="1">
2820 <DESCRIPTION>Number of PLB Slaves</DESCRIPTION>
2822 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_PLBV46_MID_WIDTH" TYPE="integer" VALUE="1">
2823 <DESCRIPTION>PLB Master ID Bus Width</DESCRIPTION>
2825 <PARAMETER MPD_INDEX="3" NAME="C_PLBV46_AWIDTH" TYPE="integer" VALUE="32">
2826 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
2828 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_PLBV46_DWIDTH" TYPE="integer" VALUE="128">
2829 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
2831 <PARAMETER MPD_INDEX="5" NAME="C_DCR_INTFCE" TYPE="integer" VALUE="0">
2832 <DESCRIPTION>Include DCR Interface and Error Registers</DESCRIPTION>
2834 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="6" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0b1111111111">
2835 <DESCRIPTION>Base Address</DESCRIPTION>
2837 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="7" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0b0000000000">
2838 <DESCRIPTION>High Address</DESCRIPTION>
2840 <PARAMETER MPD_INDEX="8" NAME="C_DCR_AWIDTH" TYPE="integer" VALUE="10">
2841 <DESCRIPTION>DCR Address Bus Width</DESCRIPTION>
2843 <PARAMETER MPD_INDEX="9" NAME="C_DCR_DWIDTH" TYPE="integer" VALUE="32">
2844 <DESCRIPTION>DCR Data Bus Width</DESCRIPTION>
2846 <PARAMETER MPD_INDEX="10" NAME="C_EXT_RESET_HIGH" TYPE="integer" VALUE="1">
2847 <DESCRIPTION>External Reset Active High </DESCRIPTION>
2849 <PARAMETER MPD_INDEX="11" NAME="C_IRQ_ACTIVE" TYPE="std_logic" VALUE="1">
2850 <DESCRIPTION>IRQ Active State </DESCRIPTION>
2852 <PARAMETER MPD_INDEX="12" NAME="C_NUM_CLK_PLB2OPB_REARB" TYPE="integer" VALUE="5">
2853 <DESCRIPTION><qt>Number of PLB Clock Periods a PLB Master that Received a Rearbitrate from an OPB2PLB Bridge on a Read Operation is Denied Grant on the PLB Bus</qt></DESCRIPTION>
2855 <PARAMETER MPD_INDEX="13" NAME="C_ADDR_PIPELINING_TYPE" TYPE="integer" VALUE="1">
2856 <DESCRIPTION>Enable Address Pipelining Type</DESCRIPTION>
2858 <PARAMETER MPD_INDEX="14" NAME="C_FAMILY" TYPE="string" VALUE="virtex5">
2859 <DESCRIPTION>Device Family</DESCRIPTION>
2861 <PARAMETER MPD_INDEX="15" NAME="C_P2P" TYPE="integer" VALUE="0">
2862 <DESCRIPTION>Optimize PLB for Point-to-point Topology</DESCRIPTION>
2864 <PARAMETER MPD_INDEX="16" NAME="C_ARB_TYPE" TYPE="integer" VALUE="0">
2865 <DESCRIPTION>Selects the Arbitration Scheme</DESCRIPTION>
2868 <MEMRANGE BASEDECIMAL="1023" BASENAME="C_BASEADDR" BASEVALUE="0b1111111111" HIGHDECIMAL="0" HIGHNAME="C_HIGHADDR" HIGHVALUE="0b0000000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x08" SIZE="0" SIZEABRV="U">
2870 <BUSINTERFACE NAME="SDCR"/>
2874 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="PLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
2875 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="SYS_Rst" SIGIS="RST" SIGNAME="sys_bus_reset"/>
2876 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_Rst" DIR="O" MPD_INDEX="2" NAME="PLB_Rst" SIGIS="RST" SIGNAME="ppc440_0_splb0_PLB_Rst"/>
2877 <PORT DEF_SIGNAME="ppc440_0_splb0_SPLB_Rst" DIR="O" MPD_INDEX="3" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="ppc440_0_splb0_SPLB_Rst" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2878 <PORT DEF_SIGNAME="ppc440_0_splb0_MPLB_Rst" DIR="O" MPD_INDEX="4" NAME="MPLB_Rst" SIGIS="RST" SIGNAME="ppc440_0_splb0_MPLB_Rst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2879 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="5" NAME="PLB_dcrAck" SIGNAME="__NOC__"/>
2880 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="6" NAME="PLB_dcrDBus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_DWIDTH-1]"/>
2881 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="DCR_ABus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_AWIDTH-1]"/>
2882 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="DCR_DBus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_DWIDTH-1]"/>
2883 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="DCR_Read" SIGNAME="__NOC__"/>
2884 <PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="10" NAME="DCR_Write" SIGNAME="__NOC__"/>
2885 <PORT DEF_SIGNAME="ppc440_0_splb0_M_ABus" DIR="I" MPD_INDEX="11" NAME="M_ABus" SIGNAME="ppc440_0_splb0_M_ABus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*32)-1]"/>
2886 <PORT DEF_SIGNAME="ppc440_0_splb0_M_UABus" DIR="I" MPD_INDEX="12" NAME="M_UABus" SIGNAME="ppc440_0_splb0_M_UABus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*32)-1]"/>
2887 <PORT DEF_SIGNAME="ppc440_0_splb0_M_BE" DIR="I" MPD_INDEX="13" NAME="M_BE" SIGNAME="ppc440_0_splb0_M_BE" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*(C_PLBV46_DWIDTH/8))-1]"/>
2888 <PORT DEF_SIGNAME="ppc440_0_splb0_M_RNW" DIR="I" MPD_INDEX="14" NAME="M_RNW" SIGNAME="ppc440_0_splb0_M_RNW" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2889 <PORT DEF_SIGNAME="ppc440_0_splb0_M_abort" DIR="I" MPD_INDEX="15" NAME="M_abort" SIGNAME="ppc440_0_splb0_M_abort" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2890 <PORT DEF_SIGNAME="ppc440_0_splb0_M_busLock" DIR="I" MPD_INDEX="16" NAME="M_busLock" SIGNAME="ppc440_0_splb0_M_busLock" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2891 <PORT DEF_SIGNAME="ppc440_0_splb0_M_TAttribute" DIR="I" MPD_INDEX="17" NAME="M_TAttribute" SIGNAME="ppc440_0_splb0_M_TAttribute" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*16)-1]"/>
2892 <PORT DEF_SIGNAME="ppc440_0_splb0_M_lockErr" DIR="I" MPD_INDEX="18" NAME="M_lockErr" SIGNAME="ppc440_0_splb0_M_lockErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2893 <PORT DEF_SIGNAME="ppc440_0_splb0_M_MSize" DIR="I" MPD_INDEX="19" NAME="M_MSize" SIGNAME="ppc440_0_splb0_M_MSize" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
2894 <PORT DEF_SIGNAME="ppc440_0_splb0_M_priority" DIR="I" MPD_INDEX="20" NAME="M_priority" SIGNAME="ppc440_0_splb0_M_priority" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
2895 <PORT DEF_SIGNAME="ppc440_0_splb0_M_rdBurst" DIR="I" MPD_INDEX="21" NAME="M_rdBurst" SIGNAME="ppc440_0_splb0_M_rdBurst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2896 <PORT DEF_SIGNAME="ppc440_0_splb0_M_request" DIR="I" MPD_INDEX="22" NAME="M_request" SIGNAME="ppc440_0_splb0_M_request" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2897 <PORT DEF_SIGNAME="ppc440_0_splb0_M_size" DIR="I" MPD_INDEX="23" NAME="M_size" SIGNAME="ppc440_0_splb0_M_size" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*4)-1]"/>
2898 <PORT DEF_SIGNAME="ppc440_0_splb0_M_type" DIR="I" MPD_INDEX="24" NAME="M_type" SIGNAME="ppc440_0_splb0_M_type" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*3)-1]"/>
2899 <PORT DEF_SIGNAME="ppc440_0_splb0_M_wrBurst" DIR="I" MPD_INDEX="25" NAME="M_wrBurst" SIGNAME="ppc440_0_splb0_M_wrBurst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2900 <PORT DEF_SIGNAME="ppc440_0_splb0_M_wrDBus" DIR="I" MPD_INDEX="26" NAME="M_wrDBus" SIGNAME="ppc440_0_splb0_M_wrDBus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*C_PLBV46_DWIDTH)-1]"/>
2901 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_addrAck" DIR="I" MPD_INDEX="27" NAME="Sl_addrAck" SIGNAME="ppc440_0_splb0_Sl_addrAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2902 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_MRdErr" DIR="I" MPD_INDEX="28" NAME="Sl_MRdErr" SIGNAME="ppc440_0_splb0_Sl_MRdErr" VECFORMULA="[0:(C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS)-1]"/>
2903 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_MWrErr" DIR="I" MPD_INDEX="29" NAME="Sl_MWrErr" SIGNAME="ppc440_0_splb0_Sl_MWrErr" VECFORMULA="[0:(C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS)-1]"/>
2904 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_MBusy" DIR="I" MPD_INDEX="30" NAME="Sl_MBusy" SIGNAME="ppc440_0_splb0_Sl_MBusy" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS - 1 ]"/>
2905 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdBTerm" DIR="I" MPD_INDEX="31" NAME="Sl_rdBTerm" SIGNAME="ppc440_0_splb0_Sl_rdBTerm" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2906 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdComp" DIR="I" MPD_INDEX="32" NAME="Sl_rdComp" SIGNAME="ppc440_0_splb0_Sl_rdComp" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2907 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdDAck" DIR="I" MPD_INDEX="33" NAME="Sl_rdDAck" SIGNAME="ppc440_0_splb0_Sl_rdDAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2908 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdDBus" DIR="I" MPD_INDEX="34" NAME="Sl_rdDBus" SIGNAME="ppc440_0_splb0_Sl_rdDBus" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_DWIDTH-1]"/>
2909 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdWdAddr" DIR="I" MPD_INDEX="35" NAME="Sl_rdWdAddr" SIGNAME="ppc440_0_splb0_Sl_rdWdAddr" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*4-1]"/>
2910 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rearbitrate" DIR="I" MPD_INDEX="36" NAME="Sl_rearbitrate" SIGNAME="ppc440_0_splb0_Sl_rearbitrate" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2911 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_SSize" DIR="I" MPD_INDEX="37" NAME="Sl_SSize" SIGNAME="ppc440_0_splb0_Sl_SSize" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*2-1]"/>
2912 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_wait" DIR="I" MPD_INDEX="38" NAME="Sl_wait" SIGNAME="ppc440_0_splb0_Sl_wait" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2913 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_wrBTerm" DIR="I" MPD_INDEX="39" NAME="Sl_wrBTerm" SIGNAME="ppc440_0_splb0_Sl_wrBTerm" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2914 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_wrComp" DIR="I" MPD_INDEX="40" NAME="Sl_wrComp" SIGNAME="ppc440_0_splb0_Sl_wrComp" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2915 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_wrDAck" DIR="I" MPD_INDEX="41" NAME="Sl_wrDAck" SIGNAME="ppc440_0_splb0_Sl_wrDAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2916 <PORT DEF_SIGNAME="ppc440_0_splb0_Sl_MIRQ" DIR="I" MPD_INDEX="42" NAME="Sl_MIRQ" SIGNAME="ppc440_0_splb0_Sl_MIRQ" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS-1]"/>
2917 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MIRQ" DIR="O" MPD_INDEX="43" NAME="PLB_MIRQ" SIGNAME="ppc440_0_splb0_PLB_MIRQ" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2918 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_ABus" DIR="O" MPD_INDEX="44" NAME="PLB_ABus" SIGNAME="ppc440_0_splb0_PLB_ABus" VECFORMULA="[0:31]"/>
2919 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_UABus" DIR="O" MPD_INDEX="45" NAME="PLB_UABus" SIGNAME="ppc440_0_splb0_PLB_UABus" VECFORMULA="[0:31]"/>
2920 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_BE" DIR="O" MPD_INDEX="46" NAME="PLB_BE" SIGNAME="ppc440_0_splb0_PLB_BE" VECFORMULA="[0:(C_PLBV46_DWIDTH/8)-1]"/>
2921 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MAddrAck" DIR="O" MPD_INDEX="47" NAME="PLB_MAddrAck" SIGNAME="ppc440_0_splb0_PLB_MAddrAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2922 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MTimeout" DIR="O" MPD_INDEX="48" NAME="PLB_MTimeout" SIGNAME="ppc440_0_splb0_PLB_MTimeout" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2923 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MBusy" DIR="O" MPD_INDEX="49" NAME="PLB_MBusy" SIGNAME="ppc440_0_splb0_PLB_MBusy" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2924 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdErr" DIR="O" MPD_INDEX="50" NAME="PLB_MRdErr" SIGNAME="ppc440_0_splb0_PLB_MRdErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2925 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MWrErr" DIR="O" MPD_INDEX="51" NAME="PLB_MWrErr" SIGNAME="ppc440_0_splb0_PLB_MWrErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2926 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdBTerm" DIR="O" MPD_INDEX="52" NAME="PLB_MRdBTerm" SIGNAME="ppc440_0_splb0_PLB_MRdBTerm" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2927 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdDAck" DIR="O" MPD_INDEX="53" NAME="PLB_MRdDAck" SIGNAME="ppc440_0_splb0_PLB_MRdDAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2928 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdDBus" DIR="O" MPD_INDEX="54" NAME="PLB_MRdDBus" SIGNAME="ppc440_0_splb0_PLB_MRdDBus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*C_PLBV46_DWIDTH)-1]"/>
2929 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdWdAddr" DIR="O" MPD_INDEX="55" NAME="PLB_MRdWdAddr" SIGNAME="ppc440_0_splb0_PLB_MRdWdAddr" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*4)-1]"/>
2930 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRearbitrate" DIR="O" MPD_INDEX="56" NAME="PLB_MRearbitrate" SIGNAME="ppc440_0_splb0_PLB_MRearbitrate" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2931 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MWrBTerm" DIR="O" MPD_INDEX="57" NAME="PLB_MWrBTerm" SIGNAME="ppc440_0_splb0_PLB_MWrBTerm" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2932 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MWrDAck" DIR="O" MPD_INDEX="58" NAME="PLB_MWrDAck" SIGNAME="ppc440_0_splb0_PLB_MWrDAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2933 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MSSize" DIR="O" MPD_INDEX="59" NAME="PLB_MSSize" SIGNAME="ppc440_0_splb0_PLB_MSSize" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
2934 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_PAValid" DIR="O" MPD_INDEX="60" NAME="PLB_PAValid" SIGNAME="ppc440_0_splb0_PLB_PAValid"/>
2935 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_RNW" DIR="O" MPD_INDEX="61" NAME="PLB_RNW" SIGNAME="ppc440_0_splb0_PLB_RNW"/>
2936 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SAValid" DIR="O" MPD_INDEX="62" NAME="PLB_SAValid" SIGNAME="ppc440_0_splb0_PLB_SAValid"/>
2937 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_abort" DIR="O" MPD_INDEX="63" NAME="PLB_abort" SIGNAME="ppc440_0_splb0_PLB_abort"/>
2938 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_busLock" DIR="O" MPD_INDEX="64" NAME="PLB_busLock" SIGNAME="ppc440_0_splb0_PLB_busLock"/>
2939 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_TAttribute" DIR="O" MPD_INDEX="65" NAME="PLB_TAttribute" SIGNAME="ppc440_0_splb0_PLB_TAttribute" VECFORMULA="[0:15]"/>
2940 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_lockErr" DIR="O" MPD_INDEX="66" NAME="PLB_lockErr" SIGNAME="ppc440_0_splb0_PLB_lockErr"/>
2941 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_masterID" DIR="O" MPD_INDEX="67" NAME="PLB_masterID" SIGNAME="ppc440_0_splb0_PLB_masterID" VECFORMULA="[0:C_PLBV46_MID_WIDTH-1]"/>
2942 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MSize" DIR="O" MPD_INDEX="68" NAME="PLB_MSize" SIGNAME="ppc440_0_splb0_PLB_MSize" VECFORMULA="[0:1]"/>
2943 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_rdPendPri" DIR="O" MPD_INDEX="69" NAME="PLB_rdPendPri" SIGNAME="ppc440_0_splb0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
2944 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrPendPri" DIR="O" MPD_INDEX="70" NAME="PLB_wrPendPri" SIGNAME="ppc440_0_splb0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
2945 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_rdPendReq" DIR="O" MPD_INDEX="71" NAME="PLB_rdPendReq" SIGNAME="ppc440_0_splb0_PLB_rdPendReq"/>
2946 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrPendReq" DIR="O" MPD_INDEX="72" NAME="PLB_wrPendReq" SIGNAME="ppc440_0_splb0_PLB_wrPendReq"/>
2947 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_rdBurst" DIR="O" MPD_INDEX="73" NAME="PLB_rdBurst" SIGNAME="ppc440_0_splb0_PLB_rdBurst"/>
2948 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_rdPrim" DIR="O" MPD_INDEX="74" NAME="PLB_rdPrim" SIGNAME="ppc440_0_splb0_PLB_rdPrim" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2949 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_reqPri" DIR="O" MPD_INDEX="75" NAME="PLB_reqPri" SIGNAME="ppc440_0_splb0_PLB_reqPri" VECFORMULA="[0:1]"/>
2950 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_size" DIR="O" MPD_INDEX="76" NAME="PLB_size" SIGNAME="ppc440_0_splb0_PLB_size" VECFORMULA="[0:3]"/>
2951 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_type" DIR="O" MPD_INDEX="77" NAME="PLB_type" SIGNAME="ppc440_0_splb0_PLB_type" VECFORMULA="[0:2]"/>
2952 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrBurst" DIR="O" MPD_INDEX="78" NAME="PLB_wrBurst" SIGNAME="ppc440_0_splb0_PLB_wrBurst"/>
2953 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrDBus" DIR="O" MPD_INDEX="79" NAME="PLB_wrDBus" SIGNAME="ppc440_0_splb0_PLB_wrDBus" VECFORMULA="[0:C_PLBV46_DWIDTH-1]"/>
2954 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrPrim" DIR="O" MPD_INDEX="80" NAME="PLB_wrPrim" SIGNAME="ppc440_0_splb0_PLB_wrPrim" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
2955 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SaddrAck" DIR="O" MPD_INDEX="81" NAME="PLB_SaddrAck" SIGNAME="ppc440_0_splb0_PLB_SaddrAck"/>
2956 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SMRdErr" DIR="O" MPD_INDEX="82" NAME="PLB_SMRdErr" SIGNAME="ppc440_0_splb0_PLB_SMRdErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2957 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SMWrErr" DIR="O" MPD_INDEX="83" NAME="PLB_SMWrErr" SIGNAME="ppc440_0_splb0_PLB_SMWrErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2958 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SMBusy" DIR="O" MPD_INDEX="84" NAME="PLB_SMBusy" SIGNAME="ppc440_0_splb0_PLB_SMBusy" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
2959 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdBTerm" DIR="O" MPD_INDEX="85" NAME="PLB_SrdBTerm" SIGNAME="ppc440_0_splb0_PLB_SrdBTerm"/>
2960 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdComp" DIR="O" MPD_INDEX="86" NAME="PLB_SrdComp" SIGNAME="ppc440_0_splb0_PLB_SrdComp"/>
2961 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdDAck" DIR="O" MPD_INDEX="87" NAME="PLB_SrdDAck" SIGNAME="ppc440_0_splb0_PLB_SrdDAck"/>
2962 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdDBus" DIR="O" MPD_INDEX="88" NAME="PLB_SrdDBus" SIGNAME="ppc440_0_splb0_PLB_SrdDBus" VECFORMULA="[0:C_PLBV46_DWIDTH-1]"/>
2963 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdWdAddr" DIR="O" MPD_INDEX="89" NAME="PLB_SrdWdAddr" SIGNAME="ppc440_0_splb0_PLB_SrdWdAddr" VECFORMULA="[0:3]"/>
2964 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_Srearbitrate" DIR="O" MPD_INDEX="90" NAME="PLB_Srearbitrate" SIGNAME="ppc440_0_splb0_PLB_Srearbitrate"/>
2965 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_Sssize" DIR="O" MPD_INDEX="91" NAME="PLB_Sssize" SIGNAME="ppc440_0_splb0_PLB_Sssize" VECFORMULA="[0:1]"/>
2966 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_Swait" DIR="O" MPD_INDEX="92" NAME="PLB_Swait" SIGNAME="ppc440_0_splb0_PLB_Swait"/>
2967 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SwrBTerm" DIR="O" MPD_INDEX="93" NAME="PLB_SwrBTerm" SIGNAME="ppc440_0_splb0_PLB_SwrBTerm"/>
2968 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SwrComp" DIR="O" MPD_INDEX="94" NAME="PLB_SwrComp" SIGNAME="ppc440_0_splb0_PLB_SwrComp"/>
2969 <PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SwrDAck" DIR="O" MPD_INDEX="95" NAME="PLB_SwrDAck" SIGNAME="ppc440_0_splb0_PLB_SwrDAck"/>
2970 <PORT DIR="O" MPD_INDEX="96" NAME="Bus_Error_Det" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
2971 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" IS_VALID="FALSE" MPD_INDEX="0" NAME="SDCR" TYPE="SLAVE"/>
2973 <MODULE HWVERSION="2.01.a" INSTANCE="Ethernet_MAC" IPTYPE="PERIPHERAL" MHS_INDEX="13" MODCLASS="PERIPHERAL" MODTYPE="xps_ethernetlite">
2974 <DESCRIPTION TYPE="SHORT">XPS 10/100 Ethernet MAC Lite</DESCRIPTION>
2975 <DESCRIPTION TYPE="LONG">'IEEE Std. 802.3 MII interface MAC with PLBV46 interface, lightweight implementation'</DESCRIPTION>
2977 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_ethernetlite_v2_01_a/doc/xps_ethernetlite.pdf" TYPE="IP"/>
2979 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
2980 <PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
2981 <DESCRIPTION>Device Family</DESCRIPTION>
2983 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x81000000">
2984 <DESCRIPTION>Base Address</DESCRIPTION>
2986 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x8100ffff">
2987 <DESCRIPTION>High Address</DESCRIPTION>
2989 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_CLK_PERIOD_PS" TYPE="INTEGER" VALUE="8000">
2990 <DESCRIPTION>Clock Period of PLB Slave</DESCRIPTION>
2992 <PARAMETER MPD_INDEX="4" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
2993 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
2995 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
2996 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
2998 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
2999 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
3001 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
3002 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
3004 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
3005 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
3007 <PARAMETER MPD_INDEX="9" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
3008 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
3010 <PARAMETER MPD_INDEX="10" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
3011 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
3013 <PARAMETER MPD_INDEX="11" NAME="C_DUPLEX" TYPE="INTEGER" VALUE="1">
3014 <DESCRIPTION>Duplex Mode </DESCRIPTION>
3016 <PARAMETER MPD_INDEX="12" NAME="C_TX_PING_PONG" TYPE="INTEGER" VALUE="0">
3017 <DESCRIPTION>Include Second Transmitter Buffer </DESCRIPTION>
3019 <PARAMETER MPD_INDEX="13" NAME="C_RX_PING_PONG" TYPE="INTEGER" VALUE="0">
3020 <DESCRIPTION>Include Second Receiver Buffer </DESCRIPTION>
3023 <MEMRANGE BASEDECIMAL="2164260864" BASENAME="C_BASEADDR" BASEVALUE="0x81000000" HIGHDECIMAL="2164326399" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8100ffff" MEMTYPE="REGISTER" MINSIZE="0x02000" SIZE="65536" SIZEABRV="64K">
3025 <BUSINTERFACE NAME="SPLB"/>
3029 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="PHY_tx_clk" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_clk_pin">
3030 <DESCRIPTION>Ethernet Transmit Clock Input</DESCRIPTION>
3032 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="PHY_rx_clk" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_clk_pin">
3033 <DESCRIPTION>Ethernet Receive Clock Input</DESCRIPTION>
3035 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="PHY_crs" SIGNAME="fpga_0_Ethernet_MAC_PHY_crs_pin">
3036 <DESCRIPTION>Ethernet Carrier Sense Input</DESCRIPTION>
3038 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="PHY_dv" SIGNAME="fpga_0_Ethernet_MAC_PHY_dv_pin">
3039 <DESCRIPTION>Ethernet Receive Data Valid</DESCRIPTION>
3041 <PORT DIR="I" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="4" MPD_INDEX="4" MSB="3" NAME="PHY_rx_data" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_data_pin" VECFORMULA="[3:0]">
3042 <DESCRIPTION>Ethernet Receive Data Input</DESCRIPTION>
3044 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="5" NAME="PHY_col" SIGNAME="fpga_0_Ethernet_MAC_PHY_col_pin">
3045 <DESCRIPTION>Ethernet Collision Input</DESCRIPTION>
3047 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="6" NAME="PHY_rx_er" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_er_pin">
3048 <DESCRIPTION>Ethernet Receive Error Input</DESCRIPTION>
3050 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="7" MPD_INDEX="7" NAME="PHY_rst_n" SIGNAME="fpga_0_Ethernet_MAC_PHY_rst_n_pin">
3051 <DESCRIPTION>Ethernet PHY Reset</DESCRIPTION>
3053 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="8" MPD_INDEX="8" NAME="PHY_tx_en" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_en_pin">
3054 <DESCRIPTION>Ethernet Transmit Enable</DESCRIPTION>
3056 <PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="9" MPD_INDEX="9" MSB="3" NAME="PHY_tx_data" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_data_pin" VECFORMULA="[3:0]">
3057 <DESCRIPTION>Ethernet Transmit Data Output</DESCRIPTION>
3059 <PORT DIR="O" MPD_INDEX="10" NAME="IP2INTC_Irpt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
3060 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="11" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
3061 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="12" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
3062 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="13" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:(C_SPLB_AWIDTH-1)]"/>
3063 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="14" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
3064 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="15" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
3065 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="16" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
3066 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="17" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
3067 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="18" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
3068 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="19" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
3069 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="20" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
3070 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="21" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
3071 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="22" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
3072 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="23" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
3073 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="24" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
3074 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="25" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
3075 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="26" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
3076 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="27" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
3077 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="28" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
3078 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="29" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
3079 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="30" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
3080 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="31" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
3081 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="32" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
3082 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="33" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
3083 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="34" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
3084 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="35" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
3085 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="36" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
3086 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="37" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
3087 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="38" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
3088 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="39" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
3089 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="40" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
3090 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="41" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
3091 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="42" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
3092 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="43" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
3093 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="44" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
3094 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="45" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
3095 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="46" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
3096 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="47" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
3097 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="48" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
3098 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="49" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
3099 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="50" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
3100 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="51" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
3101 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="52" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
3102 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
3104 <MODULE HWVERSION="2.00.b" INSTANCE="DDR2_SDRAM" IPTYPE="PERIPHERAL" MHS_INDEX="14" MODCLASS="MEMORY_CNTLR" MODTYPE="ppc440mc_ddr2">
3105 <DESCRIPTION TYPE="SHORT">PowerPC 440 DDR2 Memory Controller</DESCRIPTION>
3106 <DESCRIPTION TYPE="LONG">A wrapper to instantiate the PowerPC 440 DDR2 Memory Controller</DESCRIPTION>
3108 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/ppc440mc_ddr2_v2_00_b/doc/ppc440mc_ddr2.pdf" TYPE="IP"/>
3110 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
3111 <PARAMETER MPD_INDEX="0" NAME="C_DDR_BAWIDTH" TYPE="integer" VALUE="2">
3112 <DESCRIPTION>Bank Address Width of DDR Memory </DESCRIPTION>
3114 <PARAMETER CHANGEDBY="USER" MPD_INDEX="1" NAME="C_NUM_CLK_PAIRS" TYPE="integer" VALUE="2">
3115 <DESCRIPTION>Number of Generated DDR Clock Pairs.</DESCRIPTION>
3117 <PARAMETER MPD_INDEX="2" NAME="C_DDR_DWIDTH" TYPE="integer" VALUE="64">
3118 <DESCRIPTION>Data Bus Width of DDR </DESCRIPTION>
3120 <PARAMETER MPD_INDEX="3" NAME="C_DDR_CAWIDTH" TYPE="integer" VALUE="10">
3121 <DESCRIPTION>Column Address Width of DDR Memory </DESCRIPTION>
3123 <PARAMETER MPD_INDEX="4" NAME="C_NUM_RANKS_MEM" TYPE="integer" VALUE="1">
3124 <DESCRIPTION>Number of DDR2 Memory Ranks</DESCRIPTION>
3126 <PARAMETER MPD_INDEX="5" NAME="C_CS_BITS" TYPE="integer" VALUE="0">
3127 <DESCRIPTION>Number of Chip Select in DDR2 Memory Rank (a.k.a log2C_NUM_RANKS_MEM)</DESCRIPTION>
3129 <PARAMETER MPD_INDEX="6" NAME="C_DDR_DM_WIDTH" TYPE="integer" VALUE="8">
3130 <DESCRIPTION>DDR2 Data Mask Width</DESCRIPTION>
3132 <PARAMETER CHANGEDBY="USER" MPD_INDEX="7" NAME="C_DQ_BITS" TYPE="integer" VALUE="8">
3133 <DESCRIPTION>C_DQ_BITS</DESCRIPTION>
3135 <PARAMETER CHANGEDBY="USER" MPD_INDEX="8" NAME="C_DDR2_ODT_WIDTH" TYPE="integer" VALUE="2">
3136 <DESCRIPTION>DDR2 On Die Termination Width</DESCRIPTION>
3138 <PARAMETER MPD_INDEX="9" NAME="C_DDR2_ADDT_LAT" TYPE="integer" VALUE="0">
3139 <DESCRIPTION>Additive Latency of DDR2 Memory </DESCRIPTION>
3141 <PARAMETER MPD_INDEX="10" NAME="C_INCLUDE_ECC_SUPPORT" TYPE="integer" VALUE="0">
3142 <DESCRIPTION>Support ECC Logic </DESCRIPTION>
3144 <PARAMETER MPD_INDEX="11" NAME="C_DDR2_ODT_SETTING" TYPE="integer" VALUE="1">
3145 <DESCRIPTION>Setting for On Die Termination</DESCRIPTION>
3147 <PARAMETER MPD_INDEX="12" NAME="C_DQS_BITS" TYPE="integer" VALUE="3">
3148 <DESCRIPTION>DQS Bit Width</DESCRIPTION>
3150 <PARAMETER MPD_INDEX="13" NAME="C_DDR_DQS_WIDTH" TYPE="integer" VALUE="8">
3151 <DESCRIPTION>DDR2 Strobe Width</DESCRIPTION>
3153 <PARAMETER CHANGEDBY="USER" MPD_INDEX="14" NAME="C_DDR_RAWIDTH" TYPE="integer" VALUE="13">
3154 <DESCRIPTION>Row Address Width of DDR Memory </DESCRIPTION>
3156 <PARAMETER MPD_INDEX="15" NAME="C_DDR_BURST_LENGTH" TYPE="integer" VALUE="4">
3157 <DESCRIPTION>Burst Length of DDR Memory</DESCRIPTION>
3159 <PARAMETER CHANGEDBY="USER" MPD_INDEX="16" NAME="C_DDR_CAS_LAT" TYPE="integer" VALUE="4">
3160 <DESCRIPTION>CAS Latency of DDR Memory </DESCRIPTION>
3162 <PARAMETER MPD_INDEX="17" NAME="C_REG_DIMM" TYPE="integer" VALUE="0">
3163 <DESCRIPTION>Include Support for Registered DIMMs.</DESCRIPTION>
3165 <PARAMETER CHANGEDBY="USER" MPD_INDEX="18" NAME="C_MIB_MC_CLOCK_RATIO" TYPE="integer" VALUE="1">
3166 <DESCRIPTION>Clock Ratio between CPMINTERCONNECTCLK to DDR2 Clock</DESCRIPTION>
3168 <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="19" NAME="C_MEM_BASEADDR" VALUE="0x00000000">
3169 <DESCRIPTION>Memory Base Address </DESCRIPTION>
3171 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="20" NAME="C_MEM_HIGHADDR" VALUE="0x0fffffff">
3172 <DESCRIPTION>Memory High Address </DESCRIPTION>
3174 <PARAMETER CHANGEDBY="USER" MPD_INDEX="21" NAME="C_DDR_TREFI" TYPE="integer" VALUE="3900">
3175 <DESCRIPTION>TREFI of DDR </DESCRIPTION>
3177 <PARAMETER MPD_INDEX="22" NAME="C_DDR_TRAS" TYPE="integer" VALUE="40000">
3178 <DESCRIPTION>TRAS of DDR </DESCRIPTION>
3180 <PARAMETER MPD_INDEX="23" NAME="C_DDR_TRCD" TYPE="integer" VALUE="15000">
3181 <DESCRIPTION>TRCD of DDR </DESCRIPTION>
3183 <PARAMETER CHANGEDBY="USER" MPD_INDEX="24" NAME="C_DDR_TRFC" TYPE="integer" VALUE="75000">
3184 <DESCRIPTION>TRFC of DDR </DESCRIPTION>
3186 <PARAMETER MPD_INDEX="25" NAME="C_DDR_TRP" TYPE="integer" VALUE="15000">
3187 <DESCRIPTION>TRP of DDR </DESCRIPTION>
3189 <PARAMETER MPD_INDEX="26" NAME="C_DDR_TRTP" TYPE="integer" VALUE="7500">
3190 <DESCRIPTION>TRTP of DDR </DESCRIPTION>
3192 <PARAMETER MPD_INDEX="27" NAME="C_DDR_TWR" TYPE="integer" VALUE="15000">
3193 <DESCRIPTION>TWR of DDR </DESCRIPTION>
3195 <PARAMETER CHANGEDBY="USER" MPD_INDEX="28" NAME="C_DDR_TWTR" TYPE="integer" VALUE="7500">
3196 <DESCRIPTION>TWTR of DDR </DESCRIPTION>
3198 <PARAMETER CHANGEDBY="USER" MPD_INDEX="29" NAME="C_MC_MIBCLK_PERIOD_PS" TYPE="integer" VALUE="8000">
3199 <DESCRIPTION>Clock Period(ps) of MIB Clock</DESCRIPTION>
3201 <PARAMETER MPD_INDEX="30" NAME="C_IDEL_HIGH_PERF" TYPE="string" VALUE="TRUE">
3202 <DESCRIPTION>IDELAY High Performance Mode</DESCRIPTION>
3204 <PARAMETER MPD_INDEX="31" NAME="C_SIM_ONLY" TYPE="integer" VALUE="0">
3205 <DESCRIPTION>SKip 200us Power-up Time for Simulation</DESCRIPTION>
3207 <PARAMETER MPD_INDEX="32" NAME="C_NUM_IDELAYCTRL" TYPE="integer" VALUE="3">
3208 <DESCRIPTION>Number of IDELAYCTRL Primitives (V4 only) that are explicitly instantiated</DESCRIPTION>
3210 <PARAMETER CHANGEDBY="USER" MPD_INDEX="33" NAME="C_IDELAYCTRL_LOC" TYPE="string" VALUE="IDELAYCTRL_X0Y6-IDELAYCTRL_X0Y2-IDELAYCTRL_X0Y1">
3211 <DESCRIPTION>LOC Constraints of IDELAYCTRL Primitive</DESCRIPTION>
3213 <PARAMETER MPD_INDEX="34" NAME="C_READ_DATA_PIPELINE" TYPE="integer" VALUE="0">
3214 <DESCRIPTION>Read Data Pipeline</DESCRIPTION>
3216 <PARAMETER MPD_INDEX="35" NAME="C_DQS_IO_COL" VALUE="0b000000000000000000">
3217 <DESCRIPTION>IO Column Location of DQS Groups</DESCRIPTION>
3219 <PARAMETER CHANGEDBY="USER" MPD_INDEX="36" NAME="C_DQ_IO_MS" VALUE="0b000000000111010100111101000011110001111000101110110000111100000110111100">
3220 <DESCRIPTION>Master Slave Location of DQ IO</DESCRIPTION>
3223 <MEMRANGE BASEDECIMAL="0" BASENAME="C_MEM_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="268435455" HIGHNAME="C_MEM_HIGHADDR" HIGHVALUE="0x0fffffff" IS_CACHEABLE="TRUE" MEMTYPE="MEMORY" SIZE="268435456" SIZEABRV="256M">
3225 <BUSINTERFACE NAME="PPC440MC"/>
3229 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="mc_mibclk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
3230 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="mi_mcclk90" SIGIS="CLK" SIGNAME="clk_125_0000MHz90PLL0_ADJUST"/>
3231 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="mi_mcreset" SIGIS="RST" SIGNAME="sys_bus_reset"/>
3232 <PORT CLKFREQUENCY="62500000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="mi_mcclkdiv2" SIGIS="CLK" SIGNAME="clk_62_5000MHzPLL0_ADJUST"/>
3233 <PORT CLKFREQUENCY="200000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="mi_mcclk_200" SIGIS="CLK" SIGNAME="clk_200_0000MHz"/>
3234 <PORT DIR="IO" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="5" MPD_INDEX="17" MSB="63" NAME="DDR2_DQ" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQ_pin" VECFORMULA="[(C_DDR_DWIDTH-1):0]"/>
3235 <PORT DIR="IO" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="6" MPD_INDEX="18" MSB="7" NAME="DDR2_DQS" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_pin" VECFORMULA="[(C_DDR_DQS_WIDTH-1):0]"/>
3236 <PORT DIR="IO" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="7" MPD_INDEX="19" MSB="7" NAME="DDR2_DQS_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_N_pin" VECFORMULA="[(C_DDR_DQS_WIDTH-1):0]"/>
3237 <PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="8" MPD_INDEX="20" MSB="12" NAME="DDR2_A" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_A_pin" VECFORMULA="[(C_DDR_RAWIDTH-1):0]"/>
3238 <PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="9" MPD_INDEX="21" MSB="1" NAME="DDR2_BA" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_BA_pin" VECFORMULA="[(C_DDR_BAWIDTH-1):0]"/>
3239 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="10" MPD_INDEX="22" NAME="DDR2_RAS_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin"/>
3240 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="11" MPD_INDEX="23" NAME="DDR2_CAS_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin"/>
3241 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="12" MPD_INDEX="24" NAME="DDR2_WE_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_WE_N_pin"/>
3242 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="13" MPD_INDEX="25" NAME="DDR2_CS_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CS_N_pin" VECFORMULA="[(C_NUM_RANKS_MEM-1):0]"/>
3243 <PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="14" MPD_INDEX="26" MSB="1" NAME="DDR2_ODT" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_ODT_pin" VECFORMULA="[(C_DDR2_ODT_WIDTH-1):0]"/>
3244 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="15" MPD_INDEX="27" NAME="DDR2_CKE" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CKE_pin" VECFORMULA="[(C_NUM_RANKS_MEM-1):0]"/>
3245 <PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="16" MPD_INDEX="28" MSB="7" NAME="DDR2_DM" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DM_pin" VECFORMULA="[(C_DDR_DM_WIDTH-1):0]"/>
3246 <PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="17" MPD_INDEX="29" MSB="1" NAME="DDR2_CK" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_pin" VECFORMULA="[(C_NUM_CLK_PAIRS-1):0]"/>
3247 <PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="18" MPD_INDEX="30" MSB="1" NAME="DDR2_CK_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_N_pin" VECFORMULA="[(C_NUM_CLK_PAIRS-1):0]"/>
3248 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcaddressvalid" DIR="I" MPD_INDEX="5" NAME="mi_mcaddressvalid" SIGNAME="ppc440_0_PPC440MC_mimcaddressvalid"/>
3249 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcaddress" DIR="I" MPD_INDEX="6" NAME="mi_mcaddress" SIGNAME="ppc440_0_PPC440MC_mimcaddress" VECFORMULA="[0:35]"/>
3250 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcbankconflict" DIR="I" MPD_INDEX="7" NAME="mi_mcbankconflict" SIGNAME="ppc440_0_PPC440MC_mimcbankconflict"/>
3251 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcrowconflict" DIR="I" MPD_INDEX="8" NAME="mi_mcrowconflict" SIGNAME="ppc440_0_PPC440MC_mimcrowconflict"/>
3252 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcbyteenable" DIR="I" MPD_INDEX="9" NAME="mi_mcbyteenable" SIGNAME="ppc440_0_PPC440MC_mimcbyteenable" VECFORMULA="[0:15]"/>
3253 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcwritedata" DIR="I" MPD_INDEX="10" NAME="mi_mcwritedata" SIGNAME="ppc440_0_PPC440MC_mimcwritedata" VECFORMULA="[0:127]"/>
3254 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcreadnotwrite" DIR="I" MPD_INDEX="11" NAME="mi_mcreadnotwrite" SIGNAME="ppc440_0_PPC440MC_mimcreadnotwrite"/>
3255 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcwritedatavalid" DIR="I" MPD_INDEX="12" NAME="mi_mcwritedatavalid" SIGNAME="ppc440_0_PPC440MC_mimcwritedatavalid"/>
3256 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mcmiaddrreadytoaccept" DIR="O" MPD_INDEX="13" NAME="mc_miaddrreadytoaccept" SIGNAME="ppc440_0_PPC440MC_mcmiaddrreadytoaccept"/>
3257 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mcmireaddata" DIR="O" MPD_INDEX="14" NAME="mc_mireaddata" SIGNAME="ppc440_0_PPC440MC_mcmireaddata" VECFORMULA="[0:127]"/>
3258 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mcmireaddataerr" DIR="O" MPD_INDEX="15" NAME="mc_mireaddataerr" SIGNAME="ppc440_0_PPC440MC_mcmireaddataerr"/>
3259 <PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mcmireaddatavalid" DIR="O" MPD_INDEX="16" NAME="mc_mireaddatavalid" SIGNAME="ppc440_0_PPC440MC_mcmireaddatavalid"/>
3260 <BUSINTERFACE BUSNAME="ppc440_0_PPC440MC" BUSSTD="XIL" BUSSTD_PSF="XIL_PPC440MC" IS_INMHS="TRUE" MPD_INDEX="0" NAME="PPC440MC" TYPE="TARGET"/>
3262 <MODULE HWVERSION="1.01.a" INSTANCE="SysACE_CompactFlash" IPTYPE="PERIPHERAL" MHS_INDEX="15" MODCLASS="PERIPHERAL" MODTYPE="xps_sysace">
3263 <DESCRIPTION TYPE="SHORT">XPS System ACE Interface Controller(Compact Flash)</DESCRIPTION>
3264 <DESCRIPTION TYPE="LONG">Interface between the PLBV46 and the Microprocessor Interface (MPU) of the System ACE Compact Flash solution peripheral</DESCRIPTION>
3266 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_sysace_v1_01_a/doc/xps_sysace.pdf" TYPE="IP"/>
3268 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
3269 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x83600000">
3270 <DESCRIPTION>Base Address</DESCRIPTION>
3272 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x8360ffff">
3273 <DESCRIPTION>High Address</DESCRIPTION>
3275 <PARAMETER MPD_INDEX="2" NAME="C_MEM_WIDTH" TYPE="INTEGER" VALUE="16">
3276 <DESCRIPTION>Width of System ACE Data Bus </DESCRIPTION>
3278 <PARAMETER MPD_INDEX="3" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
3279 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
3281 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
3282 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
3284 <PARAMETER MPD_INDEX="5" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
3285 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
3287 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="6" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
3288 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
3290 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="7" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
3291 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
3293 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
3294 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
3296 <PARAMETER MPD_INDEX="9" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
3297 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
3299 <PARAMETER MPD_INDEX="10" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
3300 <DESCRIPTION>Device Family</DESCRIPTION>
3303 <MEMRANGE BASEDECIMAL="2204106752" BASENAME="C_BASEADDR" BASEVALUE="0x83600000" HIGHDECIMAL="2204172287" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8360ffff" MEMTYPE="REGISTER" MINSIZE="0x80" SIZE="65536" SIZEABRV="64K">
3305 <BUSINTERFACE NAME="SPLB"/>
3309 <PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="42" MSB="6" NAME="SysACE_MPA" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPA_pin" VECFORMULA="[6:0]">
3310 <DESCRIPTION>Address Input</DESCRIPTION>
3312 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="43" NAME="SysACE_CLK" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CLK_pin">
3313 <DESCRIPTION>Clock Input</DESCRIPTION>
3315 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="44" NAME="SysACE_MPIRQ" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin">
3316 <DESCRIPTION>Active high Interrupt Output</DESCRIPTION>
3318 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="48" NAME="SysACE_CEN" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CEN_pin">
3319 <DESCRIPTION>Active LOW Chip Enable</DESCRIPTION>
3321 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="49" NAME="SysACE_OEN" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_OEN_pin">
3322 <DESCRIPTION>Active LOW Output Enable</DESCRIPTION>
3324 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="50" NAME="SysACE_WEN" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_WEN_pin">
3325 <DESCRIPTION>Active LOW Write Enable</DESCRIPTION>
3327 <PORT DIR="IO" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="6" MPD_INDEX="52" MSB="15" NAME="SysACE_MPD" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPD_pin" VECFORMULA="[(C_MEM_WIDTH-1):0]">
3328 <DESCRIPTION>Data Input/Output</DESCRIPTION>
3330 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
3331 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
3332 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
3333 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
3334 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
3335 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
3336 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
3337 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
3338 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
3339 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
3340 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
3341 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
3342 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
3343 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
3344 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
3345 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
3346 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
3347 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
3348 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
3349 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
3350 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
3351 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
3352 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
3353 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
3354 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
3355 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
3356 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
3357 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
3358 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
3359 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
3360 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
3361 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
3362 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
3363 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
3364 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
3365 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
3366 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
3367 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
3368 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
3369 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
3370 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
3371 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
3372 <PORT DIR="I" MPD_INDEX="45" NAME="SysACE_MPD_I" SIGNAME="__NOC__" VECFORMULA="[(C_MEM_WIDTH-1):0]"/>
3373 <PORT DIR="O" MPD_INDEX="46" NAME="SysACE_MPD_O" SIGNAME="__NOC__" VECFORMULA="[(C_MEM_WIDTH-1):0]"/>
3374 <PORT DIR="O" MPD_INDEX="47" NAME="SysACE_MPD_T" SIGNAME="__NOC__" VECFORMULA="[(C_MEM_WIDTH-1):0]"/>
3375 <PORT DIR="O" MPD_INDEX="51" NAME="SysACE_IRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
3376 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
3378 <MODULE HWVERSION="3.01.a" INSTANCE="clock_generator_0" IPTYPE="PERIPHERAL" MHS_INDEX="16" MODCLASS="IP" MODTYPE="clock_generator">
3379 <DESCRIPTION TYPE="SHORT">Clock Generator</DESCRIPTION>
3380 <DESCRIPTION TYPE="LONG">Clock generator for processor system.</DESCRIPTION>
3382 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/clock_generator_v3_01_a/doc/clock_generator.pdf" TYPE="IP"/>
3384 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
3385 <PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5"/>
3386 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_SPEEDGRADE" TYPE="STRING" VALUE="-1"/>
3387 <PARAMETER MPD_INDEX="2" NAME="C_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3388 <PARAMETER MPD_INDEX="3" NAME="C_CLK_GEN" TYPE="STRING" VALUE="update"/>
3389 <PARAMETER MPD_INDEX="4" NAME="C_CLKOUT0_MODULE" TYPE="STRING" VALUE="NONE"/>
3390 <PARAMETER MPD_INDEX="5" NAME="C_CLKOUT0_PORT" TYPE="STRING" VALUE="NONE"/>
3391 <PARAMETER MPD_INDEX="6" NAME="C_CLKOUT1_MODULE" TYPE="STRING" VALUE="NONE"/>
3392 <PARAMETER MPD_INDEX="7" NAME="C_CLKOUT1_PORT" TYPE="STRING" VALUE="NONE"/>
3393 <PARAMETER MPD_INDEX="8" NAME="C_CLKOUT2_MODULE" TYPE="STRING" VALUE="NONE"/>
3394 <PARAMETER MPD_INDEX="9" NAME="C_CLKOUT2_PORT" TYPE="STRING" VALUE="NONE"/>
3395 <PARAMETER MPD_INDEX="10" NAME="C_CLKOUT3_MODULE" TYPE="STRING" VALUE="NONE"/>
3396 <PARAMETER MPD_INDEX="11" NAME="C_CLKOUT3_PORT" TYPE="STRING" VALUE="NONE"/>
3397 <PARAMETER MPD_INDEX="12" NAME="C_CLKOUT4_MODULE" TYPE="STRING" VALUE="NONE"/>
3398 <PARAMETER MPD_INDEX="13" NAME="C_CLKOUT4_PORT" TYPE="STRING" VALUE="NONE"/>
3399 <PARAMETER MPD_INDEX="14" NAME="C_CLKOUT5_MODULE" TYPE="STRING" VALUE="NONE"/>
3400 <PARAMETER MPD_INDEX="15" NAME="C_CLKOUT5_PORT" TYPE="STRING" VALUE="NONE"/>
3401 <PARAMETER MPD_INDEX="16" NAME="C_CLKOUT6_MODULE" TYPE="STRING" VALUE="NONE"/>
3402 <PARAMETER MPD_INDEX="17" NAME="C_CLKOUT6_PORT" TYPE="STRING" VALUE="NONE"/>
3403 <PARAMETER MPD_INDEX="18" NAME="C_CLKOUT7_MODULE" TYPE="STRING" VALUE="NONE"/>
3404 <PARAMETER MPD_INDEX="19" NAME="C_CLKOUT7_PORT" TYPE="STRING" VALUE="NONE"/>
3405 <PARAMETER MPD_INDEX="20" NAME="C_CLKOUT8_MODULE" TYPE="STRING" VALUE="NONE"/>
3406 <PARAMETER MPD_INDEX="21" NAME="C_CLKOUT8_PORT" TYPE="STRING" VALUE="NONE"/>
3407 <PARAMETER MPD_INDEX="22" NAME="C_CLKOUT9_MODULE" TYPE="STRING" VALUE="NONE"/>
3408 <PARAMETER MPD_INDEX="23" NAME="C_CLKOUT9_PORT" TYPE="STRING" VALUE="NONE"/>
3409 <PARAMETER MPD_INDEX="24" NAME="C_CLKOUT10_MODULE" TYPE="STRING" VALUE="NONE"/>
3410 <PARAMETER MPD_INDEX="25" NAME="C_CLKOUT10_PORT" TYPE="STRING" VALUE="NONE"/>
3411 <PARAMETER MPD_INDEX="26" NAME="C_CLKOUT11_MODULE" TYPE="STRING" VALUE="NONE"/>
3412 <PARAMETER MPD_INDEX="27" NAME="C_CLKOUT11_PORT" TYPE="STRING" VALUE="NONE"/>
3413 <PARAMETER MPD_INDEX="28" NAME="C_CLKOUT12_MODULE" TYPE="STRING" VALUE="NONE"/>
3414 <PARAMETER MPD_INDEX="29" NAME="C_CLKOUT12_PORT" TYPE="STRING" VALUE="NONE"/>
3415 <PARAMETER MPD_INDEX="30" NAME="C_CLKOUT13_MODULE" TYPE="STRING" VALUE="NONE"/>
3416 <PARAMETER MPD_INDEX="31" NAME="C_CLKOUT13_PORT" TYPE="STRING" VALUE="NONE"/>
3417 <PARAMETER MPD_INDEX="32" NAME="C_CLKOUT14_MODULE" TYPE="STRING" VALUE="NONE"/>
3418 <PARAMETER MPD_INDEX="33" NAME="C_CLKOUT14_PORT" TYPE="STRING" VALUE="NONE"/>
3419 <PARAMETER MPD_INDEX="34" NAME="C_CLKOUT15_MODULE" TYPE="STRING" VALUE="NONE"/>
3420 <PARAMETER MPD_INDEX="35" NAME="C_CLKOUT15_PORT" TYPE="STRING" VALUE="NONE"/>
3421 <PARAMETER MPD_INDEX="36" NAME="C_CLKFBOUT_MODULE" TYPE="STRING" VALUE="NONE"/>
3422 <PARAMETER MPD_INDEX="37" NAME="C_CLKFBOUT_PORT" TYPE="STRING" VALUE="NONE"/>
3423 <PARAMETER MPD_INDEX="38" NAME="C_PSDONE_MODULE" TYPE="STRING" VALUE="NONE"/>
3424 <PARAMETER MPD_INDEX="39" NAME="C_PLL0_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3425 <PARAMETER MPD_INDEX="40" NAME="C_PLL0_CLKFBOUT_MULT" TYPE="INTEGER" VALUE="1"/>
3426 <PARAMETER MPD_INDEX="41" NAME="C_PLL0_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
3427 <PARAMETER MPD_INDEX="42" NAME="C_PLL0_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3428 <PARAMETER MPD_INDEX="43" NAME="C_PLL0_CLKOUT0_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3429 <PARAMETER MPD_INDEX="44" NAME="C_PLL0_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3430 <PARAMETER MPD_INDEX="45" NAME="C_PLL0_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
3431 <PARAMETER MPD_INDEX="46" NAME="C_PLL0_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3432 <PARAMETER MPD_INDEX="47" NAME="C_PLL0_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3433 <PARAMETER MPD_INDEX="48" NAME="C_PLL0_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
3434 <PARAMETER MPD_INDEX="49" NAME="C_PLL0_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3435 <PARAMETER MPD_INDEX="50" NAME="C_PLL0_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3436 <PARAMETER MPD_INDEX="51" NAME="C_PLL0_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
3437 <PARAMETER MPD_INDEX="52" NAME="C_PLL0_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3438 <PARAMETER MPD_INDEX="53" NAME="C_PLL0_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3439 <PARAMETER MPD_INDEX="54" NAME="C_PLL0_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
3440 <PARAMETER MPD_INDEX="55" NAME="C_PLL0_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3441 <PARAMETER MPD_INDEX="56" NAME="C_PLL0_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3442 <PARAMETER MPD_INDEX="57" NAME="C_PLL0_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
3443 <PARAMETER MPD_INDEX="58" NAME="C_PLL0_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3444 <PARAMETER MPD_INDEX="59" NAME="C_PLL0_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3445 <PARAMETER MPD_INDEX="60" NAME="C_PLL0_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
3446 <PARAMETER MPD_INDEX="61" NAME="C_PLL0_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
3447 <PARAMETER MPD_INDEX="62" NAME="C_PLL0_COMPENSATION" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
3448 <PARAMETER MPD_INDEX="63" NAME="C_PLL0_REF_JITTER" TYPE="REAL" VALUE="0.100000"/>
3449 <PARAMETER MPD_INDEX="64" NAME="C_PLL0_RESET_ON_LOSS_OF_LOCK" TYPE="BOOLEAN" VALUE="false"/>
3450 <PARAMETER MPD_INDEX="65" NAME="C_PLL0_RST_DEASSERT_CLK" TYPE="STRING" VALUE="CLKIN1"/>
3451 <PARAMETER MPD_INDEX="66" NAME="C_PLL0_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3452 <PARAMETER MPD_INDEX="67" NAME="C_PLL0_FAMILY" TYPE="STRING" VALUE="virtex5"/>
3453 <PARAMETER MPD_INDEX="68" NAME="C_PLL0_CLKOUT0_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3454 <PARAMETER MPD_INDEX="69" NAME="C_PLL0_CLKOUT1_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3455 <PARAMETER MPD_INDEX="70" NAME="C_PLL0_CLKOUT2_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3456 <PARAMETER MPD_INDEX="71" NAME="C_PLL0_CLKOUT3_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3457 <PARAMETER MPD_INDEX="72" NAME="C_PLL0_CLKOUT4_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3458 <PARAMETER MPD_INDEX="73" NAME="C_PLL0_CLKOUT5_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3459 <PARAMETER MPD_INDEX="74" NAME="C_PLL0_CLKFBOUT_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3460 <PARAMETER MPD_INDEX="75" NAME="C_PLL0_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3461 <PARAMETER MPD_INDEX="76" NAME="C_PLL0_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
3462 <PARAMETER MPD_INDEX="77" NAME="C_PLL0_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3463 <PARAMETER MPD_INDEX="78" NAME="C_PLL0_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3464 <PARAMETER MPD_INDEX="79" NAME="C_PLL0_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
3465 <PARAMETER MPD_INDEX="80" NAME="C_PLL0_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
3466 <PARAMETER MPD_INDEX="81" NAME="C_PLL0_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
3467 <PARAMETER MPD_INDEX="82" NAME="C_PLL0_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
3468 <PARAMETER MPD_INDEX="83" NAME="C_PLL0_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
3469 <PARAMETER MPD_INDEX="84" NAME="C_PLL0_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
3470 <PARAMETER MPD_INDEX="85" NAME="C_PLL0_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3471 <PARAMETER MPD_INDEX="86" NAME="C_PLL0_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
3472 <PARAMETER MPD_INDEX="87" NAME="C_PLL0_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3473 <PARAMETER MPD_INDEX="88" NAME="C_PLL1_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3474 <PARAMETER MPD_INDEX="89" NAME="C_PLL1_CLKFBOUT_MULT" TYPE="INTEGER" VALUE="1"/>
3475 <PARAMETER MPD_INDEX="90" NAME="C_PLL1_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
3476 <PARAMETER MPD_INDEX="91" NAME="C_PLL1_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3477 <PARAMETER MPD_INDEX="92" NAME="C_PLL1_CLKOUT0_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3478 <PARAMETER MPD_INDEX="93" NAME="C_PLL1_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3479 <PARAMETER MPD_INDEX="94" NAME="C_PLL1_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
3480 <PARAMETER MPD_INDEX="95" NAME="C_PLL1_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3481 <PARAMETER MPD_INDEX="96" NAME="C_PLL1_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3482 <PARAMETER MPD_INDEX="97" NAME="C_PLL1_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
3483 <PARAMETER MPD_INDEX="98" NAME="C_PLL1_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3484 <PARAMETER MPD_INDEX="99" NAME="C_PLL1_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3485 <PARAMETER MPD_INDEX="100" NAME="C_PLL1_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
3486 <PARAMETER MPD_INDEX="101" NAME="C_PLL1_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3487 <PARAMETER MPD_INDEX="102" NAME="C_PLL1_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3488 <PARAMETER MPD_INDEX="103" NAME="C_PLL1_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
3489 <PARAMETER MPD_INDEX="104" NAME="C_PLL1_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3490 <PARAMETER MPD_INDEX="105" NAME="C_PLL1_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3491 <PARAMETER MPD_INDEX="106" NAME="C_PLL1_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
3492 <PARAMETER MPD_INDEX="107" NAME="C_PLL1_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3493 <PARAMETER MPD_INDEX="108" NAME="C_PLL1_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3494 <PARAMETER MPD_INDEX="109" NAME="C_PLL1_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
3495 <PARAMETER MPD_INDEX="110" NAME="C_PLL1_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
3496 <PARAMETER MPD_INDEX="111" NAME="C_PLL1_COMPENSATION" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
3497 <PARAMETER MPD_INDEX="112" NAME="C_PLL1_REF_JITTER" TYPE="REAL" VALUE="0.100000"/>
3498 <PARAMETER MPD_INDEX="113" NAME="C_PLL1_RESET_ON_LOSS_OF_LOCK" TYPE="BOOLEAN" VALUE="false"/>
3499 <PARAMETER MPD_INDEX="114" NAME="C_PLL1_RST_DEASSERT_CLK" TYPE="STRING" VALUE="CLKIN1"/>
3500 <PARAMETER MPD_INDEX="115" NAME="C_PLL1_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3501 <PARAMETER MPD_INDEX="116" NAME="C_PLL1_FAMILY" TYPE="STRING" VALUE="virtex5"/>
3502 <PARAMETER MPD_INDEX="117" NAME="C_PLL1_CLKOUT0_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3503 <PARAMETER MPD_INDEX="118" NAME="C_PLL1_CLKOUT1_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3504 <PARAMETER MPD_INDEX="119" NAME="C_PLL1_CLKOUT2_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3505 <PARAMETER MPD_INDEX="120" NAME="C_PLL1_CLKOUT3_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3506 <PARAMETER MPD_INDEX="121" NAME="C_PLL1_CLKOUT4_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3507 <PARAMETER MPD_INDEX="122" NAME="C_PLL1_CLKOUT5_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3508 <PARAMETER MPD_INDEX="123" NAME="C_PLL1_CLKFBOUT_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
3509 <PARAMETER MPD_INDEX="124" NAME="C_PLL1_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3510 <PARAMETER MPD_INDEX="125" NAME="C_PLL1_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
3511 <PARAMETER MPD_INDEX="126" NAME="C_PLL1_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3512 <PARAMETER MPD_INDEX="127" NAME="C_PLL1_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3513 <PARAMETER MPD_INDEX="128" NAME="C_PLL1_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
3514 <PARAMETER MPD_INDEX="129" NAME="C_PLL1_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
3515 <PARAMETER MPD_INDEX="130" NAME="C_PLL1_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
3516 <PARAMETER MPD_INDEX="131" NAME="C_PLL1_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
3517 <PARAMETER MPD_INDEX="132" NAME="C_PLL1_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
3518 <PARAMETER MPD_INDEX="133" NAME="C_PLL1_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
3519 <PARAMETER MPD_INDEX="134" NAME="C_PLL1_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3520 <PARAMETER MPD_INDEX="135" NAME="C_PLL1_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
3521 <PARAMETER MPD_INDEX="136" NAME="C_PLL1_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3522 <PARAMETER MPD_INDEX="137" NAME="C_DCM0_DFS_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
3523 <PARAMETER MPD_INDEX="138" NAME="C_DCM0_DLL_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
3524 <PARAMETER MPD_INDEX="139" NAME="C_DCM0_DUTY_CYCLE_CORRECTION" TYPE="BOOLEAN" VALUE="true"/>
3525 <PARAMETER MPD_INDEX="140" NAME="C_DCM0_CLKIN_DIVIDE_BY_2" TYPE="BOOLEAN" VALUE="false"/>
3526 <PARAMETER MPD_INDEX="141" NAME="C_DCM0_CLK_FEEDBACK" TYPE="STRING" VALUE="1X"/>
3527 <PARAMETER MPD_INDEX="142" NAME="C_DCM0_CLKOUT_PHASE_SHIFT" TYPE="STRING" VALUE="NONE"/>
3528 <PARAMETER MPD_INDEX="143" NAME="C_DCM0_DSS_MODE" TYPE="STRING" VALUE="NONE"/>
3529 <PARAMETER MPD_INDEX="144" NAME="C_DCM0_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
3530 <PARAMETER MPD_INDEX="145" NAME="C_DCM0_PHASE_SHIFT" TYPE="INTEGER" VALUE="0"/>
3531 <PARAMETER MPD_INDEX="146" NAME="C_DCM0_CLKFX_MULTIPLY" TYPE="INTEGER" VALUE="4"/>
3532 <PARAMETER MPD_INDEX="147" NAME="C_DCM0_CLKFX_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3533 <PARAMETER MPD_INDEX="148" NAME="C_DCM0_CLKDV_DIVIDE" TYPE="REAL" VALUE="2.000000"/>
3534 <PARAMETER MPD_INDEX="149" NAME="C_DCM0_CLKIN_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3535 <PARAMETER MPD_INDEX="150" NAME="C_DCM0_DESKEW_ADJUST" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
3536 <PARAMETER MPD_INDEX="151" NAME="C_DCM0_CLKIN_BUF" TYPE="BOOLEAN" VALUE="false"/>
3537 <PARAMETER MPD_INDEX="152" NAME="C_DCM0_CLKFB_BUF" TYPE="BOOLEAN" VALUE="false"/>
3538 <PARAMETER MPD_INDEX="153" NAME="C_DCM0_CLK0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3539 <PARAMETER MPD_INDEX="154" NAME="C_DCM0_CLK90_BUF" TYPE="BOOLEAN" VALUE="false"/>
3540 <PARAMETER MPD_INDEX="155" NAME="C_DCM0_CLK180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3541 <PARAMETER MPD_INDEX="156" NAME="C_DCM0_CLK270_BUF" TYPE="BOOLEAN" VALUE="false"/>
3542 <PARAMETER MPD_INDEX="157" NAME="C_DCM0_CLKDV_BUF" TYPE="BOOLEAN" VALUE="false"/>
3543 <PARAMETER MPD_INDEX="158" NAME="C_DCM0_CLKDV180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3544 <PARAMETER MPD_INDEX="159" NAME="C_DCM0_CLK2X_BUF" TYPE="BOOLEAN" VALUE="false"/>
3545 <PARAMETER MPD_INDEX="160" NAME="C_DCM0_CLK2X180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3546 <PARAMETER MPD_INDEX="161" NAME="C_DCM0_CLKFX_BUF" TYPE="BOOLEAN" VALUE="false"/>
3547 <PARAMETER MPD_INDEX="162" NAME="C_DCM0_CLKFX180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3548 <PARAMETER MPD_INDEX="163" NAME="C_DCM0_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3549 <PARAMETER MPD_INDEX="164" NAME="C_DCM0_FAMILY" TYPE="STRING" VALUE="virtex5"/>
3550 <PARAMETER MPD_INDEX="165" NAME="C_DCM0_CLKIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3551 <PARAMETER MPD_INDEX="166" NAME="C_DCM0_CLKIN_PORT" TYPE="STRING" VALUE="NONE"/>
3552 <PARAMETER MPD_INDEX="167" NAME="C_DCM0_CLKFB_MODULE" TYPE="STRING" VALUE="NONE"/>
3553 <PARAMETER MPD_INDEX="168" NAME="C_DCM0_CLKFB_PORT" TYPE="STRING" VALUE="NONE"/>
3554 <PARAMETER MPD_INDEX="169" NAME="C_DCM0_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3555 <PARAMETER MPD_INDEX="170" NAME="C_DCM1_DFS_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
3556 <PARAMETER MPD_INDEX="171" NAME="C_DCM1_DLL_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
3557 <PARAMETER MPD_INDEX="172" NAME="C_DCM1_DUTY_CYCLE_CORRECTION" TYPE="BOOLEAN" VALUE="true"/>
3558 <PARAMETER MPD_INDEX="173" NAME="C_DCM1_CLKIN_DIVIDE_BY_2" TYPE="BOOLEAN" VALUE="false"/>
3559 <PARAMETER MPD_INDEX="174" NAME="C_DCM1_CLK_FEEDBACK" TYPE="STRING" VALUE="1X"/>
3560 <PARAMETER MPD_INDEX="175" NAME="C_DCM1_CLKOUT_PHASE_SHIFT" TYPE="STRING" VALUE="NONE"/>
3561 <PARAMETER MPD_INDEX="176" NAME="C_DCM1_DSS_MODE" TYPE="STRING" VALUE="NONE"/>
3562 <PARAMETER MPD_INDEX="177" NAME="C_DCM1_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
3563 <PARAMETER MPD_INDEX="178" NAME="C_DCM1_PHASE_SHIFT" TYPE="INTEGER" VALUE="0"/>
3564 <PARAMETER MPD_INDEX="179" NAME="C_DCM1_CLKFX_MULTIPLY" TYPE="INTEGER" VALUE="4"/>
3565 <PARAMETER MPD_INDEX="180" NAME="C_DCM1_CLKFX_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3566 <PARAMETER MPD_INDEX="181" NAME="C_DCM1_CLKDV_DIVIDE" TYPE="REAL" VALUE="2.000000"/>
3567 <PARAMETER MPD_INDEX="182" NAME="C_DCM1_CLKIN_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3568 <PARAMETER MPD_INDEX="183" NAME="C_DCM1_DESKEW_ADJUST" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
3569 <PARAMETER MPD_INDEX="184" NAME="C_DCM1_CLKIN_BUF" TYPE="BOOLEAN" VALUE="false"/>
3570 <PARAMETER MPD_INDEX="185" NAME="C_DCM1_CLKFB_BUF" TYPE="BOOLEAN" VALUE="false"/>
3571 <PARAMETER MPD_INDEX="186" NAME="C_DCM1_CLK0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3572 <PARAMETER MPD_INDEX="187" NAME="C_DCM1_CLK90_BUF" TYPE="BOOLEAN" VALUE="false"/>
3573 <PARAMETER MPD_INDEX="188" NAME="C_DCM1_CLK180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3574 <PARAMETER MPD_INDEX="189" NAME="C_DCM1_CLK270_BUF" TYPE="BOOLEAN" VALUE="false"/>
3575 <PARAMETER MPD_INDEX="190" NAME="C_DCM1_CLKDV_BUF" TYPE="BOOLEAN" VALUE="false"/>
3576 <PARAMETER MPD_INDEX="191" NAME="C_DCM1_CLKDV180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3577 <PARAMETER MPD_INDEX="192" NAME="C_DCM1_CLK2X_BUF" TYPE="BOOLEAN" VALUE="false"/>
3578 <PARAMETER MPD_INDEX="193" NAME="C_DCM1_CLK2X180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3579 <PARAMETER MPD_INDEX="194" NAME="C_DCM1_CLKFX_BUF" TYPE="BOOLEAN" VALUE="false"/>
3580 <PARAMETER MPD_INDEX="195" NAME="C_DCM1_CLKFX180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3581 <PARAMETER MPD_INDEX="196" NAME="C_DCM1_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3582 <PARAMETER MPD_INDEX="197" NAME="C_DCM1_FAMILY" TYPE="STRING" VALUE="virtex5"/>
3583 <PARAMETER MPD_INDEX="198" NAME="C_DCM1_CLKIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3584 <PARAMETER MPD_INDEX="199" NAME="C_DCM1_CLKIN_PORT" TYPE="STRING" VALUE="NONE"/>
3585 <PARAMETER MPD_INDEX="200" NAME="C_DCM1_CLKFB_MODULE" TYPE="STRING" VALUE="NONE"/>
3586 <PARAMETER MPD_INDEX="201" NAME="C_DCM1_CLKFB_PORT" TYPE="STRING" VALUE="NONE"/>
3587 <PARAMETER MPD_INDEX="202" NAME="C_DCM1_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3588 <PARAMETER MPD_INDEX="203" NAME="C_DCM2_DFS_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
3589 <PARAMETER MPD_INDEX="204" NAME="C_DCM2_DLL_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
3590 <PARAMETER MPD_INDEX="205" NAME="C_DCM2_DUTY_CYCLE_CORRECTION" TYPE="BOOLEAN" VALUE="true"/>
3591 <PARAMETER MPD_INDEX="206" NAME="C_DCM2_CLKIN_DIVIDE_BY_2" TYPE="BOOLEAN" VALUE="false"/>
3592 <PARAMETER MPD_INDEX="207" NAME="C_DCM2_CLK_FEEDBACK" TYPE="STRING" VALUE="1X"/>
3593 <PARAMETER MPD_INDEX="208" NAME="C_DCM2_CLKOUT_PHASE_SHIFT" TYPE="STRING" VALUE="NONE"/>
3594 <PARAMETER MPD_INDEX="209" NAME="C_DCM2_DSS_MODE" TYPE="STRING" VALUE="NONE"/>
3595 <PARAMETER MPD_INDEX="210" NAME="C_DCM2_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
3596 <PARAMETER MPD_INDEX="211" NAME="C_DCM2_PHASE_SHIFT" TYPE="INTEGER" VALUE="0"/>
3597 <PARAMETER MPD_INDEX="212" NAME="C_DCM2_CLKFX_MULTIPLY" TYPE="INTEGER" VALUE="4"/>
3598 <PARAMETER MPD_INDEX="213" NAME="C_DCM2_CLKFX_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3599 <PARAMETER MPD_INDEX="214" NAME="C_DCM2_CLKDV_DIVIDE" TYPE="REAL" VALUE="2.000000"/>
3600 <PARAMETER MPD_INDEX="215" NAME="C_DCM2_CLKIN_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3601 <PARAMETER MPD_INDEX="216" NAME="C_DCM2_DESKEW_ADJUST" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
3602 <PARAMETER MPD_INDEX="217" NAME="C_DCM2_CLKIN_BUF" TYPE="BOOLEAN" VALUE="false"/>
3603 <PARAMETER MPD_INDEX="218" NAME="C_DCM2_CLKFB_BUF" TYPE="BOOLEAN" VALUE="false"/>
3604 <PARAMETER MPD_INDEX="219" NAME="C_DCM2_CLK0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3605 <PARAMETER MPD_INDEX="220" NAME="C_DCM2_CLK90_BUF" TYPE="BOOLEAN" VALUE="false"/>
3606 <PARAMETER MPD_INDEX="221" NAME="C_DCM2_CLK180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3607 <PARAMETER MPD_INDEX="222" NAME="C_DCM2_CLK270_BUF" TYPE="BOOLEAN" VALUE="false"/>
3608 <PARAMETER MPD_INDEX="223" NAME="C_DCM2_CLKDV_BUF" TYPE="BOOLEAN" VALUE="false"/>
3609 <PARAMETER MPD_INDEX="224" NAME="C_DCM2_CLKDV180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3610 <PARAMETER MPD_INDEX="225" NAME="C_DCM2_CLK2X_BUF" TYPE="BOOLEAN" VALUE="false"/>
3611 <PARAMETER MPD_INDEX="226" NAME="C_DCM2_CLK2X180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3612 <PARAMETER MPD_INDEX="227" NAME="C_DCM2_CLKFX_BUF" TYPE="BOOLEAN" VALUE="false"/>
3613 <PARAMETER MPD_INDEX="228" NAME="C_DCM2_CLKFX180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3614 <PARAMETER MPD_INDEX="229" NAME="C_DCM2_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3615 <PARAMETER MPD_INDEX="230" NAME="C_DCM2_FAMILY" TYPE="STRING" VALUE="virtex5"/>
3616 <PARAMETER MPD_INDEX="231" NAME="C_DCM2_CLKIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3617 <PARAMETER MPD_INDEX="232" NAME="C_DCM2_CLKIN_PORT" TYPE="STRING" VALUE="NONE"/>
3618 <PARAMETER MPD_INDEX="233" NAME="C_DCM2_CLKFB_MODULE" TYPE="STRING" VALUE="NONE"/>
3619 <PARAMETER MPD_INDEX="234" NAME="C_DCM2_CLKFB_PORT" TYPE="STRING" VALUE="NONE"/>
3620 <PARAMETER MPD_INDEX="235" NAME="C_DCM2_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3621 <PARAMETER MPD_INDEX="236" NAME="C_DCM3_DFS_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
3622 <PARAMETER MPD_INDEX="237" NAME="C_DCM3_DLL_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
3623 <PARAMETER MPD_INDEX="238" NAME="C_DCM3_DUTY_CYCLE_CORRECTION" TYPE="BOOLEAN" VALUE="true"/>
3624 <PARAMETER MPD_INDEX="239" NAME="C_DCM3_CLKIN_DIVIDE_BY_2" TYPE="BOOLEAN" VALUE="false"/>
3625 <PARAMETER MPD_INDEX="240" NAME="C_DCM3_CLK_FEEDBACK" TYPE="STRING" VALUE="1X"/>
3626 <PARAMETER MPD_INDEX="241" NAME="C_DCM3_CLKOUT_PHASE_SHIFT" TYPE="STRING" VALUE="NONE"/>
3627 <PARAMETER MPD_INDEX="242" NAME="C_DCM3_DSS_MODE" TYPE="STRING" VALUE="NONE"/>
3628 <PARAMETER MPD_INDEX="243" NAME="C_DCM3_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
3629 <PARAMETER MPD_INDEX="244" NAME="C_DCM3_PHASE_SHIFT" TYPE="INTEGER" VALUE="0"/>
3630 <PARAMETER MPD_INDEX="245" NAME="C_DCM3_CLKFX_MULTIPLY" TYPE="INTEGER" VALUE="4"/>
3631 <PARAMETER MPD_INDEX="246" NAME="C_DCM3_CLKFX_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3632 <PARAMETER MPD_INDEX="247" NAME="C_DCM3_CLKDV_DIVIDE" TYPE="REAL" VALUE="2.000000"/>
3633 <PARAMETER MPD_INDEX="248" NAME="C_DCM3_CLKIN_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3634 <PARAMETER MPD_INDEX="249" NAME="C_DCM3_DESKEW_ADJUST" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
3635 <PARAMETER MPD_INDEX="250" NAME="C_DCM3_CLKIN_BUF" TYPE="BOOLEAN" VALUE="false"/>
3636 <PARAMETER MPD_INDEX="251" NAME="C_DCM3_CLKFB_BUF" TYPE="BOOLEAN" VALUE="false"/>
3637 <PARAMETER MPD_INDEX="252" NAME="C_DCM3_CLK0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3638 <PARAMETER MPD_INDEX="253" NAME="C_DCM3_CLK90_BUF" TYPE="BOOLEAN" VALUE="false"/>
3639 <PARAMETER MPD_INDEX="254" NAME="C_DCM3_CLK180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3640 <PARAMETER MPD_INDEX="255" NAME="C_DCM3_CLK270_BUF" TYPE="BOOLEAN" VALUE="false"/>
3641 <PARAMETER MPD_INDEX="256" NAME="C_DCM3_CLKDV_BUF" TYPE="BOOLEAN" VALUE="false"/>
3642 <PARAMETER MPD_INDEX="257" NAME="C_DCM3_CLKDV180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3643 <PARAMETER MPD_INDEX="258" NAME="C_DCM3_CLK2X_BUF" TYPE="BOOLEAN" VALUE="false"/>
3644 <PARAMETER MPD_INDEX="259" NAME="C_DCM3_CLK2X180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3645 <PARAMETER MPD_INDEX="260" NAME="C_DCM3_CLKFX_BUF" TYPE="BOOLEAN" VALUE="false"/>
3646 <PARAMETER MPD_INDEX="261" NAME="C_DCM3_CLKFX180_BUF" TYPE="BOOLEAN" VALUE="false"/>
3647 <PARAMETER MPD_INDEX="262" NAME="C_DCM3_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3648 <PARAMETER MPD_INDEX="263" NAME="C_DCM3_FAMILY" TYPE="STRING" VALUE="virtex5"/>
3649 <PARAMETER MPD_INDEX="264" NAME="C_DCM3_CLKIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3650 <PARAMETER MPD_INDEX="265" NAME="C_DCM3_CLKIN_PORT" TYPE="STRING" VALUE="NONE"/>
3651 <PARAMETER MPD_INDEX="266" NAME="C_DCM3_CLKFB_MODULE" TYPE="STRING" VALUE="NONE"/>
3652 <PARAMETER MPD_INDEX="267" NAME="C_DCM3_CLKFB_PORT" TYPE="STRING" VALUE="NONE"/>
3653 <PARAMETER MPD_INDEX="268" NAME="C_DCM3_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3654 <PARAMETER MPD_INDEX="269" NAME="C_MMCM0_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
3655 <PARAMETER MPD_INDEX="270" NAME="C_MMCM0_CLKFBOUT_MULT_F" TYPE="REAL" VALUE="1.000000"/>
3656 <PARAMETER MPD_INDEX="271" NAME="C_MMCM0_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
3657 <PARAMETER MPD_INDEX="272" NAME="C_MMCM0_CLKFBOUT_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3658 <PARAMETER MPD_INDEX="273" NAME="C_MMCM0_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3659 <PARAMETER MPD_INDEX="274" NAME="C_MMCM0_CLKOUT0_DIVIDE_F" TYPE="REAL" VALUE="1.000000"/>
3660 <PARAMETER MPD_INDEX="275" NAME="C_MMCM0_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3661 <PARAMETER MPD_INDEX="276" NAME="C_MMCM0_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
3662 <PARAMETER MPD_INDEX="277" NAME="C_MMCM0_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3663 <PARAMETER MPD_INDEX="278" NAME="C_MMCM0_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3664 <PARAMETER MPD_INDEX="279" NAME="C_MMCM0_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
3665 <PARAMETER MPD_INDEX="280" NAME="C_MMCM0_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3666 <PARAMETER MPD_INDEX="281" NAME="C_MMCM0_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3667 <PARAMETER MPD_INDEX="282" NAME="C_MMCM0_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
3668 <PARAMETER MPD_INDEX="283" NAME="C_MMCM0_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3669 <PARAMETER MPD_INDEX="284" NAME="C_MMCM0_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3670 <PARAMETER MPD_INDEX="285" NAME="C_MMCM0_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
3671 <PARAMETER MPD_INDEX="286" NAME="C_MMCM0_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3672 <PARAMETER MPD_INDEX="287" NAME="C_MMCM0_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3673 <PARAMETER MPD_INDEX="288" NAME="C_MMCM0_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
3674 <PARAMETER MPD_INDEX="289" NAME="C_MMCM0_CLKOUT4_CASCADE" TYPE="BOOLEAN" VALUE="false"/>
3675 <PARAMETER MPD_INDEX="290" NAME="C_MMCM0_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3676 <PARAMETER MPD_INDEX="291" NAME="C_MMCM0_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3677 <PARAMETER MPD_INDEX="292" NAME="C_MMCM0_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
3678 <PARAMETER MPD_INDEX="293" NAME="C_MMCM0_CLKOUT6_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3679 <PARAMETER MPD_INDEX="294" NAME="C_MMCM0_CLKOUT6_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3680 <PARAMETER MPD_INDEX="295" NAME="C_MMCM0_CLKOUT6_PHASE" TYPE="REAL" VALUE="0.000000"/>
3681 <PARAMETER MPD_INDEX="296" NAME="C_MMCM0_CLKOUT0_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3682 <PARAMETER MPD_INDEX="297" NAME="C_MMCM0_CLKOUT1_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3683 <PARAMETER MPD_INDEX="298" NAME="C_MMCM0_CLKOUT2_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3684 <PARAMETER MPD_INDEX="299" NAME="C_MMCM0_CLKOUT3_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3685 <PARAMETER MPD_INDEX="300" NAME="C_MMCM0_CLKOUT4_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3686 <PARAMETER MPD_INDEX="301" NAME="C_MMCM0_CLKOUT5_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3687 <PARAMETER MPD_INDEX="302" NAME="C_MMCM0_CLKOUT6_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3688 <PARAMETER MPD_INDEX="303" NAME="C_MMCM0_COMPENSATION" TYPE="STRING" VALUE="ZHOLD"/>
3689 <PARAMETER MPD_INDEX="304" NAME="C_MMCM0_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3690 <PARAMETER MPD_INDEX="305" NAME="C_MMCM0_REF_JITTER1" TYPE="REAL" VALUE="0.010000"/>
3691 <PARAMETER MPD_INDEX="306" NAME="C_MMCM0_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3692 <PARAMETER MPD_INDEX="307" NAME="C_MMCM0_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
3693 <PARAMETER MPD_INDEX="308" NAME="C_MMCM0_CLOCK_HOLD" TYPE="BOOLEAN" VALUE="false"/>
3694 <PARAMETER MPD_INDEX="309" NAME="C_MMCM0_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
3695 <PARAMETER MPD_INDEX="310" NAME="C_MMCM0_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3696 <PARAMETER MPD_INDEX="311" NAME="C_MMCM0_FAMILY" TYPE="STRING" VALUE="virtex6"/>
3697 <PARAMETER MPD_INDEX="312" NAME="C_MMCM0_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3698 <PARAMETER MPD_INDEX="313" NAME="C_MMCM0_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3699 <PARAMETER MPD_INDEX="314" NAME="C_MMCM0_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
3700 <PARAMETER MPD_INDEX="315" NAME="C_MMCM0_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
3701 <PARAMETER MPD_INDEX="316" NAME="C_MMCM0_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
3702 <PARAMETER MPD_INDEX="317" NAME="C_MMCM0_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
3703 <PARAMETER MPD_INDEX="318" NAME="C_MMCM0_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="false"/>
3704 <PARAMETER MPD_INDEX="319" NAME="C_MMCM0_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
3705 <PARAMETER MPD_INDEX="320" NAME="C_MMCM0_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
3706 <PARAMETER MPD_INDEX="321" NAME="C_MMCM0_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3707 <PARAMETER MPD_INDEX="322" NAME="C_MMCM0_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
3708 <PARAMETER MPD_INDEX="323" NAME="C_MMCM0_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3709 <PARAMETER MPD_INDEX="324" NAME="C_MMCM1_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
3710 <PARAMETER MPD_INDEX="325" NAME="C_MMCM1_CLKFBOUT_MULT_F" TYPE="REAL" VALUE="1.000000"/>
3711 <PARAMETER MPD_INDEX="326" NAME="C_MMCM1_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
3712 <PARAMETER MPD_INDEX="327" NAME="C_MMCM1_CLKFBOUT_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3713 <PARAMETER MPD_INDEX="328" NAME="C_MMCM1_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3714 <PARAMETER MPD_INDEX="329" NAME="C_MMCM1_CLKOUT0_DIVIDE_F" TYPE="REAL" VALUE="1.000000"/>
3715 <PARAMETER MPD_INDEX="330" NAME="C_MMCM1_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3716 <PARAMETER MPD_INDEX="331" NAME="C_MMCM1_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
3717 <PARAMETER MPD_INDEX="332" NAME="C_MMCM1_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3718 <PARAMETER MPD_INDEX="333" NAME="C_MMCM1_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3719 <PARAMETER MPD_INDEX="334" NAME="C_MMCM1_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
3720 <PARAMETER MPD_INDEX="335" NAME="C_MMCM1_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3721 <PARAMETER MPD_INDEX="336" NAME="C_MMCM1_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3722 <PARAMETER MPD_INDEX="337" NAME="C_MMCM1_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
3723 <PARAMETER MPD_INDEX="338" NAME="C_MMCM1_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3724 <PARAMETER MPD_INDEX="339" NAME="C_MMCM1_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3725 <PARAMETER MPD_INDEX="340" NAME="C_MMCM1_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
3726 <PARAMETER MPD_INDEX="341" NAME="C_MMCM1_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3727 <PARAMETER MPD_INDEX="342" NAME="C_MMCM1_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3728 <PARAMETER MPD_INDEX="343" NAME="C_MMCM1_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
3729 <PARAMETER MPD_INDEX="344" NAME="C_MMCM1_CLKOUT4_CASCADE" TYPE="BOOLEAN" VALUE="false"/>
3730 <PARAMETER MPD_INDEX="345" NAME="C_MMCM1_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3731 <PARAMETER MPD_INDEX="346" NAME="C_MMCM1_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3732 <PARAMETER MPD_INDEX="347" NAME="C_MMCM1_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
3733 <PARAMETER MPD_INDEX="348" NAME="C_MMCM1_CLKOUT6_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3734 <PARAMETER MPD_INDEX="349" NAME="C_MMCM1_CLKOUT6_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3735 <PARAMETER MPD_INDEX="350" NAME="C_MMCM1_CLKOUT6_PHASE" TYPE="REAL" VALUE="0.000000"/>
3736 <PARAMETER MPD_INDEX="351" NAME="C_MMCM1_CLKOUT0_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3737 <PARAMETER MPD_INDEX="352" NAME="C_MMCM1_CLKOUT1_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3738 <PARAMETER MPD_INDEX="353" NAME="C_MMCM1_CLKOUT2_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3739 <PARAMETER MPD_INDEX="354" NAME="C_MMCM1_CLKOUT3_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3740 <PARAMETER MPD_INDEX="355" NAME="C_MMCM1_CLKOUT4_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3741 <PARAMETER MPD_INDEX="356" NAME="C_MMCM1_CLKOUT5_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3742 <PARAMETER MPD_INDEX="357" NAME="C_MMCM1_CLKOUT6_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3743 <PARAMETER MPD_INDEX="358" NAME="C_MMCM1_COMPENSATION" TYPE="STRING" VALUE="ZHOLD"/>
3744 <PARAMETER MPD_INDEX="359" NAME="C_MMCM1_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3745 <PARAMETER MPD_INDEX="360" NAME="C_MMCM1_REF_JITTER1" TYPE="REAL" VALUE="0.010000"/>
3746 <PARAMETER MPD_INDEX="361" NAME="C_MMCM1_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3747 <PARAMETER MPD_INDEX="362" NAME="C_MMCM1_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
3748 <PARAMETER MPD_INDEX="363" NAME="C_MMCM1_CLOCK_HOLD" TYPE="BOOLEAN" VALUE="false"/>
3749 <PARAMETER MPD_INDEX="364" NAME="C_MMCM1_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
3750 <PARAMETER MPD_INDEX="365" NAME="C_MMCM1_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3751 <PARAMETER MPD_INDEX="366" NAME="C_MMCM1_FAMILY" TYPE="STRING" VALUE="virtex6"/>
3752 <PARAMETER MPD_INDEX="367" NAME="C_MMCM1_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3753 <PARAMETER MPD_INDEX="368" NAME="C_MMCM1_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3754 <PARAMETER MPD_INDEX="369" NAME="C_MMCM1_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
3755 <PARAMETER MPD_INDEX="370" NAME="C_MMCM1_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
3756 <PARAMETER MPD_INDEX="371" NAME="C_MMCM1_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
3757 <PARAMETER MPD_INDEX="372" NAME="C_MMCM1_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
3758 <PARAMETER MPD_INDEX="373" NAME="C_MMCM1_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="false"/>
3759 <PARAMETER MPD_INDEX="374" NAME="C_MMCM1_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
3760 <PARAMETER MPD_INDEX="375" NAME="C_MMCM1_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
3761 <PARAMETER MPD_INDEX="376" NAME="C_MMCM1_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3762 <PARAMETER MPD_INDEX="377" NAME="C_MMCM1_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
3763 <PARAMETER MPD_INDEX="378" NAME="C_MMCM1_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3764 <PARAMETER MPD_INDEX="379" NAME="C_MMCM2_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
3765 <PARAMETER MPD_INDEX="380" NAME="C_MMCM2_CLKFBOUT_MULT_F" TYPE="REAL" VALUE="1.000000"/>
3766 <PARAMETER MPD_INDEX="381" NAME="C_MMCM2_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
3767 <PARAMETER MPD_INDEX="382" NAME="C_MMCM2_CLKFBOUT_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3768 <PARAMETER MPD_INDEX="383" NAME="C_MMCM2_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3769 <PARAMETER MPD_INDEX="384" NAME="C_MMCM2_CLKOUT0_DIVIDE_F" TYPE="REAL" VALUE="1.000000"/>
3770 <PARAMETER MPD_INDEX="385" NAME="C_MMCM2_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3771 <PARAMETER MPD_INDEX="386" NAME="C_MMCM2_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
3772 <PARAMETER MPD_INDEX="387" NAME="C_MMCM2_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3773 <PARAMETER MPD_INDEX="388" NAME="C_MMCM2_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3774 <PARAMETER MPD_INDEX="389" NAME="C_MMCM2_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
3775 <PARAMETER MPD_INDEX="390" NAME="C_MMCM2_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3776 <PARAMETER MPD_INDEX="391" NAME="C_MMCM2_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3777 <PARAMETER MPD_INDEX="392" NAME="C_MMCM2_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
3778 <PARAMETER MPD_INDEX="393" NAME="C_MMCM2_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3779 <PARAMETER MPD_INDEX="394" NAME="C_MMCM2_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3780 <PARAMETER MPD_INDEX="395" NAME="C_MMCM2_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
3781 <PARAMETER MPD_INDEX="396" NAME="C_MMCM2_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3782 <PARAMETER MPD_INDEX="397" NAME="C_MMCM2_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3783 <PARAMETER MPD_INDEX="398" NAME="C_MMCM2_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
3784 <PARAMETER MPD_INDEX="399" NAME="C_MMCM2_CLKOUT4_CASCADE" TYPE="BOOLEAN" VALUE="false"/>
3785 <PARAMETER MPD_INDEX="400" NAME="C_MMCM2_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3786 <PARAMETER MPD_INDEX="401" NAME="C_MMCM2_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3787 <PARAMETER MPD_INDEX="402" NAME="C_MMCM2_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
3788 <PARAMETER MPD_INDEX="403" NAME="C_MMCM2_CLKOUT6_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3789 <PARAMETER MPD_INDEX="404" NAME="C_MMCM2_CLKOUT6_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3790 <PARAMETER MPD_INDEX="405" NAME="C_MMCM2_CLKOUT6_PHASE" TYPE="REAL" VALUE="0.000000"/>
3791 <PARAMETER MPD_INDEX="406" NAME="C_MMCM2_CLKOUT0_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3792 <PARAMETER MPD_INDEX="407" NAME="C_MMCM2_CLKOUT1_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3793 <PARAMETER MPD_INDEX="408" NAME="C_MMCM2_CLKOUT2_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3794 <PARAMETER MPD_INDEX="409" NAME="C_MMCM2_CLKOUT3_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3795 <PARAMETER MPD_INDEX="410" NAME="C_MMCM2_CLKOUT4_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3796 <PARAMETER MPD_INDEX="411" NAME="C_MMCM2_CLKOUT5_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3797 <PARAMETER MPD_INDEX="412" NAME="C_MMCM2_CLKOUT6_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3798 <PARAMETER MPD_INDEX="413" NAME="C_MMCM2_COMPENSATION" TYPE="STRING" VALUE="ZHOLD"/>
3799 <PARAMETER MPD_INDEX="414" NAME="C_MMCM2_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3800 <PARAMETER MPD_INDEX="415" NAME="C_MMCM2_REF_JITTER1" TYPE="REAL" VALUE="0.010000"/>
3801 <PARAMETER MPD_INDEX="416" NAME="C_MMCM2_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3802 <PARAMETER MPD_INDEX="417" NAME="C_MMCM2_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
3803 <PARAMETER MPD_INDEX="418" NAME="C_MMCM2_CLOCK_HOLD" TYPE="BOOLEAN" VALUE="false"/>
3804 <PARAMETER MPD_INDEX="419" NAME="C_MMCM2_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
3805 <PARAMETER MPD_INDEX="420" NAME="C_MMCM2_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3806 <PARAMETER MPD_INDEX="421" NAME="C_MMCM2_FAMILY" TYPE="STRING" VALUE="virtex6"/>
3807 <PARAMETER MPD_INDEX="422" NAME="C_MMCM2_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3808 <PARAMETER MPD_INDEX="423" NAME="C_MMCM2_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3809 <PARAMETER MPD_INDEX="424" NAME="C_MMCM2_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
3810 <PARAMETER MPD_INDEX="425" NAME="C_MMCM2_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
3811 <PARAMETER MPD_INDEX="426" NAME="C_MMCM2_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
3812 <PARAMETER MPD_INDEX="427" NAME="C_MMCM2_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
3813 <PARAMETER MPD_INDEX="428" NAME="C_MMCM2_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="false"/>
3814 <PARAMETER MPD_INDEX="429" NAME="C_MMCM2_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
3815 <PARAMETER MPD_INDEX="430" NAME="C_MMCM2_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
3816 <PARAMETER MPD_INDEX="431" NAME="C_MMCM2_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3817 <PARAMETER MPD_INDEX="432" NAME="C_MMCM2_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
3818 <PARAMETER MPD_INDEX="433" NAME="C_MMCM2_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3819 <PARAMETER MPD_INDEX="434" NAME="C_MMCM3_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
3820 <PARAMETER MPD_INDEX="435" NAME="C_MMCM3_CLKFBOUT_MULT_F" TYPE="REAL" VALUE="1.000000"/>
3821 <PARAMETER MPD_INDEX="436" NAME="C_MMCM3_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
3822 <PARAMETER MPD_INDEX="437" NAME="C_MMCM3_CLKFBOUT_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3823 <PARAMETER MPD_INDEX="438" NAME="C_MMCM3_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
3824 <PARAMETER MPD_INDEX="439" NAME="C_MMCM3_CLKOUT0_DIVIDE_F" TYPE="REAL" VALUE="1.000000"/>
3825 <PARAMETER MPD_INDEX="440" NAME="C_MMCM3_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3826 <PARAMETER MPD_INDEX="441" NAME="C_MMCM3_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
3827 <PARAMETER MPD_INDEX="442" NAME="C_MMCM3_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3828 <PARAMETER MPD_INDEX="443" NAME="C_MMCM3_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3829 <PARAMETER MPD_INDEX="444" NAME="C_MMCM3_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
3830 <PARAMETER MPD_INDEX="445" NAME="C_MMCM3_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3831 <PARAMETER MPD_INDEX="446" NAME="C_MMCM3_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3832 <PARAMETER MPD_INDEX="447" NAME="C_MMCM3_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
3833 <PARAMETER MPD_INDEX="448" NAME="C_MMCM3_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3834 <PARAMETER MPD_INDEX="449" NAME="C_MMCM3_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3835 <PARAMETER MPD_INDEX="450" NAME="C_MMCM3_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
3836 <PARAMETER MPD_INDEX="451" NAME="C_MMCM3_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3837 <PARAMETER MPD_INDEX="452" NAME="C_MMCM3_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3838 <PARAMETER MPD_INDEX="453" NAME="C_MMCM3_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
3839 <PARAMETER MPD_INDEX="454" NAME="C_MMCM3_CLKOUT4_CASCADE" TYPE="BOOLEAN" VALUE="false"/>
3840 <PARAMETER MPD_INDEX="455" NAME="C_MMCM3_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3841 <PARAMETER MPD_INDEX="456" NAME="C_MMCM3_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3842 <PARAMETER MPD_INDEX="457" NAME="C_MMCM3_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
3843 <PARAMETER MPD_INDEX="458" NAME="C_MMCM3_CLKOUT6_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3844 <PARAMETER MPD_INDEX="459" NAME="C_MMCM3_CLKOUT6_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
3845 <PARAMETER MPD_INDEX="460" NAME="C_MMCM3_CLKOUT6_PHASE" TYPE="REAL" VALUE="0.000000"/>
3846 <PARAMETER MPD_INDEX="461" NAME="C_MMCM3_CLKOUT0_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3847 <PARAMETER MPD_INDEX="462" NAME="C_MMCM3_CLKOUT1_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3848 <PARAMETER MPD_INDEX="463" NAME="C_MMCM3_CLKOUT2_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3849 <PARAMETER MPD_INDEX="464" NAME="C_MMCM3_CLKOUT3_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3850 <PARAMETER MPD_INDEX="465" NAME="C_MMCM3_CLKOUT4_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3851 <PARAMETER MPD_INDEX="466" NAME="C_MMCM3_CLKOUT5_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3852 <PARAMETER MPD_INDEX="467" NAME="C_MMCM3_CLKOUT6_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
3853 <PARAMETER MPD_INDEX="468" NAME="C_MMCM3_COMPENSATION" TYPE="STRING" VALUE="ZHOLD"/>
3854 <PARAMETER MPD_INDEX="469" NAME="C_MMCM3_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
3855 <PARAMETER MPD_INDEX="470" NAME="C_MMCM3_REF_JITTER1" TYPE="REAL" VALUE="0.010000"/>
3856 <PARAMETER MPD_INDEX="471" NAME="C_MMCM3_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3857 <PARAMETER MPD_INDEX="472" NAME="C_MMCM3_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
3858 <PARAMETER MPD_INDEX="473" NAME="C_MMCM3_CLOCK_HOLD" TYPE="BOOLEAN" VALUE="false"/>
3859 <PARAMETER MPD_INDEX="474" NAME="C_MMCM3_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
3860 <PARAMETER MPD_INDEX="475" NAME="C_MMCM3_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
3861 <PARAMETER MPD_INDEX="476" NAME="C_MMCM3_FAMILY" TYPE="STRING" VALUE="virtex6"/>
3862 <PARAMETER MPD_INDEX="477" NAME="C_MMCM3_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
3863 <PARAMETER MPD_INDEX="478" NAME="C_MMCM3_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
3864 <PARAMETER MPD_INDEX="479" NAME="C_MMCM3_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
3865 <PARAMETER MPD_INDEX="480" NAME="C_MMCM3_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
3866 <PARAMETER MPD_INDEX="481" NAME="C_MMCM3_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
3867 <PARAMETER MPD_INDEX="482" NAME="C_MMCM3_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
3868 <PARAMETER MPD_INDEX="483" NAME="C_MMCM3_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="false"/>
3869 <PARAMETER MPD_INDEX="484" NAME="C_MMCM3_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
3870 <PARAMETER MPD_INDEX="485" NAME="C_MMCM3_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
3871 <PARAMETER MPD_INDEX="486" NAME="C_MMCM3_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
3872 <PARAMETER MPD_INDEX="487" NAME="C_MMCM3_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
3873 <PARAMETER MPD_INDEX="488" NAME="C_MMCM3_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
3874 <PARAMETER CHANGEDBY="USER" MPD_INDEX="489" NAME="C_CLKIN_FREQ" TYPE="INTEGER" VALUE="100000000"/>
3875 <PARAMETER CHANGEDBY="USER" MPD_INDEX="490" NAME="C_CLKFBIN_FREQ" TYPE="INTEGER" VALUE="125000000"/>
3876 <PARAMETER MPD_INDEX="491" NAME="C_CLKFBIN_DESKEW" TYPE="STRING" VALUE="NONE"/>
3877 <PARAMETER MPD_INDEX="492" NAME="C_PSDONE_GROUP" TYPE="STRING" VALUE="NONE"/>
3878 <PARAMETER CHANGEDBY="USER" MPD_INDEX="493" NAME="C_CLKOUT0_FREQ" TYPE="INTEGER" VALUE="125000000"/>
3879 <PARAMETER CHANGEDBY="USER" MPD_INDEX="494" NAME="C_CLKOUT0_PHASE" TYPE="INTEGER" VALUE="90"/>
3880 <PARAMETER CHANGEDBY="USER" MPD_INDEX="495" NAME="C_CLKOUT0_GROUP" TYPE="STRING" VALUE="PLL0_ADJUST"/>
3881 <PARAMETER MPD_INDEX="496" NAME="C_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3882 <PARAMETER MPD_INDEX="497" NAME="C_CLKOUT0_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3883 <PARAMETER CHANGEDBY="USER" MPD_INDEX="498" NAME="C_CLKOUT1_FREQ" TYPE="INTEGER" VALUE="125000000"/>
3884 <PARAMETER MPD_INDEX="499" NAME="C_CLKOUT1_PHASE" TYPE="INTEGER" VALUE="0"/>
3885 <PARAMETER CHANGEDBY="USER" MPD_INDEX="500" NAME="C_CLKOUT1_GROUP" TYPE="STRING" VALUE="PLL0"/>
3886 <PARAMETER MPD_INDEX="501" NAME="C_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3887 <PARAMETER MPD_INDEX="502" NAME="C_CLKOUT1_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3888 <PARAMETER CHANGEDBY="USER" MPD_INDEX="503" NAME="C_CLKOUT2_FREQ" TYPE="INTEGER" VALUE="125000000"/>
3889 <PARAMETER MPD_INDEX="504" NAME="C_CLKOUT2_PHASE" TYPE="INTEGER" VALUE="0"/>
3890 <PARAMETER CHANGEDBY="USER" MPD_INDEX="505" NAME="C_CLKOUT2_GROUP" TYPE="STRING" VALUE="PLL0_ADJUST"/>
3891 <PARAMETER MPD_INDEX="506" NAME="C_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3892 <PARAMETER MPD_INDEX="507" NAME="C_CLKOUT2_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3893 <PARAMETER CHANGEDBY="USER" MPD_INDEX="508" NAME="C_CLKOUT3_FREQ" TYPE="INTEGER" VALUE="200000000"/>
3894 <PARAMETER MPD_INDEX="509" NAME="C_CLKOUT3_PHASE" TYPE="INTEGER" VALUE="0"/>
3895 <PARAMETER MPD_INDEX="510" NAME="C_CLKOUT3_GROUP" TYPE="STRING" VALUE="NONE"/>
3896 <PARAMETER MPD_INDEX="511" NAME="C_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3897 <PARAMETER MPD_INDEX="512" NAME="C_CLKOUT3_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3898 <PARAMETER CHANGEDBY="USER" MPD_INDEX="513" NAME="C_CLKOUT4_FREQ" TYPE="INTEGER" VALUE="62500000"/>
3899 <PARAMETER MPD_INDEX="514" NAME="C_CLKOUT4_PHASE" TYPE="INTEGER" VALUE="0"/>
3900 <PARAMETER CHANGEDBY="USER" MPD_INDEX="515" NAME="C_CLKOUT4_GROUP" TYPE="STRING" VALUE="PLL0_ADJUST"/>
3901 <PARAMETER MPD_INDEX="516" NAME="C_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3902 <PARAMETER MPD_INDEX="517" NAME="C_CLKOUT4_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3903 <PARAMETER MPD_INDEX="518" NAME="C_CLKOUT5_FREQ" TYPE="INTEGER" VALUE="0"/>
3904 <PARAMETER MPD_INDEX="519" NAME="C_CLKOUT5_PHASE" TYPE="INTEGER" VALUE="0"/>
3905 <PARAMETER MPD_INDEX="520" NAME="C_CLKOUT5_GROUP" TYPE="STRING" VALUE="NONE"/>
3906 <PARAMETER MPD_INDEX="521" NAME="C_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3907 <PARAMETER MPD_INDEX="522" NAME="C_CLKOUT5_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3908 <PARAMETER MPD_INDEX="523" NAME="C_CLKOUT6_FREQ" TYPE="INTEGER" VALUE="0"/>
3909 <PARAMETER MPD_INDEX="524" NAME="C_CLKOUT6_PHASE" TYPE="INTEGER" VALUE="0"/>
3910 <PARAMETER MPD_INDEX="525" NAME="C_CLKOUT6_GROUP" TYPE="STRING" VALUE="NONE"/>
3911 <PARAMETER MPD_INDEX="526" NAME="C_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3912 <PARAMETER MPD_INDEX="527" NAME="C_CLKOUT6_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3913 <PARAMETER MPD_INDEX="528" NAME="C_CLKOUT7_FREQ" TYPE="INTEGER" VALUE="0"/>
3914 <PARAMETER MPD_INDEX="529" NAME="C_CLKOUT7_PHASE" TYPE="INTEGER" VALUE="0"/>
3915 <PARAMETER MPD_INDEX="530" NAME="C_CLKOUT7_GROUP" TYPE="STRING" VALUE="NONE"/>
3916 <PARAMETER MPD_INDEX="531" NAME="C_CLKOUT7_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3917 <PARAMETER MPD_INDEX="532" NAME="C_CLKOUT7_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3918 <PARAMETER MPD_INDEX="533" NAME="C_CLKOUT8_FREQ" TYPE="INTEGER" VALUE="0"/>
3919 <PARAMETER MPD_INDEX="534" NAME="C_CLKOUT8_PHASE" TYPE="INTEGER" VALUE="0"/>
3920 <PARAMETER MPD_INDEX="535" NAME="C_CLKOUT8_GROUP" TYPE="STRING" VALUE="NONE"/>
3921 <PARAMETER MPD_INDEX="536" NAME="C_CLKOUT8_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3922 <PARAMETER MPD_INDEX="537" NAME="C_CLKOUT8_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3923 <PARAMETER MPD_INDEX="538" NAME="C_CLKOUT9_FREQ" TYPE="INTEGER" VALUE="0"/>
3924 <PARAMETER MPD_INDEX="539" NAME="C_CLKOUT9_PHASE" TYPE="INTEGER" VALUE="0"/>
3925 <PARAMETER MPD_INDEX="540" NAME="C_CLKOUT9_GROUP" TYPE="STRING" VALUE="NONE"/>
3926 <PARAMETER MPD_INDEX="541" NAME="C_CLKOUT9_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3927 <PARAMETER MPD_INDEX="542" NAME="C_CLKOUT9_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3928 <PARAMETER MPD_INDEX="543" NAME="C_CLKOUT10_FREQ" TYPE="INTEGER" VALUE="0"/>
3929 <PARAMETER MPD_INDEX="544" NAME="C_CLKOUT10_PHASE" TYPE="INTEGER" VALUE="0"/>
3930 <PARAMETER MPD_INDEX="545" NAME="C_CLKOUT10_GROUP" TYPE="STRING" VALUE="NONE"/>
3931 <PARAMETER MPD_INDEX="546" NAME="C_CLKOUT10_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3932 <PARAMETER MPD_INDEX="547" NAME="C_CLKOUT10_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3933 <PARAMETER MPD_INDEX="548" NAME="C_CLKOUT11_FREQ" TYPE="INTEGER" VALUE="0"/>
3934 <PARAMETER MPD_INDEX="549" NAME="C_CLKOUT11_PHASE" TYPE="INTEGER" VALUE="0"/>
3935 <PARAMETER MPD_INDEX="550" NAME="C_CLKOUT11_GROUP" TYPE="STRING" VALUE="NONE"/>
3936 <PARAMETER MPD_INDEX="551" NAME="C_CLKOUT11_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3937 <PARAMETER MPD_INDEX="552" NAME="C_CLKOUT11_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3938 <PARAMETER MPD_INDEX="553" NAME="C_CLKOUT12_FREQ" TYPE="INTEGER" VALUE="0"/>
3939 <PARAMETER MPD_INDEX="554" NAME="C_CLKOUT12_PHASE" TYPE="INTEGER" VALUE="0"/>
3940 <PARAMETER MPD_INDEX="555" NAME="C_CLKOUT12_GROUP" TYPE="STRING" VALUE="NONE"/>
3941 <PARAMETER MPD_INDEX="556" NAME="C_CLKOUT12_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3942 <PARAMETER MPD_INDEX="557" NAME="C_CLKOUT12_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3943 <PARAMETER MPD_INDEX="558" NAME="C_CLKOUT13_FREQ" TYPE="INTEGER" VALUE="0"/>
3944 <PARAMETER MPD_INDEX="559" NAME="C_CLKOUT13_PHASE" TYPE="INTEGER" VALUE="0"/>
3945 <PARAMETER MPD_INDEX="560" NAME="C_CLKOUT13_GROUP" TYPE="STRING" VALUE="NONE"/>
3946 <PARAMETER MPD_INDEX="561" NAME="C_CLKOUT13_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3947 <PARAMETER MPD_INDEX="562" NAME="C_CLKOUT13_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3948 <PARAMETER MPD_INDEX="563" NAME="C_CLKOUT14_FREQ" TYPE="INTEGER" VALUE="0"/>
3949 <PARAMETER MPD_INDEX="564" NAME="C_CLKOUT14_PHASE" TYPE="INTEGER" VALUE="0"/>
3950 <PARAMETER MPD_INDEX="565" NAME="C_CLKOUT14_GROUP" TYPE="STRING" VALUE="NONE"/>
3951 <PARAMETER MPD_INDEX="566" NAME="C_CLKOUT14_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3952 <PARAMETER MPD_INDEX="567" NAME="C_CLKOUT14_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3953 <PARAMETER MPD_INDEX="568" NAME="C_CLKOUT15_FREQ" TYPE="INTEGER" VALUE="0"/>
3954 <PARAMETER MPD_INDEX="569" NAME="C_CLKOUT15_PHASE" TYPE="INTEGER" VALUE="0"/>
3955 <PARAMETER MPD_INDEX="570" NAME="C_CLKOUT15_GROUP" TYPE="STRING" VALUE="NONE"/>
3956 <PARAMETER MPD_INDEX="571" NAME="C_CLKOUT15_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3957 <PARAMETER MPD_INDEX="572" NAME="C_CLKOUT15_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
3958 <PARAMETER CHANGEDBY="USER" MPD_INDEX="573" NAME="C_CLKFBOUT_FREQ" TYPE="INTEGER" VALUE="125000000"/>
3959 <PARAMETER MPD_INDEX="574" NAME="C_CLKFBOUT_PHASE" TYPE="INTEGER" VALUE="0"/>
3960 <PARAMETER MPD_INDEX="575" NAME="C_CLKFBOUT_GROUP" TYPE="STRING" VALUE="NONE"/>
3961 <PARAMETER MPD_INDEX="576" NAME="C_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
3962 <PORT CLKFREQUENCY="100000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="CLKIN" SIGIS="CLK" SIGNAME="dcm_clk_s"/>
3963 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="CLKFBIN" SIGIS="CLK" SIGNAME="SRAM_CLK_FB_s"/>
3964 <PORT CLKFREQUENCY="125000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="CLKOUT0" SIGIS="CLK" SIGNAME="clk_125_0000MHz90PLL0_ADJUST"/>
3965 <PORT CLKFREQUENCY="125000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="CLKOUT1" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0"/>
3966 <PORT CLKFREQUENCY="125000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="CLKOUT2" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
3967 <PORT CLKFREQUENCY="200000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="5" NAME="CLKOUT3" SIGIS="CLK" SIGNAME="clk_200_0000MHz"/>
3968 <PORT CLKFREQUENCY="62500000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="6" NAME="CLKOUT4" SIGIS="CLK" SIGNAME="clk_62_5000MHzPLL0_ADJUST"/>
3969 <PORT CLKFREQUENCY="125000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="7" MPD_INDEX="18" NAME="CLKFBOUT" SIGIS="CLK" SIGNAME="SRAM_CLK_OUT_s"/>
3970 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="8" MPD_INDEX="23" NAME="RST" SIGIS="RST" SIGNAME="net_gnd"/>
3971 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="9" MPD_INDEX="24" NAME="LOCKED" SIGNAME="Dcm_all_locked"/>
3972 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="7" NAME="CLKOUT5" SIGIS="CLK" SIGNAME="__NOC__"/>
3973 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="8" NAME="CLKOUT6" SIGIS="CLK" SIGNAME="__NOC__"/>
3974 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="9" NAME="CLKOUT7" SIGIS="CLK" SIGNAME="__NOC__"/>
3975 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="10" NAME="CLKOUT8" SIGIS="CLK" SIGNAME="__NOC__"/>
3976 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="11" NAME="CLKOUT9" SIGIS="CLK" SIGNAME="__NOC__"/>
3977 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="12" NAME="CLKOUT10" SIGIS="CLK" SIGNAME="__NOC__"/>
3978 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="13" NAME="CLKOUT11" SIGIS="CLK" SIGNAME="__NOC__"/>
3979 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="14" NAME="CLKOUT12" SIGIS="CLK" SIGNAME="__NOC__"/>
3980 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="15" NAME="CLKOUT13" SIGIS="CLK" SIGNAME="__NOC__"/>
3981 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="16" NAME="CLKOUT14" SIGIS="CLK" SIGNAME="__NOC__"/>
3982 <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="17" NAME="CLKOUT15" SIGIS="CLK" SIGNAME="__NOC__"/>
3983 <PORT DIR="I" MPD_INDEX="19" NAME="PSCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
3984 <PORT DIR="I" MPD_INDEX="20" NAME="PSEN" SIGNAME="__NOC__"/>
3985 <PORT DIR="I" MPD_INDEX="21" NAME="PSINCDEC" SIGNAME="__NOC__"/>
3986 <PORT DIR="O" MPD_INDEX="22" NAME="PSDONE" SIGNAME="__NOC__"/>
3988 <MODULE HWVERSION="2.01.c" INSTANCE="jtagppc_cntlr_inst" IPTYPE="PERIPHERAL" MHS_INDEX="17" MODCLASS="PERIPHERAL" MODTYPE="jtagppc_cntlr">
3989 <DESCRIPTION TYPE="SHORT">PowerPC JTAG Controller</DESCRIPTION>
3990 <DESCRIPTION TYPE="LONG">JTAGPPC wrapper allows the PowerPC to connect to the JTAG chain of the FPGA.</DESCRIPTION>
3992 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/jtagppc_cntlr_v2_01_c/doc/jtagppc_cntlr.pdf" TYPE="IP"/>
3994 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
3995 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_DEVICE" TYPE="string" VALUE="5vfx70t"/>
3996 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_NUM_PPC_USED" TYPE="integer" VALUE="1"/>
3997 <PORT DIR="I" MPD_INDEX="0" NAME="TRSTNEG" SIGNAME="__NOC__"/>
3998 <PORT DIR="I" MPD_INDEX="1" NAME="HALTNEG0" SIGNAME="__NOC__"/>
3999 <PORT DIR="O" MPD_INDEX="2" NAME="DBGC405DEBUGHALT0" SIGNAME="__NOC__"/>
4000 <PORT DIR="I" MPD_INDEX="3" NAME="HALTNEG1" SIGNAME="__NOC__"/>
4001 <PORT DIR="O" MPD_INDEX="4" NAME="DBGC405DEBUGHALT1" SIGNAME="__NOC__"/>
4002 <PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO" DIR="I" MPD_INDEX="5" NAME="C405JTGTDO0" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO"/>
4003 <PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN" DIR="I" MPD_INDEX="6" NAME="C405JTGTDOEN0" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN"/>
4004 <PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK" DIR="O" MPD_INDEX="7" NAME="JTGC405TCK0" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK"/>
4005 <PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI" DIR="O" MPD_INDEX="8" NAME="JTGC405TDI0" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI"/>
4006 <PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS" DIR="O" MPD_INDEX="9" NAME="JTGC405TMS0" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS"/>
4007 <PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG" DIR="O" MPD_INDEX="10" NAME="JTGC405TRSTNEG0" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG"/>
4008 <PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="11" NAME="C405JTGTDO1" SIGNAME="__NOC__"/>
4009 <PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="12" NAME="C405JTGTDOEN1" SIGNAME="__NOC__"/>
4010 <PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="13" NAME="JTGC405TCK1" SIGNAME="__NOC__"/>
4011 <PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="14" NAME="JTGC405TDI1" SIGNAME="__NOC__"/>
4012 <PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="15" NAME="JTGC405TMS1" SIGNAME="__NOC__"/>
4013 <PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="16" NAME="JTGC405TRSTNEG1" SIGNAME="__NOC__"/>
4014 <BUSINTERFACE BUSNAME="ppc440_0_jtagppc_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_JTAGPPC" IS_INMHS="TRUE" MPD_INDEX="0" NAME="JTAGPPC0" TYPE="INITIATOR"/>
4015 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_JTAGPPC" IS_VALID="FALSE" MPD_INDEX="1" NAME="JTAGPPC1" TYPE="INITIATOR"/>
4017 <MODULE HWVERSION="2.00.a" INSTANCE="proc_sys_reset_0" IPTYPE="PERIPHERAL" MHS_INDEX="18" MODCLASS="PERIPHERAL" MODTYPE="proc_sys_reset">
4018 <DESCRIPTION TYPE="SHORT">Processor System Reset Module</DESCRIPTION>
4019 <DESCRIPTION TYPE="LONG">Reset management module</DESCRIPTION>
4021 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_sys_reset_v2_00_a/doc/proc_sys_reset.pdf" TYPE="IP"/>
4023 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
4024 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_SUBFAMILY" TYPE="string" VALUE="fx">
4025 <DESCRIPTION>Device Subfamily</DESCRIPTION>
4027 <PARAMETER MPD_INDEX="1" NAME="C_EXT_RST_WIDTH" TYPE="integer" VALUE="4">
4028 <DESCRIPTION>Number of Clocks Before Input Change is Recognized On The External Reset Input </DESCRIPTION>
4030 <PARAMETER MPD_INDEX="2" NAME="C_AUX_RST_WIDTH" TYPE="integer" VALUE="4">
4031 <DESCRIPTION>Number of Clocks Before Input Change is Recognized On The Auxiliary Reset Input </DESCRIPTION>
4033 <PARAMETER CHANGEDBY="USER" MPD_INDEX="3" NAME="C_EXT_RESET_HIGH" TYPE="std_logic" VALUE="0">
4034 <DESCRIPTION>External Reset Active High </DESCRIPTION>
4036 <PARAMETER MPD_INDEX="4" NAME="C_AUX_RESET_HIGH" TYPE="std_logic" VALUE="1">
4037 <DESCRIPTION>Auxiliary Reset Active High </DESCRIPTION>
4039 <PARAMETER MPD_INDEX="5" NAME="C_NUM_BUS_RST" TYPE="integer" VALUE="1">
4040 <DESCRIPTION>Number of Bus Structure Reset Registered Outputs </DESCRIPTION>
4042 <PARAMETER MPD_INDEX="6" NAME="C_NUM_PERP_RST" TYPE="integer" VALUE="1">
4043 <DESCRIPTION>Number of Peripheral Reset Registered Outputs </DESCRIPTION>
4045 <PARAMETER MPD_INDEX="7" NAME="C_FAMILY" VALUE="virtex5">
4046 <DESCRIPTION>Device Family</DESCRIPTION>
4048 <PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="Slowest_sync_clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
4049 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="Ext_Reset_In" SIGIS="RST" SIGNAME="sys_rst_s"/>
4050 <PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="10" NAME="Dcm_locked" SIGNAME="Dcm_all_locked"/>
4051 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="18" NAME="Bus_Struct_Reset" SIGIS="RST" SIGNAME="sys_bus_reset" VECFORMULA="[0:C_NUM_BUS_RST-1]"/>
4052 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="19" NAME="Peripheral_Reset" SIGIS="RST" SIGNAME="sys_periph_reset" VECFORMULA="[0:C_NUM_PERP_RST-1]"/>
4053 <PORT DIR="I" MPD_INDEX="2" NAME="Aux_Reset_In" SIGIS="RST" SIGNAME="__NOC__"/>
4054 <PORT DIR="I" MPD_INDEX="3" NAME="MB_Debug_Sys_Rst" SIGIS="RST" SIGNAME="__NOC__"/>
4055 <PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_Core_Reset_Req" DIR="I" MPD_INDEX="4" NAME="Core_Reset_Req_0" SIGIS="RST" SIGNAME="ppc_reset_bus_Core_Reset_Req"/>
4056 <PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_Chip_Reset_Req" DIR="I" MPD_INDEX="5" NAME="Chip_Reset_Req_0" SIGIS="RST" SIGNAME="ppc_reset_bus_Chip_Reset_Req"/>
4057 <PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_System_Reset_Req" DIR="I" MPD_INDEX="6" NAME="System_Reset_Req_0" SIGIS="RST" SIGNAME="ppc_reset_bus_System_Reset_Req"/>
4058 <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="Core_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
4059 <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="Chip_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
4060 <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="System_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
4061 <PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetcore" DIR="O" MPD_INDEX="11" NAME="RstcPPCresetcore_0" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetcore"/>
4062 <PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_RstsPPCresetchip" DIR="O" MPD_INDEX="12" NAME="RstcPPCresetchip_0" SIGIS="RST" SIGNAME="ppc_reset_bus_RstsPPCresetchip"/>
4063 <PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetsys" DIR="O" MPD_INDEX="13" NAME="RstcPPCresetsys_0" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetsys"/>
4064 <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="14" NAME="RstcPPCresetcore_1" SIGIS="RST" SIGNAME="__NOC__"/>
4065 <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="15" NAME="RstcPPCresetchip_1" SIGIS="RST" SIGNAME="__NOC__"/>
4066 <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="16" NAME="RstcPPCresetsys_1" SIGIS="RST" SIGNAME="__NOC__"/>
4067 <PORT DIR="O" MPD_INDEX="17" NAME="MB_Reset" SIGIS="RST" SIGNAME="__NOC__"/>
4068 <BUSINTERFACE BUSNAME="ppc_reset_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_INMHS="TRUE" MPD_INDEX="0" NAME="RESETPPC0" TYPE="INITIATOR"/>
4069 <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_VALID="FALSE" MPD_INDEX="1" NAME="RESETPPC1" TYPE="INITIATOR"/>
4071 <MODULE HWVERSION="2.00.a" INSTANCE="xps_intc_0" IPTYPE="PERIPHERAL" MHS_INDEX="19" MODCLASS="INTERRUPT_CNTLR" MODTYPE="xps_intc">
4072 <DESCRIPTION TYPE="SHORT">XPS Interrupt Controller</DESCRIPTION>
4073 <DESCRIPTION TYPE="LONG">intc core attached to the PLBV46</DESCRIPTION>
4075 <DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_intc_v2_00_a/doc/xps_intc.pdf" TYPE="IP"/>
4077 <LICENSEINFO ICON_NAME="ps_core_preferred"/>
4078 <PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
4079 <DESCRIPTION>Device Family</DESCRIPTION>
4081 <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81800000">
4082 <DESCRIPTION>Base Address</DESCRIPTION>
4084 <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8180ffff">
4085 <DESCRIPTION>High Address</DESCRIPTION>
4087 <PARAMETER MPD_INDEX="3" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
4088 <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
4090 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
4091 <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
4093 <PARAMETER MPD_INDEX="5" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
4094 <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
4096 <PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
4097 <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
4099 <PARAMETER MPD_INDEX="7" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
4100 <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
4102 <PARAMETER MPD_INDEX="8" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
4103 <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
4105 <PARAMETER MPD_INDEX="9" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
4106 <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
4108 <PARAMETER MPD_INDEX="10" NAME="C_NUM_INTR_INPUTS" TYPE="INTEGER" VALUE="2">
4109 <DESCRIPTION>Number of Interrupt Inputs </DESCRIPTION>
4111 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_KIND_OF_INTR" TYPE="std_logic_vector(31 downto 0)" VALUE="0b00000000000000000000000000000001">
4112 <DESCRIPTION>Type of Interrupt for Each Input </DESCRIPTION>
4114 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_KIND_OF_EDGE" TYPE="std_logic_vector(31 downto 0)" VALUE="0b00000000000000000000000000000001">
4115 <DESCRIPTION>Type of Each Edge Senstive Interrupt </DESCRIPTION>
4117 <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_KIND_OF_LVL" TYPE="std_logic_vector(31 downto 0)" VALUE="0b00000000000000000000000000000000">
4118 <DESCRIPTION>Type of Each Level Sensitive Interrupt </DESCRIPTION>
4120 <PARAMETER MPD_INDEX="14" NAME="C_HAS_IPR" TYPE="INTEGER" VALUE="1">
4121 <DESCRIPTION>Support IPR </DESCRIPTION>
4123 <PARAMETER MPD_INDEX="15" NAME="C_HAS_SIE" TYPE="INTEGER" VALUE="1">
4124 <DESCRIPTION>Support SIE </DESCRIPTION>
4126 <PARAMETER MPD_INDEX="16" NAME="C_HAS_CIE" TYPE="INTEGER" VALUE="1">
4127 <DESCRIPTION>Support CIE </DESCRIPTION>
4129 <PARAMETER MPD_INDEX="17" NAME="C_HAS_IVR" TYPE="INTEGER" VALUE="1">
4130 <DESCRIPTION>Support IVR </DESCRIPTION>
4132 <PARAMETER MPD_INDEX="18" NAME="C_IRQ_IS_LEVEL" TYPE="INTEGER" VALUE="1">
4133 <DESCRIPTION>IRQ Output Use Level </DESCRIPTION>
4135 <PARAMETER MPD_INDEX="19" NAME="C_IRQ_ACTIVE" TYPE="std_logic" VALUE="1">
4136 <DESCRIPTION>The Sense of IRQ Output </DESCRIPTION>
4139 <MEMRANGE BASEDECIMAL="2172649472" BASENAME="C_BASEADDR" BASEVALUE="0x81800000" HIGHDECIMAL="2172715007" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8180ffff" MEMTYPE="REGISTER" MINSIZE="0x20" SIZE="65536" SIZEABRV="64K">
4141 <BUSINTERFACE NAME="SPLB"/>
4145 <PORT DIR="I" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="42" MSB="1" NAME="Intr" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="fpga_0_Ethernet_MAC_MDINT_pin&RS232_Uart_1_Interrupt" VECFORMULA="[(C_NUM_INTR_INPUTS-1):0]"/>
4146 <PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="43" NAME="Irq" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="ppc440_0_EICC440EXTIRQ"/>
4147 <PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
4148 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
4149 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
4150 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="3" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
4151 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="4" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
4152 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="5" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
4153 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="6" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
4154 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="7" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
4155 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="8" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
4156 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="9" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
4157 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="10" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
4158 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="11" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
4159 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="12" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
4160 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="13" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
4161 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="14" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
4162 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="15" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
4163 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="16" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
4164 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="17" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
4165 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
4166 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
4167 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
4168 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
4169 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
4170 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
4171 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
4172 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
4173 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
4174 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
4175 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
4176 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
4177 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
4178 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
4179 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="32" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
4180 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="33" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
4181 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="34" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
4182 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="35" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
4183 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="36" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
4184 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="37" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
4185 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="38" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
4186 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="39" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
4187 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="40" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
4188 <PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
4189 <BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
4190 <INTERRUPTINFO INTC_INDEX="0" PROCESSOR="ppc440_0" TYPE="CONTROLLER">
4191 <SOURCE PRIORITY="0" SIGNAME="fpga_0_Ethernet_MAC_MDINT_pin"/>
4192 <SOURCE INSTANCE="RS232_Uart_1" PRIORITY="1" SIGNAME="RS232_Uart_1_Interrupt"/>