1 /* Copyright 2019 SiFive, Inc */
2 /* SPDX-License-Identifier: Apache-2.0 */
3 /* ----------------------------------- */
4 /* ----------------------------------- */
8 #include <metal/machine/platform.h>
10 #ifdef __METAL_MACHINE_MACROS
12 #ifndef MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H
13 #define MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H
15 #define __METAL_CLINT_NUM_PARENTS 2
17 #ifndef __METAL_CLINT_NUM_PARENTS
18 #define __METAL_CLINT_NUM_PARENTS 0
20 #define __METAL_PLIC_SUBINTERRUPTS 27
22 #define __METAL_PLIC_NUM_PARENTS 1
24 #ifndef __METAL_PLIC_SUBINTERRUPTS
25 #define __METAL_PLIC_SUBINTERRUPTS 0
27 #ifndef __METAL_PLIC_NUM_PARENTS
28 #define __METAL_PLIC_NUM_PARENTS 0
30 #ifndef __METAL_CLIC_SUBINTERRUPTS
31 #define __METAL_CLIC_SUBINTERRUPTS 0
34 #endif /* MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H*/
36 #else /* ! __METAL_MACHINE_MACROS */
38 #ifndef MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H
39 #define MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H
41 #define __METAL_CLINT_2000000_INTERRUPTS 2
43 #define METAL_MAX_CLINT_INTERRUPTS 2
45 #define __METAL_CLINT_NUM_PARENTS 2
47 #define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1
49 #define __METAL_PLIC_SUBINTERRUPTS 27
51 #define METAL_MAX_PLIC_INTERRUPTS 1
53 #define __METAL_PLIC_NUM_PARENTS 1
55 #define __METAL_CLIC_SUBINTERRUPTS 0
56 #define METAL_MAX_CLIC_INTERRUPTS 0
58 #define __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 16
60 #define METAL_MAX_LOCAL_EXT_INTERRUPTS 16
62 #define METAL_MAX_GLOBAL_EXT_INTERRUPTS 0
64 #define __METAL_GPIO_10012000_INTERRUPTS 16
66 #define METAL_MAX_GPIO_INTERRUPTS 16
68 #define __METAL_SERIAL_10013000_INTERRUPTS 1
70 #define METAL_MAX_UART_INTERRUPTS 1
73 #include <metal/drivers/fixed-clock.h>
74 #include <metal/memory.h>
75 #include <metal/drivers/riscv_clint0.h>
76 #include <metal/drivers/riscv_cpu.h>
77 #include <metal/drivers/riscv_plic0.h>
78 #include <metal/pmp.h>
79 #include <metal/drivers/sifive_local-external-interrupts0.h>
80 #include <metal/drivers/sifive_gpio0.h>
81 #include <metal/drivers/sifive_gpio-leds.h>
82 #include <metal/drivers/sifive_spi0.h>
83 #include <metal/drivers/sifive_uart0.h>
84 #include <metal/drivers/sifive_fe310-g000_hfrosc.h>
85 #include <metal/drivers/sifive_fe310-g000_hfxosc.h>
86 #include <metal/drivers/sifive_fe310-g000_pll.h>
87 #include <metal/drivers/sifive_fe310-g000_prci.h>
90 struct __metal_driver_fixed_clock __metal_dt_clock_0;
93 struct __metal_driver_fixed_clock __metal_dt_clock_2;
96 struct __metal_driver_fixed_clock __metal_dt_clock_5;
98 struct metal_memory __metal_dt_mem_dtim_80000000;
100 struct metal_memory __metal_dt_mem_spi_10014000;
102 /* From clint@2000000 */
103 struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000;
106 struct __metal_driver_cpu __metal_dt_cpu_0;
108 struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller;
110 /* From interrupt_controller@c000000 */
111 struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000;
113 struct metal_pmp __metal_dt_pmp;
115 /* From local_external_interrupts_0 */
116 struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0;
118 /* From gpio@10012000 */
119 struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000;
122 struct __metal_driver_sifive_gpio_led __metal_dt_led_0red;
124 /* From led@0green */
125 struct __metal_driver_sifive_gpio_led __metal_dt_led_0green;
128 struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue;
130 /* From spi@10014000 */
131 struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000;
133 /* From serial@10013000 */
134 struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000;
137 struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3;
140 struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1;
143 struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4;
145 /* From prci@10008000 */
146 struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000;
150 /* --------------------- fixed_clock ------------ */
151 static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock)
153 if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_0) {
154 return METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY;
156 else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_2) {
157 return METAL_FIXED_CLOCK_2_CLOCK_FREQUENCY;
159 else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_5) {
160 return METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY;
169 /* --------------------- fixed_factor_clock ------------ */
172 /* --------------------- sifive_clint0 ------------ */
173 static inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller)
175 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) {
176 return METAL_RISCV_CLINT0_2000000_BASE_ADDRESS;
183 static inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller)
185 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) {
186 return METAL_RISCV_CLINT0_2000000_SIZE;
193 static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller)
195 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) {
196 return METAL_MAX_CLINT_INTERRUPTS;
203 static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx)
206 return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
209 return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
216 static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx)
231 /* --------------------- cpu ------------ */
232 static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu)
234 if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
242 static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu)
244 if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
252 static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu)
254 if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
255 return &__metal_dt_cpu_0_interrupt_controller.controller;
262 static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu)
264 if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
274 /* --------------------- sifive_plic0 ------------ */
275 static inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller)
277 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) {
278 return METAL_RISCV_PLIC0_C000000_BASE_ADDRESS;
285 static inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller)
287 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) {
288 return METAL_RISCV_PLIC0_C000000_SIZE;
295 static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller)
297 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) {
298 return METAL_RISCV_PLIC0_C000000_RISCV_NDEV;
305 static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller)
307 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) {
308 return METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY;
315 static inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx)
318 return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
321 return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
328 static inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx)
343 /* --------------------- sifive_clic0 ------------ */
346 /* --------------------- sifive_local_external_interrupts0 ------------ */
347 static inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller)
349 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) {
350 return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller;
357 static inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller)
359 if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) {
360 return METAL_MAX_LOCAL_EXT_INTERRUPTS;
367 static inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx)
399 else if (idx == 10) {
402 else if (idx == 11) {
405 else if (idx == 12) {
408 else if (idx == 13) {
411 else if (idx == 14) {
414 else if (idx == 15) {
424 /* --------------------- sifive_global_external_interrupts0 ------------ */
427 /* --------------------- sifive_gpio0 ------------ */
428 static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio)
430 if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) {
431 return METAL_SIFIVE_GPIO0_10012000_BASE_ADDRESS;
438 static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio)
440 if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) {
441 return METAL_SIFIVE_GPIO0_10012000_SIZE;
448 static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio)
450 if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) {
451 return METAL_MAX_GPIO_INTERRUPTS;
458 static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio)
460 if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) {
461 return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller;
468 static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx)
470 if (((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 0)) {
473 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 1))) {
476 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 2))) {
479 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 3))) {
482 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 4))) {
485 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 5))) {
488 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 6))) {
491 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 7))) {
494 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 8))) {
497 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 9))) {
500 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 10))) {
503 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 11))) {
506 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 12))) {
509 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 13))) {
512 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 14))) {
515 else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 15))) {
525 /* --------------------- sifive_gpio_button ------------ */
528 /* --------------------- sifive_gpio_led ------------ */
529 static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led)
531 if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) {
532 return (struct metal_gpio *)&__metal_dt_gpio_10012000;
534 else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) {
535 return (struct metal_gpio *)&__metal_dt_gpio_10012000;
537 else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) {
538 return (struct metal_gpio *)&__metal_dt_gpio_10012000;
545 static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led)
547 if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) {
550 else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) {
553 else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) {
561 static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led)
563 if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) {
566 else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) {
569 else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) {
579 /* --------------------- sifive_gpio_switch ------------ */
582 /* --------------------- sifive_spi0 ------------ */
583 static inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi)
585 if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) {
586 return METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS;
593 static inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi)
595 if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) {
596 return METAL_SIFIVE_SPI0_10014000_SIZE;
603 static inline struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi)
605 return (struct metal_clock *)&__metal_dt_clock_4.clock;
608 static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi)
610 return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000;
613 static inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi)
618 static inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi)
625 /* --------------------- sifive_test0 ------------ */
628 /* --------------------- sifive_uart0 ------------ */
629 static inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart)
631 if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) {
632 return METAL_SIFIVE_UART0_10013000_BASE_ADDRESS;
639 static inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart)
641 if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) {
642 return METAL_SIFIVE_UART0_10013000_SIZE;
649 static inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart)
651 if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) {
652 return METAL_MAX_UART_INTERRUPTS;
659 static inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart)
661 if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) {
662 return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller;
669 static inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart)
674 static inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart)
676 return (struct metal_clock *)&__metal_dt_clock_4.clock;
679 static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart)
681 return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000;
684 static inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart)
689 static inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart)
696 /* --------------------- sifive_fe310_g000_hfrosc ------------ */
697 static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock)
699 return (struct metal_clock *)&__metal_dt_clock_2.clock;
702 static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock)
704 return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000;
707 static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock)
709 return &__metal_driver_vtable_sifive_fe310_g000_prci;
712 static inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock)
714 return METAL_SIFIVE_FE310_G000_PRCI_HFROSCCFG;
719 /* --------------------- sifive_fe310_g000_hfxosc ------------ */
720 static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock)
722 return (struct metal_clock *)&__metal_dt_clock_0.clock;
725 static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock)
727 return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000;
730 static inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock)
732 return METAL_SIFIVE_FE310_G000_PRCI_HFXOSCCFG;
737 /* --------------------- sifive_fe310_g000_pll ------------ */
738 static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock)
740 return (struct metal_clock *)&__metal_dt_clock_3.clock;
743 static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock)
745 return (struct metal_clock *)&__metal_dt_clock_1.clock;
748 static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock)
750 return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000;
753 static inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock)
755 return METAL_SIFIVE_FE310_G000_PRCI_PLLOUTDIV;
758 static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( )
760 return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000;
763 static inline long __metal_driver_sifive_fe310_g000_pll_config_offset( )
765 return METAL_SIFIVE_FE310_G000_PRCI_PLLCFG;
768 static inline long __metal_driver_sifive_fe310_g000_pll_init_rate( )
775 /* --------------------- sifive_fe310_g000_prci ------------ */
776 static inline long __metal_driver_sifive_fe310_g000_prci_base( )
778 return METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS;
781 static inline long __metal_driver_sifive_fe310_g000_prci_size( )
783 return METAL_SIFIVE_FE310_G000_PRCI_10008000_SIZE;
786 static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( )
788 return &__metal_driver_vtable_sifive_fe310_g000_prci;
793 /* --------------------- sifive_fu540_c000_l2 ------------ */
796 #define __METAL_DT_MAX_MEMORIES 2
798 asm (".weak __metal_memory_table");
799 struct metal_memory *__metal_memory_table[] = {
800 &__metal_dt_mem_dtim_80000000,
801 &__metal_dt_mem_spi_10014000};
803 /* From serial@10013000 */
804 #define __METAL_DT_STDOUT_UART_HANDLE (&__metal_dt_serial_10013000.uart)
806 #define __METAL_DT_SERIAL_10013000_HANDLE (&__metal_dt_serial_10013000.uart)
808 #define __METAL_DT_STDOUT_UART_BAUD 115200
810 /* From clint@2000000 */
811 #define __METAL_DT_RISCV_CLINT0_HANDLE (&__metal_dt_clint_2000000.controller)
813 #define __METAL_DT_CLINT_2000000_HANDLE (&__metal_dt_clint_2000000.controller)
815 #define __METAL_DT_MAX_HARTS 1
817 asm (".weak __metal_cpu_table");
818 struct __metal_driver_cpu *__metal_cpu_table[] = {
821 /* From interrupt_controller@c000000 */
822 #define __METAL_DT_RISCV_PLIC0_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
824 #define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
826 #define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp)
828 /* From local_external_interrupts_0 */
829 #define __METAL_DT_SIFIVE_LOCAL_EXINTR0_HANDLE (&__metal_dt_local_external_interrupts_0.irc)
831 #define __METAL_DT_LOCAL_EXTERNAL_INTERRUPTS_0_HANDLE (&__metal_dt_local_external_interrupts_0.irc)
833 #define __MEE_DT_MAX_GPIOS 1
835 asm (".weak __metal_gpio_table");
836 struct __metal_driver_sifive_gpio0 *__metal_gpio_table[] = {
837 &__metal_dt_gpio_10012000};
839 #define __METAL_DT_MAX_BUTTONS 0
841 asm (".weak __metal_button_table");
842 struct __metal_driver_sifive_gpio_button *__metal_button_table[] = {
844 #define __METAL_DT_MAX_LEDS 3
846 asm (".weak __metal_led_table");
847 struct __metal_driver_sifive_gpio_led *__metal_led_table[] = {
848 &__metal_dt_led_0red,
849 &__metal_dt_led_0green,
850 &__metal_dt_led_0blue};
852 #define __METAL_DT_MAX_SWITCHES 0
854 asm (".weak __metal_switch_table");
855 struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = {
857 #define __METAL_DT_MAX_SPIS 1
859 asm (".weak __metal_spi_table");
860 struct __metal_driver_sifive_spi0 *__metal_spi_table[] = {
861 &__metal_dt_spi_10014000};
864 #define __METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE (&__metal_dt_clock_4)
866 #define __METAL_DT_CLOCK_4_HANDLE (&__metal_dt_clock_4)
868 #endif /* MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H*/
870 #endif /* ! __METAL_MACHINE_MACROS */
872 #endif /* ! ASSEMBLY */