git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/RISC-V_RV32_SiFive_IAR/settings/RTOSDemo.Debug.driver.xcl

   1 "--core=RV32IMAC" \r
   2 \r
   3 "-p" \r
   4 \r
   5 "C:\devtools\IAR Systems\Embedded Workbench 8.3\riscv\config\debugger\SiFive\e31arty35t.ddf" \r
   6 \r
   7 "-d" \r
   8 \r
   9 "sim" \r
  10 \r
  11 \r
  12 \r
  13 \r