git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/RISC-V_RV32_SiFive_IAR/settings/RTOSDemo.Debug.general.xcl

   1 "C:\devtools\IAR Systems\Embedded Workbench 8.3\riscv\bin\riscvproc.dll" \r
   2 \r
   3 "C:\devtools\IAR Systems\Embedded Workbench 8.3\riscv\bin\riscvsim.dll" \r
   4 \r
   5 "C:\Users\ribarry\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RISC-V_RV32_SiFive_IAR\Debug\Exe\RTOSDemo.out" \r
   6 \r
   7 --plugin="C:\devtools\IAR Systems\Embedded Workbench 8.3\riscv\bin\riscvbat.dll" \r
   8 \r
   9 \r
  10 \r
  11 \r