2 FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not itcan be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /* Scheduler includes. */
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76 #include "FreeRTOS.h"
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79 /* Hardware includes. */
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80 #include "port_iodefine.h"
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81 #include "port_iodefine_ext.h"
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83 /* The critical nesting value is initialised to a non zero value to ensure
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84 interrupts don't accidentally become enabled before the scheduler is started. */
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85 #define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )
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87 /* Initial PSW value allocated to a newly created task.
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89 * ||||||||-------------- Fill byte
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90 * |||||||--------------- Carry Flag cleared
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91 * |||||----------------- In-service priority Flags set to low level
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92 * ||||------------------ Register bank Select 0 Flag cleared
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93 * |||------------------- Auxiliary Carry Flag cleared
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94 * ||-------------------- Register bank Select 1 Flag cleared
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95 * |--------------------- Zero Flag set
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96 * ---------------------- Global Interrupt Flag set (enabled)
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98 //#define portPSW ( 0xc6UL )
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99 #define portPSW ( 0x86UL )
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101 /* The address of the pxCurrentTCB variable, but don't know or need to know its
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103 typedef void tskTCB;
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104 extern volatile tskTCB * volatile pxCurrentTCB;
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106 /* Each task maintains a count of the critical section nesting depth. Each time
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107 a critical section is entered the count is incremented. Each time a critical
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108 section is exited the count is decremented - with interrupts only being
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109 re-enabled if the count is zero.
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111 usCriticalNesting will get set to zero when the scheduler starts, but must
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112 not be initialised to zero as that could cause problems during the startup
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114 volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;
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116 /*-----------------------------------------------------------*/
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119 * Sets up the periodic ISR used for the RTOS tick.
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121 static void prvSetupTimerInterrupt( void );
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124 * Starts the scheduler by loading the context of the first task to run.
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125 * (defined in portasm.S).
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127 extern void vPortStartFirstTask( void );
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129 /*-----------------------------------------------------------*/
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132 * Initialise the stack of a task to look exactly as if a call to
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133 * portSAVE_CONTEXT had been called.
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135 * See the header file portable.h.
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137 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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139 unsigned long *pulLocal;
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141 /* Parameters are passed in on the stack, and written using a 32bit value
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142 hence a space is left for the second two bytes. */
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145 /* Write in the parameter value. */
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146 pulLocal = ( unsigned long * ) pxTopOfStack;
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147 *pulLocal = ( unsigned long ) pvParameters;
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150 /* These values are just spacers. The return address of the function
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151 would normally be written here. */
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152 *pxTopOfStack = ( portSTACK_TYPE ) 0x00;
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154 *pxTopOfStack = ( portSTACK_TYPE ) 0x00;
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157 /* The start address / PSW value is also written in as a 32bit value,
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158 so leave a space for the second two bytes. */
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161 /* Task function start address combined with the PSW. */
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162 pulLocal = ( unsigned long * ) pxTopOfStack;
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163 *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );
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166 /* An initial value for the AX register. */
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167 *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;
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170 /* An initial value for the HL register. */
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171 *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;
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174 /* CS and ES registers. */
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175 *pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;
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178 /* The remaining general purpose registers bank 0 (DE and BC) and the other
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179 three register banks.. */
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180 pxTopOfStack -= 14;
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182 /* Finally the critical section nesting count is set to zero when the task
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184 *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING;
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186 /* Return a pointer to the top of the stack that has beene generated so it
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187 can be stored in the task control block for the task. */
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188 return pxTopOfStack;
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190 /*-----------------------------------------------------------*/
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192 portBASE_TYPE xPortStartScheduler( void )
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194 /* Setup the hardware to generate the tick. Interrupts are disabled when
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195 this function is called. */
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196 prvSetupTimerInterrupt();
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198 /* Restore the context of the first task that is going to run. */
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199 vPortStartFirstTask();
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201 /* Execution should not reach here as the tasks are now running! */
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204 /*-----------------------------------------------------------*/
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206 void vPortEndScheduler( void )
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208 /* It is unlikely that the RL78 port will get stopped. */
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210 /*-----------------------------------------------------------*/
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212 static void prvSetupTimerInterrupt( void )
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214 const unsigned short usClockHz = 15000UL; /* Internal clock. */
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215 const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;
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217 /* Use the internal 15K clock. */
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218 OSMC = ( unsigned char ) 0x16;
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220 /* Supply the RTC clock. */
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221 RTCEN = ( unsigned char ) 1U;
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223 /* Disable ITMC operation. */
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224 ITMC = ( unsigned char ) 0x0000;
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226 /* Disable INTIT interrupt. */
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227 ITMK = ( unsigned char ) 1;
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229 /* Set INTIT high priority */
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230 ITPR1 = ( unsigned char ) 1;
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231 ITPR0 = ( unsigned char ) 1;
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233 /* Clear INIT interrupt. */
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234 ITIF = ( unsigned char ) 0;
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236 /* Set interval and enable interrupt operation. */
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237 ITMC = usCompareMatch | 0x8000U;
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239 /* Enable INTIT interrupt. */
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240 ITMK = ( unsigned char ) 0;
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242 /*-----------------------------------------------------------*/
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