1 /***********************************************************************/
3 /* PROJECT NAME : RL78G1A */
4 /* FILE : iodefine.h */
5 /* DESCRIPTION : Definition of I/O Registers */
6 /* CPU SERIES : RL78 - G1A */
7 /* CPU TYPE : R5F10ELE */
9 /* This file is generated by e2studio. */
11 /***********************************************************************/
\r
13 /************************************************************************/
\r
14 /* Header file generated from device file: */
\r
16 /* Copyright(C) 2012 Renesas */
\r
17 /* File Version V1.00 */
\r
18 /* Tool Version 1.9.7121 */
\r
19 /* Date Generated 13/11/2012 */
\r
20 /************************************************************************/
\r
22 #ifndef __IOREG_BIT_STRUCTURES
\r
23 #define __IOREG_BIT_STRUCTURES
\r
25 unsigned char no0 :1;
\r
26 unsigned char no1 :1;
\r
27 unsigned char no2 :1;
\r
28 unsigned char no3 :1;
\r
29 unsigned char no4 :1;
\r
30 unsigned char no5 :1;
\r
31 unsigned char no6 :1;
\r
32 unsigned char no7 :1;
\r
36 unsigned short no0 :1;
\r
37 unsigned short no1 :1;
\r
38 unsigned short no2 :1;
\r
39 unsigned short no3 :1;
\r
40 unsigned short no4 :1;
\r
41 unsigned short no5 :1;
\r
42 unsigned short no6 :1;
\r
43 unsigned short no7 :1;
\r
44 unsigned short no8 :1;
\r
45 unsigned short no9 :1;
\r
46 unsigned short no10 :1;
\r
47 unsigned short no11 :1;
\r
48 unsigned short no12 :1;
\r
49 unsigned short no13 :1;
\r
50 unsigned short no14 :1;
\r
51 unsigned short no15 :1;
\r
143 unsigned char pm12;
\r
147 unsigned char pm14;
\r
151 unsigned char pm15;
\r
155 unsigned char adm0;
\r
163 unsigned char adm1;
\r
167 unsigned char krctl;
\r
175 unsigned char krm1;
\r
179 unsigned char krm0;
\r
183 unsigned char egp0;
\r
187 unsigned char egn0;
\r
191 unsigned char egp1;
\r
195 unsigned char egn1;
\r
199 unsigned char iics0;
\r
203 unsigned char iicf0;
\r
207 unsigned char flars;
\r
211 unsigned char fssq;
\r
215 unsigned char flrst;
\r
219 unsigned char fsastl;
\r
223 unsigned char fsasth;
\r
227 unsigned char rtcc0;
\r
231 unsigned char rtcc1;
\r
239 unsigned char ostc;
\r
247 unsigned char cks0;
\r
251 unsigned char cks1;
\r
255 unsigned char lvim;
\r
259 unsigned char lvis;
\r
263 unsigned char monsta0;
\r
267 unsigned char asim;
\r
271 unsigned char dmc0;
\r
275 unsigned char dmc1;
\r
279 unsigned char drc0;
\r
283 unsigned char drc1;
\r
287 unsigned short if2;
\r
291 unsigned char if2l;
\r
295 unsigned char if2h;
\r
299 unsigned short mk2;
\r
303 unsigned char mk2l;
\r
307 unsigned char mk2h;
\r
311 unsigned short pr02;
\r
315 unsigned char pr02l;
\r
319 unsigned char pr02h;
\r
323 unsigned short pr12;
\r
327 unsigned char pr12l;
\r
331 unsigned char pr12h;
\r
335 unsigned short if0;
\r
339 unsigned char if0l;
\r
343 unsigned char if0h;
\r
347 unsigned short if1;
\r
351 unsigned char if1l;
\r
355 unsigned char if1h;
\r
359 unsigned short mk0;
\r
363 unsigned char mk0l;
\r
367 unsigned char mk0h;
\r
371 unsigned short mk1;
\r
375 unsigned char mk1l;
\r
379 unsigned char mk1h;
\r
383 unsigned short pr00;
\r
387 unsigned char pr00l;
\r
391 unsigned char pr00h;
\r
395 unsigned short pr01;
\r
399 unsigned char pr01l;
\r
403 unsigned char pr01h;
\r
407 unsigned short pr10;
\r
411 unsigned char pr10l;
\r
415 unsigned char pr10h;
\r
419 unsigned short pr11;
\r
423 unsigned char pr11l;
\r
427 unsigned char pr11h;
\r
435 #define P0 (*(volatile union un_p0 *)0xFFF00).p0
\r
436 #define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT
\r
437 #define P1 (*(volatile union un_p1 *)0xFFF01).p1
\r
438 #define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT
\r
439 #define P2 (*(volatile union un_p2 *)0xFFF02).p2
\r
440 #define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT
\r
441 #define P3 (*(volatile union un_p3 *)0xFFF03).p3
\r
442 #define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT
\r
443 #define P4 (*(volatile union un_p4 *)0xFFF04).p4
\r
444 #define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT
\r
445 #define P5 (*(volatile union un_p5 *)0xFFF05).p5
\r
446 #define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT
\r
447 #define P6 (*(volatile union un_p6 *)0xFFF06).p6
\r
448 #define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT
\r
449 #define P7 (*(volatile union un_p7 *)0xFFF07).p7
\r
450 #define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT
\r
451 #define P12 (*(volatile union un_p12 *)0xFFF0C).p12
\r
452 #define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
\r
453 #define P13 (*(volatile union un_p13 *)0xFFF0D).p13
\r
454 #define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
\r
455 #define P14 (*(volatile union un_p14 *)0xFFF0E).p14
\r
456 #define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT
\r
457 #define P15 (*(volatile union un_p15 *)0xFFF0F).p15
\r
458 #define P15_bit (*(volatile union un_p15 *)0xFFF0F).BIT
\r
459 #define SDR00 (*(volatile unsigned short *)0xFFF10)
\r
460 #define SIO00 (*(volatile unsigned char *)0xFFF10)
\r
461 #define TXD0 (*(volatile unsigned char *)0xFFF10)
\r
462 #define SDR01 (*(volatile unsigned short *)0xFFF12)
\r
463 #define RXD0 (*(volatile unsigned char *)0xFFF12)
\r
464 #define SIO01 (*(volatile unsigned char *)0xFFF12)
\r
465 #define TDR00 (*(volatile unsigned short *)0xFFF18)
\r
466 #define TDR01 (*(volatile unsigned short *)0xFFF1A)
\r
467 #define TDR01L (*(volatile unsigned char *)0xFFF1A)
\r
468 #define TDR01H (*(volatile unsigned char *)0xFFF1B)
\r
469 #define ADCR (*(volatile unsigned short *)0xFFF1E)
\r
470 #define ADCRH (*(volatile unsigned char *)0xFFF1F)
\r
471 #define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0
\r
472 #define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT
\r
473 #define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1
\r
474 #define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT
\r
475 #define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2
\r
476 #define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT
\r
477 #define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3
\r
478 #define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT
\r
479 #define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4
\r
480 #define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT
\r
481 #define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5
\r
482 #define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT
\r
483 #define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6
\r
484 #define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT
\r
485 #define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7
\r
486 #define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT
\r
487 #define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12
\r
488 #define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT
\r
489 #define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14
\r
490 #define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT
\r
491 #define PM15 (*(volatile union un_pm15 *)0xFFF2F).pm15
\r
492 #define PM15_bit (*(volatile union un_pm15 *)0xFFF2F).BIT
\r
493 #define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
\r
494 #define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
\r
495 #define ADS (*(volatile union un_ads *)0xFFF31).ads
\r
496 #define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
\r
497 #define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
\r
498 #define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
\r
499 #define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl
\r
500 #define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT
\r
501 #define KRF (*(volatile union un_krf *)0xFFF35).krf
\r
502 #define KRF_bit (*(volatile union un_krf *)0xFFF35).BIT
\r
503 #define KRM1 (*(volatile union un_krm1 *)0xFFF36).krm1
\r
504 #define KRM1_bit (*(volatile union un_krm1 *)0xFFF36).BIT
\r
505 #define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0
\r
506 #define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT
\r
507 #define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
\r
508 #define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
\r
509 #define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
\r
510 #define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT
\r
511 #define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1
\r
512 #define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT
\r
513 #define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1
\r
514 #define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT
\r
515 #define SDR02 (*(volatile unsigned short *)0xFFF44)
\r
516 #define SIO10 (*(volatile unsigned char *)0xFFF44)
\r
517 #define TXD1 (*(volatile unsigned char *)0xFFF44)
\r
518 #define SDR03 (*(volatile unsigned short *)0xFFF46)
\r
519 #define RXD1 (*(volatile unsigned char *)0xFFF46)
\r
520 #define SIO11 (*(volatile unsigned char *)0xFFF46)
\r
521 #define SDR10 (*(volatile unsigned short *)0xFFF48)
\r
522 #define SIO20 (*(volatile unsigned char *)0xFFF48)
\r
523 #define TXD2 (*(volatile unsigned char *)0xFFF48)
\r
524 #define SDR11 (*(volatile unsigned short *)0xFFF4A)
\r
525 #define RXD2 (*(volatile unsigned char *)0xFFF4A)
\r
526 #define SIO21 (*(volatile unsigned char *)0xFFF4A)
\r
527 #define IICA0 (*(volatile unsigned char *)0xFFF50)
\r
528 #define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0
\r
529 #define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT
\r
530 #define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0
\r
531 #define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT
\r
532 #define TDR02 (*(volatile unsigned short *)0xFFF64)
\r
533 #define TDR03 (*(volatile unsigned short *)0xFFF66)
\r
534 #define TDR03L (*(volatile unsigned char *)0xFFF66)
\r
535 #define TDR03H (*(volatile unsigned char *)0xFFF67)
\r
536 #define TDR04 (*(volatile unsigned short *)0xFFF68)
\r
537 #define TDR05 (*(volatile unsigned short *)0xFFF6A)
\r
538 #define TDR06 (*(volatile unsigned short *)0xFFF6C)
\r
539 #define TDR07 (*(volatile unsigned short *)0xFFF6E)
\r
540 #define FLPMC (*(volatile unsigned char *)0xFFF80)
\r
541 #define FLARS (*(volatile union un_flars *)0xFFF81).flars
\r
542 #define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT
\r
543 #define FLAPL (*(volatile unsigned short *)0xFFF82)
\r
544 #define FLAPH (*(volatile unsigned char *)0xFFF84)
\r
545 #define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq
\r
546 #define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT
\r
547 #define FLSEDL (*(volatile unsigned short *)0xFFF86)
\r
548 #define FLSEDH (*(volatile unsigned char *)0xFFF88)
\r
549 #define FLRST (*(volatile union un_flrst *)0xFFF89).flrst
\r
550 #define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT
\r
551 #define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl
\r
552 #define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT
\r
553 #define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth
\r
554 #define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT
\r
555 #define FLWL (*(volatile unsigned short *)0xFFF8C)
\r
556 #define FLWH (*(volatile unsigned short *)0xFFF8E)
\r
557 #define ITMC (*(volatile unsigned short *)0xFFF90)
\r
558 #define SEC (*(volatile unsigned char *)0xFFF92)
\r
559 #define MIN (*(volatile unsigned char *)0xFFF93)
\r
560 #define HOUR (*(volatile unsigned char *)0xFFF94)
\r
561 #define WEEK (*(volatile unsigned char *)0xFFF95)
\r
562 #define DAY (*(volatile unsigned char *)0xFFF96)
\r
563 #define MONTH (*(volatile unsigned char *)0xFFF97)
\r
564 #define YEAR (*(volatile unsigned char *)0xFFF98)
\r
565 #define SUBCUD (*(volatile unsigned char *)0xFFF99)
\r
566 #define ALARMWM (*(volatile unsigned char *)0xFFF9A)
\r
567 #define ALARMWH (*(volatile unsigned char *)0xFFF9B)
\r
568 #define ALARMWW (*(volatile unsigned char *)0xFFF9C)
\r
569 #define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0
\r
570 #define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT
\r
571 #define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1
\r
572 #define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT
\r
573 #define CMC (*(volatile unsigned char *)0xFFFA0)
\r
574 #define CSC (*(volatile union un_csc *)0xFFFA1).csc
\r
575 #define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT
\r
576 #define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc
\r
577 #define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT
\r
578 #define OSTS (*(volatile unsigned char *)0xFFFA3)
\r
579 #define CKC (*(volatile union un_ckc *)0xFFFA4).ckc
\r
580 #define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT
\r
581 #define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0
\r
582 #define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT
\r
583 #define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1
\r
584 #define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT
\r
585 #define RESF (*(volatile unsigned char *)0xFFFA8)
\r
586 #define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim
\r
587 #define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT
\r
588 #define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis
\r
589 #define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT
\r
590 #define WDTE (*(volatile unsigned char *)0xFFFAB)
\r
591 #define CRCIN (*(volatile unsigned char *)0xFFFAC)
\r
592 #define RXB (*(volatile unsigned char *)0xFFFAD)
\r
593 #define TXS (*(volatile unsigned char *)0xFFFAD)
\r
594 #define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0
\r
595 #define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT
\r
596 #define ASIM (*(volatile union un_asim *)0xFFFAF).asim
\r
597 #define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT
\r
598 #define DSA0 (*(volatile unsigned char *)0xFFFB0)
\r
599 #define DSA1 (*(volatile unsigned char *)0xFFFB1)
\r
600 #define DRA0 (*(volatile unsigned short *)0xFFFB2)
\r
601 #define DRA0L (*(volatile unsigned char *)0xFFFB2)
\r
602 #define DRA0H (*(volatile unsigned char *)0xFFFB3)
\r
603 #define DRA1 (*(volatile unsigned short *)0xFFFB4)
\r
604 #define DRA1L (*(volatile unsigned char *)0xFFFB4)
\r
605 #define DRA1H (*(volatile unsigned char *)0xFFFB5)
\r
606 #define DBC0 (*(volatile unsigned short *)0xFFFB6)
\r
607 #define DBC0L (*(volatile unsigned char *)0xFFFB6)
\r
608 #define DBC0H (*(volatile unsigned char *)0xFFFB7)
\r
609 #define DBC1 (*(volatile unsigned short *)0xFFFB8)
\r
610 #define DBC1L (*(volatile unsigned char *)0xFFFB8)
\r
611 #define DBC1H (*(volatile unsigned char *)0xFFFB9)
\r
612 #define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0
\r
613 #define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT
\r
614 #define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1
\r
615 #define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT
\r
616 #define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0
\r
617 #define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT
\r
618 #define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1
\r
619 #define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT
\r
620 #define IF2 (*(volatile union un_if2 *)0xFFFD0).if2
\r
621 #define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT
\r
622 #define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l
\r
623 #define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT
\r
624 #define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h
\r
625 #define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT
\r
626 #define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2
\r
627 #define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT
\r
628 #define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l
\r
629 #define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT
\r
630 #define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h
\r
631 #define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT
\r
632 #define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02
\r
633 #define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT
\r
634 #define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l
\r
635 #define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT
\r
636 #define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h
\r
637 #define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT
\r
638 #define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12
\r
639 #define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT
\r
640 #define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l
\r
641 #define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT
\r
642 #define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h
\r
643 #define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT
\r
644 #define IF0 (*(volatile union un_if0 *)0xFFFE0).if0
\r
645 #define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT
\r
646 #define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l
\r
647 #define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT
\r
648 #define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h
\r
649 #define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT
\r
650 #define IF1 (*(volatile union un_if1 *)0xFFFE2).if1
\r
651 #define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT
\r
652 #define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l
\r
653 #define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT
\r
654 #define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h
\r
655 #define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT
\r
656 #define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0
\r
657 #define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT
\r
658 #define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l
\r
659 #define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT
\r
660 #define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h
\r
661 #define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT
\r
662 #define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1
\r
663 #define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT
\r
664 #define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l
\r
665 #define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT
\r
666 #define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h
\r
667 #define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT
\r
668 #define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00
\r
669 #define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT
\r
670 #define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l
\r
671 #define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT
\r
672 #define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h
\r
673 #define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT
\r
674 #define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01
\r
675 #define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT
\r
676 #define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l
\r
677 #define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT
\r
678 #define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h
\r
679 #define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT
\r
680 #define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10
\r
681 #define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT
\r
682 #define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l
\r
683 #define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT
\r
684 #define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h
\r
685 #define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT
\r
686 #define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11
\r
687 #define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT
\r
688 #define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l
\r
689 #define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT
\r
690 #define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h
\r
691 #define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT
\r
692 #define MDAL (*(volatile unsigned short *)0xFFFF0)
\r
693 #define MULA (*(volatile unsigned short *)0xFFFF0)
\r
694 #define MDAH (*(volatile unsigned short *)0xFFFF2)
\r
695 #define MULB (*(volatile unsigned short *)0xFFFF2)
\r
696 #define MDBH (*(volatile unsigned short *)0xFFFF4)
\r
697 #define MULOH (*(volatile unsigned short *)0xFFFF4)
\r
698 #define MDBL (*(volatile unsigned short *)0xFFFF6)
\r
699 #define MULOL (*(volatile unsigned short *)0xFFFF6)
\r
700 #define PMC (*(volatile union un_pmc *)0xFFFFE).pmc
\r
701 #define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT
\r
706 #define ADCE ADM0_bit.no0
\r
707 #define ADCS ADM0_bit.no7
\r
708 #define SPD0 IICS0_bit.no0
\r
709 #define STD0 IICS0_bit.no1
\r
710 #define ACKD0 IICS0_bit.no2
\r
711 #define TRC0 IICS0_bit.no3
\r
712 #define COI0 IICS0_bit.no4
\r
713 #define EXC0 IICS0_bit.no5
\r
714 #define ALD0 IICS0_bit.no6
\r
715 #define MSTS0 IICS0_bit.no7
\r
716 #define IICRSV0 IICF0_bit.no0
\r
717 #define STCEN0 IICF0_bit.no1
\r
718 #define IICBSY0 IICF0_bit.no6
\r
719 #define STCF0 IICF0_bit.no7
\r
720 #define FSSTP FSSQ_bit.no6
\r
721 #define SQST FSSQ_bit.no7
\r
722 #define SQEND FSASTH_bit.no6
\r
723 #define ESQEND FSASTH_bit.no7
\r
724 #define RCLOE1 RTCC0_bit.no5
\r
725 #define RTCE RTCC0_bit.no7
\r
726 #define RWAIT RTCC1_bit.no0
\r
727 #define RWST RTCC1_bit.no1
\r
728 #define RIFG RTCC1_bit.no3
\r
729 #define WAFG RTCC1_bit.no4
\r
730 #define WALIE RTCC1_bit.no6
\r
731 #define WALE RTCC1_bit.no7
\r
732 #define HIOSTOP CSC_bit.no0
\r
733 #define XTSTOP CSC_bit.no6
\r
734 #define MSTOP CSC_bit.no7
\r
735 #define SDIV CKC_bit.no3
\r
736 #define MCM0 CKC_bit.no4
\r
737 #define MCS CKC_bit.no5
\r
738 #define CSS CKC_bit.no6
\r
739 #define CLS CKC_bit.no7
\r
740 #define PCLOE0 CKS0_bit.no7
\r
741 #define PCLOE1 CKS1_bit.no7
\r
742 #define LVIF LVIM_bit.no0
\r
743 #define LVIOMSK LVIM_bit.no1
\r
744 #define LVISEN LVIM_bit.no7
\r
745 #define LVILV LVIS_bit.no0
\r
746 #define LVIMD LVIS_bit.no7
\r
747 #define DWAIT0 DMC0_bit.no4
\r
748 #define DS0 DMC0_bit.no5
\r
749 #define DRS0 DMC0_bit.no6
\r
750 #define STG0 DMC0_bit.no7
\r
751 #define DWAIT1 DMC1_bit.no4
\r
752 #define DS1 DMC1_bit.no5
\r
753 #define DRS1 DMC1_bit.no6
\r
754 #define STG1 DMC1_bit.no7
\r
755 #define DST0 DRC0_bit.no0
\r
756 #define DEN0 DRC0_bit.no7
\r
757 #define DST1 DRC1_bit.no0
\r
758 #define DEN1 DRC1_bit.no7
\r
759 #define TMIF05 IF2_bit.no0
\r
760 #define TMIF06 IF2_bit.no1
\r
761 #define TMIF07 IF2_bit.no2
\r
762 #define PIF6 IF2_bit.no3
\r
763 #define PIF7 IF2_bit.no4
\r
764 #define PIF8 IF2_bit.no5
\r
765 #define PIF9 IF2_bit.no6
\r
766 #define PIF10 IF2_bit.no7
\r
767 #define PIF11 IF2H_bit.no0
\r
768 #define MDIF IF2H_bit.no5
\r
769 #define FLIF IF2H_bit.no7
\r
770 #define TMMK05 MK2_bit.no0
\r
771 #define TMMK06 MK2_bit.no1
\r
772 #define TMMK07 MK2_bit.no2
\r
773 #define PMK6 MK2_bit.no3
\r
774 #define PMK7 MK2_bit.no4
\r
775 #define PMK8 MK2_bit.no5
\r
776 #define PMK9 MK2_bit.no6
\r
777 #define PMK10 MK2_bit.no7
\r
778 #define PMK11 MK2H_bit.no0
\r
779 #define MDMK MK2H_bit.no5
\r
780 #define FLMK MK2H_bit.no7
\r
781 #define TMPR005 PR02_bit.no0
\r
782 #define TMPR006 PR02_bit.no1
\r
783 #define TMPR007 PR02_bit.no2
\r
784 #define PPR06 PR02_bit.no3
\r
785 #define PPR07 PR02_bit.no4
\r
786 #define PPR08 PR02_bit.no5
\r
787 #define PPR09 PR02_bit.no6
\r
788 #define PPR010 PR02_bit.no7
\r
789 #define PPR011 PR02H_bit.no0
\r
790 #define MDPR0 PR02H_bit.no5
\r
791 #define FLPR0 PR02H_bit.no7
\r
792 #define TMPR105 PR12_bit.no0
\r
793 #define TMPR106 PR12_bit.no1
\r
794 #define TMPR107 PR12_bit.no2
\r
795 #define PPR16 PR12_bit.no3
\r
796 #define PPR17 PR12_bit.no4
\r
797 #define PPR18 PR12_bit.no5
\r
798 #define PPR19 PR12_bit.no6
\r
799 #define PPR110 PR12_bit.no7
\r
800 #define PPR111 PR12H_bit.no0
\r
801 #define MDPR1 PR12H_bit.no5
\r
802 #define FLPR1 PR12H_bit.no7
\r
803 #define WDTIIF IF0_bit.no0
\r
804 #define LVIIF IF0_bit.no1
\r
805 #define PIF0 IF0_bit.no2
\r
806 #define PIF1 IF0_bit.no3
\r
807 #define PIF2 IF0_bit.no4
\r
808 #define PIF3 IF0_bit.no5
\r
809 #define PIF4 IF0_bit.no6
\r
810 #define PIF5 IF0_bit.no7
\r
811 #define CSIIF20 IF0H_bit.no0
\r
812 #define IICIF20 IF0H_bit.no0
\r
813 #define STIF2 IF0H_bit.no0
\r
814 #define CSIIF21 IF0H_bit.no1
\r
815 #define IICIF21 IF0H_bit.no1
\r
816 #define SRIF2 IF0H_bit.no1
\r
817 #define SREIF2 IF0H_bit.no2
\r
818 #define DMAIF0 IF0H_bit.no3
\r
819 #define DMAIF1 IF0H_bit.no4
\r
820 #define CSIIF00 IF0H_bit.no5
\r
821 #define IICIF00 IF0H_bit.no5
\r
822 #define STIF0 IF0H_bit.no5
\r
823 #define CSIIF01 IF0H_bit.no6
\r
824 #define IICIF01 IF0H_bit.no6
\r
825 #define SRIF0 IF0H_bit.no6
\r
826 #define SREIF0 IF0H_bit.no7
\r
827 #define TMIF01H IF0H_bit.no7
\r
828 #define CSIIF10 IF1_bit.no0
\r
829 #define IICIF10 IF1_bit.no0
\r
830 #define STIF1 IF1_bit.no0
\r
831 #define CSIIF11 IF1_bit.no1
\r
832 #define IICIF11 IF1_bit.no1
\r
833 #define SRIF1 IF1_bit.no1
\r
834 #define SREIF1 IF1_bit.no2
\r
835 #define TMIF03H IF1_bit.no2
\r
836 #define IICAIF0 IF1_bit.no3
\r
837 #define TMIF00 IF1_bit.no4
\r
838 #define TMIF01 IF1_bit.no5
\r
839 #define TMIF02 IF1_bit.no6
\r
840 #define TMIF03 IF1_bit.no7
\r
841 #define ADIF IF1H_bit.no0
\r
842 #define RTCIF IF1H_bit.no1
\r
843 #define ITIF IF1H_bit.no2
\r
844 #define KRIF IF1H_bit.no3
\r
845 #define TMIF04 IF1H_bit.no7
\r
846 #define WDTIMK MK0_bit.no0
\r
847 #define LVIMK MK0_bit.no1
\r
848 #define PMK0 MK0_bit.no2
\r
849 #define PMK1 MK0_bit.no3
\r
850 #define PMK2 MK0_bit.no4
\r
851 #define PMK3 MK0_bit.no5
\r
852 #define PMK4 MK0_bit.no6
\r
853 #define PMK5 MK0_bit.no7
\r
854 #define CSIMK20 MK0H_bit.no0
\r
855 #define IICMK20 MK0H_bit.no0
\r
856 #define STMK2 MK0H_bit.no0
\r
857 #define CSIMK21 MK0H_bit.no1
\r
858 #define IICMK21 MK0H_bit.no1
\r
859 #define SRMK2 MK0H_bit.no1
\r
860 #define SREMK2 MK0H_bit.no2
\r
861 #define DMAMK0 MK0H_bit.no3
\r
862 #define DMAMK1 MK0H_bit.no4
\r
863 #define CSIMK00 MK0H_bit.no5
\r
864 #define IICMK00 MK0H_bit.no5
\r
865 #define STMK0 MK0H_bit.no5
\r
866 #define CSIMK01 MK0H_bit.no6
\r
867 #define IICMK01 MK0H_bit.no6
\r
868 #define SRMK0 MK0H_bit.no6
\r
869 #define SREMK0 MK0H_bit.no7
\r
870 #define TMMK01H MK0H_bit.no7
\r
871 #define CSIMK10 MK1_bit.no0
\r
872 #define IICMK10 MK1_bit.no0
\r
873 #define STMK1 MK1_bit.no0
\r
874 #define CSIMK11 MK1_bit.no1
\r
875 #define IICMK11 MK1_bit.no1
\r
876 #define SRMK1 MK1_bit.no1
\r
877 #define SREMK1 MK1_bit.no2
\r
878 #define TMMK03H MK1_bit.no2
\r
879 #define IICAMK0 MK1_bit.no3
\r
880 #define TMMK00 MK1_bit.no4
\r
881 #define TMMK01 MK1_bit.no5
\r
882 #define TMMK02 MK1_bit.no6
\r
883 #define TMMK03 MK1_bit.no7
\r
884 #define ADMK MK1H_bit.no0
\r
885 #define RTCMK MK1H_bit.no1
\r
886 #define ITMK MK1H_bit.no2
\r
887 #define KRMK MK1H_bit.no3
\r
888 #define TMMK04 MK1H_bit.no7
\r
889 #define WDTIPR0 PR00_bit.no0
\r
890 #define LVIPR0 PR00_bit.no1
\r
891 #define PPR00 PR00_bit.no2
\r
892 #define PPR01 PR00_bit.no3
\r
893 #define PPR02 PR00_bit.no4
\r
894 #define PPR03 PR00_bit.no5
\r
895 #define PPR04 PR00_bit.no6
\r
896 #define PPR05 PR00_bit.no7
\r
897 #define CSIPR020 PR00H_bit.no0
\r
898 #define IICPR020 PR00H_bit.no0
\r
899 #define STPR02 PR00H_bit.no0
\r
900 #define CSIPR021 PR00H_bit.no1
\r
901 #define IICPR021 PR00H_bit.no1
\r
902 #define SRPR02 PR00H_bit.no1
\r
903 #define SREPR02 PR00H_bit.no2
\r
904 #define DMAPR00 PR00H_bit.no3
\r
905 #define DMAPR01 PR00H_bit.no4
\r
906 #define CSIPR000 PR00H_bit.no5
\r
907 #define IICPR000 PR00H_bit.no5
\r
908 #define STPR00 PR00H_bit.no5
\r
909 #define CSIPR001 PR00H_bit.no6
\r
910 #define IICPR001 PR00H_bit.no6
\r
911 #define SRPR00 PR00H_bit.no6
\r
912 #define SREPR00 PR00H_bit.no7
\r
913 #define TMPR001H PR00H_bit.no7
\r
914 #define CSIPR010 PR01_bit.no0
\r
915 #define IICPR010 PR01_bit.no0
\r
916 #define STPR01 PR01_bit.no0
\r
917 #define CSIPR011 PR01_bit.no1
\r
918 #define IICPR011 PR01_bit.no1
\r
919 #define SRPR01 PR01_bit.no1
\r
920 #define SREPR01 PR01_bit.no2
\r
921 #define TMPR003H PR01_bit.no2
\r
922 #define IICAPR00 PR01_bit.no3
\r
923 #define TMPR000 PR01_bit.no4
\r
924 #define TMPR001 PR01_bit.no5
\r
925 #define TMPR002 PR01_bit.no6
\r
926 #define TMPR003 PR01_bit.no7
\r
927 #define ADPR0 PR01H_bit.no0
\r
928 #define RTCPR0 PR01H_bit.no1
\r
929 #define ITPR0 PR01H_bit.no2
\r
930 #define KRPR0 PR01H_bit.no3
\r
931 #define TMPR004 PR01H_bit.no7
\r
932 #define WDTIPR1 PR10_bit.no0
\r
933 #define LVIPR1 PR10_bit.no1
\r
934 #define PPR10 PR10_bit.no2
\r
935 #define PPR11 PR10_bit.no3
\r
936 #define PPR12 PR10_bit.no4
\r
937 #define PPR13 PR10_bit.no5
\r
938 #define PPR14 PR10_bit.no6
\r
939 #define PPR15 PR10_bit.no7
\r
940 #define CSIPR120 PR10H_bit.no0
\r
941 #define IICPR120 PR10H_bit.no0
\r
942 #define STPR12 PR10H_bit.no0
\r
943 #define CSIPR121 PR10H_bit.no1
\r
944 #define IICPR121 PR10H_bit.no1
\r
945 #define SRPR12 PR10H_bit.no1
\r
946 #define SREPR12 PR10H_bit.no2
\r
947 #define DMAPR10 PR10H_bit.no3
\r
948 #define DMAPR11 PR10H_bit.no4
\r
949 #define CSIPR100 PR10H_bit.no5
\r
950 #define IICPR100 PR10H_bit.no5
\r
951 #define STPR10 PR10H_bit.no5
\r
952 #define CSIPR101 PR10H_bit.no6
\r
953 #define IICPR101 PR10H_bit.no6
\r
954 #define SRPR10 PR10H_bit.no6
\r
955 #define SREPR10 PR10H_bit.no7
\r
956 #define TMPR101H PR10H_bit.no7
\r
957 #define CSIPR110 PR11_bit.no0
\r
958 #define IICPR110 PR11_bit.no0
\r
959 #define STPR11 PR11_bit.no0
\r
960 #define CSIPR111 PR11_bit.no1
\r
961 #define IICPR111 PR11_bit.no1
\r
962 #define SRPR11 PR11_bit.no1
\r
963 #define SREPR11 PR11_bit.no2
\r
964 #define TMPR103H PR11_bit.no2
\r
965 #define IICAPR10 PR11_bit.no3
\r
966 #define TMPR100 PR11_bit.no4
\r
967 #define TMPR101 PR11_bit.no5
\r
968 #define TMPR102 PR11_bit.no6
\r
969 #define TMPR103 PR11_bit.no7
\r
970 #define ADPR1 PR11H_bit.no0
\r
971 #define RTCPR1 PR11H_bit.no1
\r
972 #define ITPR1 PR11H_bit.no2
\r
973 #define KRPR1 PR11H_bit.no3
\r
974 #define TMPR104 PR11H_bit.no7
\r
975 #define MAA PMC_bit.no0
\r
978 Interrupt vector addresses
\r
980 #define RST_vect (0x0)
\r
981 #define INTDBG_vect (0x2)
\r
982 #define INTWDTI_vect (0x4)
\r
983 #define INTLVI_vect (0x6)
\r
984 #define INTP0_vect (0x8)
\r
985 #define INTP1_vect (0xA)
\r
986 #define INTP2_vect (0xC)
\r
987 #define INTP3_vect (0xE)
\r
988 #define INTP4_vect (0x10)
\r
989 #define INTP5_vect (0x12)
\r
990 #define INTCSI20_vect (0x14)
\r
991 #define INTIIC20_vect (0x14)
\r
992 #define INTST2_vect (0x14)
\r
993 #define INTCSI21_vect (0x16)
\r
994 #define INTIIC21_vect (0x16)
\r
995 #define INTSR2_vect (0x16)
\r
996 #define INTSRE2_vect (0x18)
\r
997 #define INTDMA0_vect (0x1A)
\r
998 #define INTDMA1_vect (0x1C)
\r
999 #define INTCSI00_vect (0x1E)
\r
1000 #define INTIIC00_vect (0x1E)
\r
1001 #define INTST0_vect (0x1E)
\r
1002 #define INTCSI01_vect (0x20)
\r
1003 #define INTIIC01_vect (0x20)
\r
1004 #define INTSR0_vect (0x20)
\r
1005 #define INTSRE0_vect (0x22)
\r
1006 #define INTTM01H_vect (0x22)
\r
1007 #define INTCSI10_vect (0x24)
\r
1008 #define INTIIC10_vect (0x24)
\r
1009 #define INTST1_vect (0x24)
\r
1010 #define INTCSI11_vect (0x26)
\r
1011 #define INTIIC11_vect (0x26)
\r
1012 #define INTSR1_vect (0x26)
\r
1013 #define INTSRE1_vect (0x28)
\r
1014 #define INTTM03H_vect (0x28)
\r
1015 #define INTIICA0_vect (0x2A)
\r
1016 #define INTTM00_vect (0x2C)
\r
1017 #define INTTM01_vect (0x2E)
\r
1018 #define INTTM02_vect (0x30)
\r
1019 #define INTTM03_vect (0x32)
\r
1020 #define INTAD_vect (0x34)
\r
1021 #define INTRTC_vect (0x36)
\r
1022 #define INTIT_vect (0x38)
\r
1023 #define INTKR_vect (0x3A)
\r
1024 #define INTTM04_vect (0x42)
\r
1025 #define INTTM05_vect (0x44)
\r
1026 #define INTTM06_vect (0x46)
\r
1027 #define INTTM07_vect (0x48)
\r
1028 #define INTP6_vect (0x4A)
\r
1029 #define INTP7_vect (0x4C)
\r
1030 #define INTP8_vect (0x4E)
\r
1031 #define INTP9_vect (0x50)
\r
1032 #define INTP10_vect (0x52)
\r
1033 #define INTP11_vect (0x54)
\r
1034 #define INTMD_vect (0x5E)
\r
1035 #define INTFL_vect (0x62)
\r
1036 #define BRK_I_vect (0x7E)
\r