git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/RX100-RSK_IAR/reg_test.s

   1 /*\r
   2     FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd. \r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS provides completely free yet professionally developed,    *\r
  10      *    robust, strictly quality controlled, supported, and cross          *\r
  11      *    platform software that has become a de facto standard.             *\r
  12      *                                                                       *\r
  13      *    Help yourself get started quickly and support the FreeRTOS         *\r
  14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  16      *                                                                       *\r
  17      *    Thank you!                                                         *\r
  18      *                                                                       *\r
  19     ***************************************************************************\r
  20 \r
  21     This file is part of the FreeRTOS distribution.\r
  22 \r
  23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  24     the terms of the GNU General Public License (version 2) as published by the\r
  25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  26 \r
  27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
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  29     >>!   obliged to provide the source code for proprietary components     !<<\r
  30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  31 \r
  32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  35     link: http://www.freertos.org/a00114.html\r
  36 \r
  37     1 tab == 4 spaces!\r
  38 \r
  39     ***************************************************************************\r
  40      *                                                                       *\r
  41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  42      *    not run, what could be wrong?"                                     *\r
  43      *                                                                       *\r
  44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  45      *                                                                       *\r
  46     ***************************************************************************\r
  47 \r
  48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  49     license and Real Time Engineers Ltd. contact details.\r
  50 \r
  51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  54 \r
  55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  57     licenses offer ticketed support, indemnification and middleware.\r
  58 \r
  59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  60     engineered and independently SIL3 certified version for use in safety and\r
  61     mission critical applications that require provable dependability.\r
  62 \r
  63     1 tab == 4 spaces!\r
  64 */\r
  65 \r
  66         PUBLIC _vRegTest1Implementation\r
  67         PUBLIC _vRegTest2Implementation\r
  68 \r
  69         EXTERN _ulRegTest1CycleCount\r
  70         EXTERN _ulRegTest2CycleCount\r
  71 \r
  72         RSEG CODE:CODE(4)\r
  73 \r
  74 _vRegTest1Implementation:\r
  75 \r
  76                 /* Set each register to a known value. */\r
  77                 MOV.L   #0x33333333, R15\r
  78                 MVTACHI R15\r
  79                 MOV.L   #0x44444444, R15\r
  80                 MVTACLO R15\r
  81                 MOV.L   #1, R1\r
  82                 MOV.L   #2, R2\r
  83                 MOV.L   #3, R3\r
  84                 MOV.L   #4, R4\r
  85                 MOV.L   #5, R5\r
  86                 MOV.L   #6, R6\r
  87                 MOV.L   #7, R7\r
  88                 MOV.L   #8, R8\r
  89                 MOV.L   #9, R9\r
  90                 MOV.L   #10, R10\r
  91                 MOV.L   #11, R11\r
  92                 MOV.L   #12, R12\r
  93                 MOV.L   #13, R13\r
  94                 MOV.L   #14, R14\r
  95                 MOV.L   #15, R15\r
  96 \r
  97         /* Loop, checking each iteration that each register still contains the\r
  98         expected value. */\r
  99         TestLoop1:\r
 100 \r
 101                 /* Push the registers that are going to get clobbered. */\r
 102                 PUSHM   R14-R15\r
 103 \r
 104                 /* Increment the loop counter to show this task is still getting CPU\r
 105                 time. */\r
 106                 MOV.L   #_ulRegTest1CycleCount, R14\r
 107                 MOV.L   [ R14 ], R15\r
 108                 ADD             #1, R15\r
 109                 MOV.L   R15, [ R14 ]\r
 110 \r
 111                 /* Yield to extend the text coverage.  Set the bit in the ITU SWINTR\r
 112                 register. */\r
 113                 MOV.L   #1, R14\r
 114                 MOV.L   #0872E0H, R15\r
 115                 MOV.B   R14, [R15]\r
 116                 NOP\r
 117                 NOP\r
 118 \r
 119                 /* Check the accumulator value. */\r
 120                 MVFACHI R15\r
 121                 CMP             #0x33333333, R15\r
 122                 BNE             RegTest2Error\r
 123                 MVFACMI R15\r
 124                 CMP             #0x33334444, R15\r
 125                 BNE             RegTest2Error\r
 126 \r
 127                 /* Restore the clobbered registers. */\r
 128                 POPM    R14-R15\r
 129 \r
 130                 /* Now compare each register to ensure it still contains the value that\r
 131                 was set before this loop was entered. */\r
 132                 CMP             #1, R1\r
 133                 BNE             RegTest1Error\r
 134                 CMP             #2, R2\r
 135                 BNE             RegTest1Error\r
 136                 CMP             #3, R3\r
 137                 BNE             RegTest1Error\r
 138                 CMP             #4, R4\r
 139                 BNE             RegTest1Error\r
 140                 CMP             #5, R5\r
 141                 BNE             RegTest1Error\r
 142                 CMP             #6, R6\r
 143                 BNE             RegTest1Error\r
 144                 CMP             #7, R7\r
 145                 BNE             RegTest1Error\r
 146                 CMP             #8, R8\r
 147                 BNE             RegTest1Error\r
 148                 CMP             #9, R9\r
 149                 BNE             RegTest1Error\r
 150                 CMP             #10, R10\r
 151                 BNE             RegTest1Error\r
 152                 CMP             #11, R11\r
 153                 BNE             RegTest1Error\r
 154                 CMP             #12, R12\r
 155                 BNE             RegTest1Error\r
 156                 CMP             #13, R13\r
 157                 BNE             RegTest1Error\r
 158                 CMP             #14, R14\r
 159                 BNE             RegTest1Error\r
 160                 CMP             #15, R15\r
 161                 BNE             RegTest1Error\r
 162 \r
 163                 /* All comparisons passed, start a new iteration of this loop. */\r
 164                 BRA             TestLoop1\r
 165 \r
 166         /* A compare failed, just loop here so the loop counter stops\r
 167         incrementing causing the check timer to indicate the error. */\r
 168         RegTest1Error:\r
 169                 BRA RegTest1Error\r
 170 \r
 171 /*-----------------------------------------------------------*/\r
 172 \r
 173 _vRegTest2Implementation:\r
 174 \r
 175                 /* Set each register to a known value. */\r
 176                 MOV.L   #0x11111111, R15\r
 177                 MVTACHI R15\r
 178                 MOV.L   #0x22222222, R15\r
 179                 MVTACLO R15\r
 180                 MOV.L   #100, R1\r
 181                 MOV.L   #200, R2\r
 182                 MOV.L   #300, R3\r
 183                 MOV.L   #400, R4\r
 184                 MOV.L   #500, R5\r
 185                 MOV.L   #600, R6\r
 186                 MOV.L   #700, R7\r
 187                 MOV.L   #800, R8\r
 188                 MOV.L   #900, R9\r
 189                 MOV.L   #1000, R10\r
 190                 MOV.L   #1001, R11\r
 191                 MOV.L   #1002, R12\r
 192                 MOV.L   #1003, R13\r
 193                 MOV.L   #1004, R14\r
 194                 MOV.L   #1005, R15\r
 195 \r
 196         /* Loop, checking each iteration that each register still contains the\r
 197         expected value. */\r
 198         TestLoop2:\r
 199 \r
 200                 /* Push the registers that are going to get clobbered. */\r
 201                 PUSHM   R14-R15\r
 202 \r
 203                 /* Increment the loop counter to show this task is still getting CPU\r
 204                 time. */\r
 205                 MOV.L   #_ulRegTest2CycleCount, R14\r
 206                 MOV.L   [ R14 ], R15\r
 207                 ADD             #1, R15\r
 208                 MOV.L   R15, [ R14 ]\r
 209 \r
 210                 /* Check the accumulator value. */\r
 211                 MVFACHI R15\r
 212                 CMP             #0x11111111, R15\r
 213                 BNE             RegTest2Error\r
 214                 MVFACMI R15\r
 215                 CMP             #0x11112222, R15\r
 216                 BNE             RegTest2Error\r
 217 \r
 218                 /* Restore the clobbered registers. */\r
 219                 POPM    R14-R15\r
 220 \r
 221                 /* Now compare each register to ensure it still contains the value that\r
 222                 was set before this loop was entered. */\r
 223                 CMP             #100, R1\r
 224                 BNE             RegTest2Error\r
 225                 CMP             #200, R2\r
 226                 BNE             RegTest2Error\r
 227                 CMP             #300, R3\r
 228                 BNE             RegTest2Error\r
 229                 CMP             #400, R4\r
 230                 BNE             RegTest2Error\r
 231                 CMP             #500, R5\r
 232                 BNE             RegTest2Error\r
 233                 CMP             #600, R6\r
 234                 BNE             RegTest2Error\r
 235                 CMP             #700, R7\r
 236                 BNE             RegTest2Error\r
 237                 CMP             #800, R8\r
 238                 BNE             RegTest2Error\r
 239                 CMP             #900, R9\r
 240                 BNE             RegTest2Error\r
 241                 CMP             #1000, R10\r
 242                 BNE             RegTest2Error\r
 243                 CMP             #1001, R11\r
 244                 BNE             RegTest2Error\r
 245                 CMP             #1002, R12\r
 246                 BNE             RegTest2Error\r
 247                 CMP             #1003, R13\r
 248                 BNE             RegTest2Error\r
 249                 CMP             #1004, R14\r
 250                 BNE             RegTest2Error\r
 251                 CMP             #1005, R15\r
 252                 BNE             RegTest2Error\r
 253 \r
 254                 /* All comparisons passed, start a new iteration of this loop. */\r
 255                 BRA             TestLoop2\r
 256 \r
 257         /* A compare failed, just loop here so the loop counter stops\r
 258         incrementing causing the check timer to indicate the error. */\r
 259         RegTest2Error:\r
 260                 BRA RegTest2Error\r
 261 \r
 262 /*-----------------------------------------------------------*/\r
 263 \r
 264                 END\r
 265 \r