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Change version numbers ready for V8.0.0 release candidate 1 tag.
[freertos] / FreeRTOS / Demo / RX600_RX62N-RSK_IAR / RegTest.s
1 /*\r
2     FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS provides completely free yet professionally developed,    *\r
10      *    robust, strictly quality controlled, supported, and cross          *\r
11      *    platform software that has become a de facto standard.             *\r
12      *                                                                       *\r
13      *    Help yourself get started quickly and support the FreeRTOS         *\r
14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
16      *                                                                       *\r
17      *    Thank you!                                                         *\r
18      *                                                                       *\r
19     ***************************************************************************\r
20 \r
21     This file is part of the FreeRTOS distribution.\r
22 \r
23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
24     the terms of the GNU General Public License (version 2) as published by the\r
25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
26 \r
27     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
28     >>! a combined work that includes FreeRTOS without being obliged to provide\r
29     >>! the source code for proprietary components outside of the FreeRTOS\r
30     >>! kernel.\r
31 \r
32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
35     link: http://www.freertos.org/a00114.html\r
36 \r
37     1 tab == 4 spaces!\r
38 \r
39     ***************************************************************************\r
40      *                                                                       *\r
41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
42      *    not run, what could be wrong?"                                     *\r
43      *                                                                       *\r
44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
45      *                                                                       *\r
46     ***************************************************************************\r
47 \r
48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
49     license and Real Time Engineers Ltd. contact details.\r
50 \r
51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
54 \r
55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
57     licenses offer ticketed support, indemnification and middleware.\r
58 \r
59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
60     engineered and independently SIL3 certified version for use in safety and\r
61     mission critical applications that require provable dependability.\r
62 \r
63     1 tab == 4 spaces!\r
64 */\r
65 \r
66         PUBLIC _prvRegTest1Implementation\r
67         PUBLIC _prvRegTest2Implementation\r
68         \r
69         EXTERN _ulRegTest1CycleCount\r
70         EXTERN _ulRegTest2CycleCount\r
71 \r
72         RSEG CODE:CODE(4)\r
73 \r
74 /* This function is explained in the comments at the top of main.c. */\r
75 _prvRegTest1Implementation:\r
76 \r
77         /* Put a known value in each register. */\r
78         MOV     #1, R1                                          \r
79         MOV     #2, R2                                          \r
80         MOV     #3, R3                                          \r
81         MOV     #4, R4                                          \r
82         MOV     #5, R5                                          \r
83         MOV     #6, R6                                          \r
84         MOV     #7, R7                                          \r
85         MOV     #8, R8                                          \r
86         MOV     #9, R9                                          \r
87         MOV     #10, R10                                        \r
88         MOV     #11, R11                                        \r
89         MOV     #12, R12                                        \r
90         MOV     #13, R13                                        \r
91         MOV     #14, R14                                        \r
92         MOV     #15, R15                                        \r
93         \r
94         /* Loop, checking each itteration that each register still contains the\r
95         expected value. */\r
96 TestLoop1:                                                              \r
97 \r
98         /* Push the registers that are going to get clobbered. */\r
99         PUSHM   R14-R15                                         \r
100         \r
101         /* Increment the loop counter to show this task is still getting CPU time. */\r
102         MOV     #_ulRegTest1CycleCount, R14     \r
103         MOV     [ R14 ], R15                            \r
104         ADD     #1, R15                                         \r
105         MOV     R15, [ R14 ]                            \r
106         \r
107         /* Yield to extend the text coverage.  Set the bit in the ITU SWINTR register. */\r
108         MOV     #1, R14                                         \r
109         MOV     #0872E0H, R15                           \r
110         MOV.B   R14, [R15]                                      \r
111         NOP                                                             \r
112         NOP                                                             \r
113         \r
114         /* Restore the clobbered registers. */\r
115         POPM    R14-R15                                         \r
116         \r
117         /* Now compare each register to ensure it still contains the value that was\r
118         set before this loop was entered. */\r
119         CMP     #1, R1                                          \r
120         BNE     RegTest1Error                           \r
121         CMP     #2, R2                                          \r
122         BNE     RegTest1Error                           \r
123         CMP     #3, R3                                          \r
124         BNE     RegTest1Error                           \r
125         CMP     #4, R4                                          \r
126         BNE     RegTest1Error                           \r
127         CMP     #5, R5                                          \r
128         BNE     RegTest1Error                           \r
129         CMP     #6, R6                                          \r
130         BNE     RegTest1Error                           \r
131         CMP     #7, R7                                          \r
132         BNE     RegTest1Error                           \r
133         CMP     #8, R8                                          \r
134         BNE     RegTest1Error                           \r
135         CMP     #9, R9                                          \r
136         BNE     RegTest1Error                           \r
137         CMP     #10, R10                                        \r
138         BNE     RegTest1Error                           \r
139         CMP     #11, R11                                        \r
140         BNE     RegTest1Error                           \r
141         CMP     #12, R12                                        \r
142         BNE     RegTest1Error                           \r
143         CMP     #13, R13                                        \r
144         BNE     RegTest1Error                           \r
145         CMP     #14, R14                                        \r
146         BNE     RegTest1Error                           \r
147         CMP     #15, R15                                        \r
148         BNE     RegTest1Error                           \r
149 \r
150         /* All comparisons passed, start a new itteratio of this loop. */\r
151         BRA             TestLoop1                               \r
152         \r
153 RegTest1Error:                                                  \r
154         /* A compare failed, just loop here so the loop counter stops incrementing\r
155         - causing the check task to indicate the error. */\r
156         BRA RegTest1Error                                       \r
157 /*-----------------------------------------------------------*/\r
158 \r
159 /* This function is explained in the comments at the top of main.c. */\r
160 _prvRegTest2Implementation:\r
161 \r
162         /* Put a known value in each register. */\r
163         MOV     #10H, R1                                        \r
164         MOV     #20H, R2                                        \r
165         MOV     #30H, R3                                        \r
166         MOV     #40H, R4                                        \r
167         MOV     #50H, R5                                        \r
168         MOV     #60H, R6                                        \r
169         MOV     #70H, R7                                        \r
170         MOV     #80H, R8                                        \r
171         MOV     #90H, R9                                        \r
172         MOV     #100H, R10                                      \r
173         MOV     #110H, R11                                      \r
174         MOV     #120H, R12                                      \r
175         MOV     #130H, R13                                      \r
176         MOV     #140H, R14                                      \r
177         MOV     #150H, R15                                      \r
178         \r
179         /* Loop, checking each itteration that each register still contains the\r
180         expected value. */\r
181 TestLoop2:                                                              \r
182 \r
183         /* Push the registers that are going to get clobbered. */\r
184         PUSHM   R14-R15                                         \r
185         \r
186         /* Increment the loop counter to show this task is still getting CPU time. */\r
187         MOV     #_ulRegTest2CycleCount, R14     \r
188         MOV     [ R14 ], R15                            \r
189         ADD     #1, R15                                         \r
190         MOV     R15, [ R14 ]                            \r
191         \r
192         /* Restore the clobbered registers. */\r
193         POPM    R14-R15                                         \r
194         \r
195         /* Now compare each register to ensure it still contains the value that was\r
196         set before this loop was entered. */\r
197         CMP     #10H, R1                                        \r
198         BNE     RegTest2Error                           \r
199         CMP     #20H, R2                                        \r
200         BNE     RegTest2Error                           \r
201         CMP     #30H, R3                                        \r
202         BNE     RegTest2Error                           \r
203         CMP     #40H, R4                                        \r
204         BNE     RegTest2Error                           \r
205         CMP     #50H, R5                                        \r
206         BNE     RegTest2Error                           \r
207         CMP     #60H, R6                                        \r
208         BNE     RegTest2Error                           \r
209         CMP     #70H, R7                                        \r
210         BNE     RegTest2Error                           \r
211         CMP     #80H, R8                                        \r
212         BNE     RegTest2Error                           \r
213         CMP     #90H, R9                                        \r
214         BNE     RegTest2Error                           \r
215         CMP     #100H, R10                                      \r
216         BNE     RegTest2Error                           \r
217         CMP     #110H, R11                                      \r
218         BNE     RegTest2Error                           \r
219         CMP     #120H, R12                                      \r
220         BNE     RegTest2Error                           \r
221         CMP     #130H, R13                                      \r
222         BNE     RegTest2Error                           \r
223         CMP     #140H, R14                                      \r
224         BNE     RegTest2Error                           \r
225         CMP     #150H, R15                                      \r
226         BNE     RegTest2Error                           \r
227 \r
228         /* All comparisons passed, start a new itteratio of this loop. */\r
229         BRA     TestLoop2                                       \r
230         \r
231 RegTest2Error:                                                  \r
232         /* A compare failed, just loop here so the loop counter stops incrementing\r
233         - causing the check task to indicate the error. */\r
234         BRA RegTest2Error                                       \r
235 \r
236         \r
237         END\r