2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
16 /******************************************************************************
18 * @brief header file for rsa driver
21 ******************************************************************************/
29 #define RSA_KEY_LEN 2048
30 #define RSA_KEY_BYTE (RSA_KEY_LEN >> 3)
31 #define RSA_KEY_WORD (RSA_KEY_LEN >> 5)
33 #define BN_MAX_BITS ((RSA_KEY_LEN << 1) + 32)
34 #define BN_MAX_BYTES ((BN_MAX_BITS + 7) >> 3)
35 #define BN_MAX_WORDS ((BN_MAX_BYTES + 3) >> 2)
37 #define MAX_RSA_LP_CNT 10000
39 #define GET_KEY_BYTE(k) (k >> 3)
40 #define GET_KEY_WORD(k) (k >> 5)
42 #define UINT32_TO_UINT64(data) ((uint64_t)(((uint64_t)(data)) & 0x00000000ffffffffU))
43 #define UINT64L_TO_UINT32(data) ((uint32_t)(((uint64_t)(data)) & 0x00000000ffffffffU))
44 #define UINT64H_TO_UINT32(data) ((uint32_t)((((uint64_t)(data)) >> 32) & 0x00000000ffffffffU))
46 #define PKCS1_PADDING 0x01
47 #define NO_PADDING 0x02
49 #define MD5_PADDING 0x00
50 #define SHA1_PADDING 0x01
51 #define SHA256_PADDING 0x03
53 #define MD5_HASH_SZ 16
54 #define SHA1_HASH_SZ 20
55 #define SHA256_HASH_SZ 32
57 #define RAS_CALCULATE_Q 0x6
58 #define RSA_ENABLE_MODULE 0x3
59 #define RSA_ENDIAN_MODE 0x8
61 #define RSA_CAL_Q_DONE_OFFSET 0x5
63 typedef struct bignum {
64 uint32_t pdata[BN_MAX_WORDS];
69 __IOM uint32_t rsa_mwid; /* Offset: 0x000 (R/W) Width of M register */
70 __IOM uint32_t rsa_ckid; /* Offset: 0x004 (R/W) Width of D register */
71 __IOM uint32_t rsa_bwid; /* Offset: 0x008 (R/W) Width of B register */
72 __IOM uint32_t rsa_ctrl; /* Offset: 0x00c (R/W) RSA control register */
73 __OM uint32_t rsa_rst; /* Offset: 0x010 (W) RSA reset register */
74 __IM uint32_t rsa_lp_cnt; /* Offset: 0x014 (R) Loop counter for inquiry register*/
75 __IM uint32_t rsa_q0; /* Offset: 0x018 (R) High-radix MM algorithm assistant register,part 1*/
76 __IM uint32_t rsa_q1; /* Offset: 0x01c (R) High-radix MM algorithm assistant register,part 2*/
77 __IOM uint32_t rsa_isr; /* Offset: 0x020 (W/R) Interrupt raw status register */
78 __IOM uint32_t rsa_imr; /* Offset: 0x024 (W/R) Interrupt mask register */
79 __IOM uint32_t rev1[54]; /* Reserve regiser */
80 __IOM uint32_t rsa_rfm; /* Offset: 0x100 (W/R) Register file for modulus M */
81 __IOM uint32_t rev2[63]; /* Reserve regiser */
82 __IOM uint32_t rsa_rfd; /* Offset: 0x200 (W/R) Register file for exponent D */
83 __IOM uint32_t rev3[63]; /* Reserve regiser */
84 __IOM uint32_t rsa_rfc; /* Offset: 0x300 (W/R) Register file for hard C */
85 __IOM uint32_t rev4[63]; /* Reserve regiser */
86 __IOM uint32_t rsa_rfb; /* Offset: 0x400 (W/R) Register file for data B */
87 __IOM uint32_t rev5[63]; /* Reserve regiser */
88 __IM uint32_t rsa_rfr; /* Offset: 0x500 (R) Register file for storing the result */