git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/csky/hobbit1_2/include/pin_name.h

   1 /*
   2  * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *   http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16
  17 /******************************************************************************
  18  * @file     pin_name.h
  19  * @brief    header file for the pin_name
  20  * @version  V1.0
  21  * @date     23. August 2017
  22  ******************************************************************************/
  23 #ifndef _PINNAMES_H
  24 #define _PINNAMES_H
  25
  26
  27 #ifdef __cplusplus
  28 extern "C" {
  29 #endif
  30
  31 typedef enum {
  32         PA0_TRIG0_ACMP1P_TCK = 0,
  33         PA1_TRIG1_ACMP1N_TMS,
  34         PA2_TXD0_SPI0MISO,
  35         PA3_RXD0_SPI0MOSI,
  36         PA4_CTS0_PWM0_SPI0SCK_TRIG0,
  37         PA5_RTS0_PWM1_SPI0SSN_TRIG1,
  38
  39         PB0_SCL0_PWM2_I2SMCLK,
  40         PB1_SDA0_PWM3_I2SSCK,
  41         PB2_SPI0SCK_PWM4_I2SWS,
  42         PB3_SPI0MISO_PWM5_I2SSD,
  43
  44         PA6_SPI0MOSI_PWM6_SCL0,
  45         PA7_SPI0SSN_PWM7_SDA0,
  46         PA8_WKUP_ADC0_ACMP0P,
  47         PA9_BOOT_ADC1_PWMFAULT,
  48         PA10_ADC2_TXD0,
  49         PA11_ACMP0N_ADC3_RXD0,
  50
  51         PA12_PWM8_TCK_ADC4,
  52         PA13_PWM9_TMS_ADC5,
  53         PA14_PWM10_ADC6,
  54         PA15_PWM11_ADC7,
  55         PA16_RXD1_ADC8,
  56         PA17_TXD1_ADC9,
  57         PA18_SPI1SSN0_ACMP0O,
  58         PA19_SPI1SSN1_ACMP1O,
  59         PA20_SPI1SSN2_TRIG0_RXD1,
  60         PA21_SPI1SCK_TRIG1_TXD1,
  61         PA22_SPI1MISO_PWM0_ADC10,
  62         PA23_SPI1MOSI_PWM1_ADC11,
  63         PA24_TXD2_I2SMCLK_SPI1SSN0,
  64         PA25_RXD2_I2SSCK_SPI1SSN1,
  65         PA26_CTS2_I2SWS_ADC12,
  66         PA27_RTS2_I2SSD_ADC13,
  67
  68         PC0_SCL1_CTS1_PWM10_ADC14,
  69         PC1_SDA1_RTS1_PWM11_ADC15,
  70
  71 }
  72 pin_name_t;
  73
  74 typedef enum {
  75     PORTA = 0,
  76     PORTB = 1,
  77 } port_name_t;
  78
  79 #ifdef __cplusplus
  80 }
  81 #endif
  82
  83 #endif