2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
17 /******************************************************************************
19 * @brief source file for the pinmux
22 ******************************************************************************/
28 ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
30 #define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))
32 /*******************************************************************************
33 * function: phobos_ioreuse_inital
36 * initial phobos_pinmux
37 *******************************************************************************/
39 void phobos_ioreuse_initial(void)
43 /* gpio data source select */
44 value = readl(PHOBOS_GIPO0_PORTCTL_REG);
45 value |= GPIO0_REUSE_EN;
46 writel(value, PHOBOS_GIPO0_PORTCTL_REG);
48 value = readl(PHOBOS_GIPO1_PORTCTL_REG);
49 value |= GPIO1_REUSE_EN;
50 writel(value, PHOBOS_GIPO1_PORTCTL_REG);
52 /* reuse function select */
53 value = readl(PHOBOS_IOMUX0L_REG);
54 value |= IOMUX0L_FUNCTION_SEL;
55 writel(value, PHOBOS_IOMUX0L_REG);
57 value = readl(PHOBOS_IOMUX0H_REG);
58 value |= IOMUX1L_FUNCTION_SEL;
59 writel(value, PHOBOS_IOMUX0H_REG);
61 value = readl(PHOBOS_IOMUX1L_REG);
62 value |= IOMUX1L_FUNCTION_SEL;
63 writel(value, PHOBOS_IOMUX1L_REG);
66 void phobos_pwm_ioreuse(void)
70 /* gpio data source select */
71 value = readl(PHOBOS_GIPO0_PORTCTL_REG);
72 value |= PWM_GPIO0_REUSE_EN;
73 writel(value, PHOBOS_GIPO0_PORTCTL_REG);
75 /* reuse function select */
76 value = readl(PHOBOS_IOMUX0L_REG);
77 value |= PWM_IOMUX0L_FUNCTION_SEL;
78 writel(value, PHOBOS_IOMUX0L_REG);
82 int32_t pin_mux(pin_name_t pin, uint16_t function)
85 unsigned int reg_val = 0;
90 if (pin < PB0_ADC0_SDA0_PWM5_XX) {
92 /* gpio data source select */
93 val = readl(PHOBOS_GIPO0_PORTCTL_REG);
94 val &= ~(1 << offset);
95 writel(val, PHOBOS_GIPO0_PORTCTL_REG);
97 } else if (pin >= PB0_ADC0_SDA0_PWM5_XX) {
99 /* gpio data source select */
100 val = readl(PHOBOS_GIPO1_PORTCTL_REG);
101 val &= ~(1 << offset);
102 writel(val, PHOBOS_GIPO1_PORTCTL_REG);
109 if (pin >= PB0_ADC0_SDA0_PWM5_XX) {
112 /* gpio data source select */
113 val = readl(PHOBOS_GIPO1_PORTCTL_REG);
114 val |= (1 << offset);
115 writel(val, PHOBOS_GIPO1_PORTCTL_REG);
117 reg_val = (0x3 << (offset * 2));
118 /* reuse function select */
119 val = readl(PHOBOS_IOMUX1L_REG);
121 val |= (function << (2 * offset));
122 writel(val, PHOBOS_IOMUX1L_REG);
127 /* gpio data source select */
128 val = readl(PHOBOS_GIPO0_PORTCTL_REG);
129 val |= (1 << offset);
130 writel(val, PHOBOS_GIPO0_PORTCTL_REG);
132 if (pin >= PA16_SPI1CLK_PWMTRIG1_XX_XX) {
134 reg_val = (0x3 << (offset * 2));
135 /* reuse function select */
136 val = readl(PHOBOS_IOMUX0H_REG);
138 val |= (function << (2 * offset));
139 writel(val, PHOBOS_IOMUX0H_REG);
143 reg_val = (0x3 << (offset * 2));
144 /* reuse function select */
145 val = readl(PHOBOS_IOMUX0L_REG);
147 val |= (function << (2 * offset));
148 writel(val, PHOBOS_IOMUX0L_REG);