git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c

   1 /*\r
   2     FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
   5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
  10      *    Complete, revised, and edited pdf reference manuals are also       *\r
  11      *    available.                                                         *\r
  12      *                                                                       *\r
  13      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
  14      *    ensuring you get running as quickly as possible and with an        *\r
  15      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  16      *    the FreeRTOS project to continue with its mission of providing     *\r
  17      *    professional grade, cross platform, de facto standard solutions    *\r
  18      *    for microcontrollers - completely free of charge!                  *\r
  19      *                                                                       *\r
  20      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
  21      *                                                                       *\r
  22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  23      *                                                                       *\r
  24     ***************************************************************************\r
  25 \r
  26 \r
  27     This file is part of the FreeRTOS distribution.\r
  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  32 \r
  33     >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
  34     distribute a combined work that includes FreeRTOS without being obliged to\r
  35     provide the source code for proprietary components outside of the FreeRTOS\r
  36     kernel.\r
  37 \r
  38     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  39     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  40     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
  41     details. You should have received a copy of the GNU General Public License\r
  42     and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
  43     viewed here: http://www.freertos.org/a00114.html and also obtained by\r
  44     writing to Real Time Engineers Ltd., contact details for whom are available\r
  45     on the FreeRTOS WEB site.\r
  46 \r
  47     1 tab == 4 spaces!\r
  48 \r
  49     ***************************************************************************\r
  50      *                                                                       *\r
  51      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  52      *    not run, what could be wrong?"                                     *\r
  53      *                                                                       *\r
  54      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  55      *                                                                       *\r
  56     ***************************************************************************\r
  57 \r
  58 \r
  59     http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
  60     license and Real Time Engineers Ltd. contact details.\r
  61 \r
  62     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  63     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
  64     fully thread aware and reentrant UDP/IP stack.\r
  65 \r
  66     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
  67     Integrity Systems, who sell the code with commercial support, \r
  68     indemnification and middleware, under the OpenRTOS brand.\r
  69     \r
  70     http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
  71     engineered and independently SIL3 certified version for use in safety and \r
  72     mission critical applications that require provable dependability.\r
  73 */\r
  74 \r
  75 \r
  76 /* Standard includes. */\r
  77 #include <stdlib.h>\r
  78 \r
  79 /* Scheduler include files. */\r
  80 #include "FreeRTOS.h"\r
  81 #include "task.h"\r
  82 #include "queue.h"\r
  83 #include "semphr.h"\r
  84 \r
  85 /* Application includes. */\r
  86 #include "i2c.h"\r
  87 \r
  88 /*-----------------------------------------------------------*/\r
  89 \r
  90 /* Bit definitions within the I2CONCLR register. */\r
  91 #define i2cSTA_BIT              ( ( unsigned char ) 0x20 )\r
  92 #define i2cSI_BIT               ( ( unsigned char ) 0x08 )\r
  93 #define i2cSTO_BIT              ( ( unsigned char ) 0x10 )\r
  94 #define i2cAA_BIT               ( ( unsigned char ) 0x04 )\r
  95 \r
  96 /* Status codes for the I2STAT register. */\r
  97 #define i2cSTATUS_START_TXED                    ( 0x08 )\r
  98 #define i2cSTATUS_REP_START_TXED                ( 0x10 )\r
  99 #define i2cSTATUS_TX_ADDR_ACKED                 ( 0x18 )\r
 100 #define i2cSTATUS_DATA_TXED                             ( 0x28 )\r
 101 #define i2cSTATUS_RX_ADDR_ACKED                 ( 0x40 )\r
 102 #define i2cSTATUS_DATA_RXED                             ( 0x50 )\r
 103 #define i2cSTATUS_LAST_BYTE_RXED                ( 0x58 )\r
 104 \r
 105 /* Constants for operation of the VIC. */\r
 106 #define i2cCLEAR_VIC_INTERRUPT  ( 0 )\r
 107 \r
 108 /* Misc constants. */\r
 109 #define i2cJUST_ONE_BYTE_TO_RX  ( 1 )\r
 110 #define i2cBUFFER_ADDRESS_BYTES ( 2 )\r
 111 \r
 112 /* End the current transmission and free the bus. */\r
 113 #define i2cEND_TRANSMISSION( lStatus )                                  \\r
 114 {                                                                                                               \\r
 115         I2C_I2CONCLR = i2cAA_BIT;                                                       \\r
 116         I2C_I2CONSET = i2cSTO_BIT;                                                      \\r
 117         eCurrentState = eSentStart;                                                     \\r
 118         lTransactionCompleted = lStatus;                                        \\r
 119 }\r
 120 /*-----------------------------------------------------------*/\r
 121 \r
 122 /* Valid i2c communication states. */\r
 123 typedef enum\r
 124 {\r
 125         eSentStart,                             /*<< Last action was the transmission of a start bit. */\r
 126         eSentAddressForWrite,   /*<< Last action was the transmission of the slave address we are to write to. */\r
 127         eSentAddressForRead,    /*<< Last action was the transmission of the slave address we are to read from. */\r
 128         eSentData,                              /*<< Last action was the transmission of a data byte. */\r
 129         eReceiveData                    /*<< We expected data to be received. */\r
 130 } I2C_STATE;\r
 131 /*-----------------------------------------------------------*/\r
 132 \r
 133 /* Points to the message currently being sent. */\r
 134 volatile xI2CMessage *pxCurrentMessage = NULL;  \r
 135 \r
 136 /* The queue of messages waiting to be transmitted. */\r
 137 static xQueueHandle xMessagesForTx;\r
 138 \r
 139 /* Flag used to indicate whether or not the ISR is amid sending a message. */\r
 140 unsigned long ulBusFree = ( unsigned long ) pdTRUE;\r
 141 \r
 142 /* Setting this to true will cause the TCP task to think a message is \r
 143 complete and thus restart.  It can therefore be used under error states\r
 144 to force a restart. */\r
 145 volatile long lTransactionCompleted = pdTRUE;\r
 146 \r
 147 /*-----------------------------------------------------------*/\r
 148 \r
 149 void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxTxMessages, unsigned long **ppulBusFree )\r
 150 {\r
 151         /* Create the queues used to hold Rx and Tx characters. */\r
 152         xMessagesForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( xI2CMessage * ) );\r
 153 \r
 154         /* Pass back a reference to the queue and bus free flag so the I2C API file \r
 155         can post messages. */\r
 156         *pxTxMessages = xMessagesForTx;\r
 157         *ppulBusFree = &ulBusFree;\r
 158 }\r
 159 /*-----------------------------------------------------------*/\r
 160 \r
 161 /* The ISR entry point. */\r
 162 void vI2C_ISR_Wrapper( void ) __attribute__ (( naked ));\r
 163 \r
 164 /* The ISR function to perform the actual work.  This must be a separate\r
 165 function from the wrapper to ensure the correct stack frame is set up. */\r
 166 void vI2C_ISR_Handler( void );\r
 167 \r
 168 /*-----------------------------------------------------------*/\r
 169 \r
 170 void vI2C_ISR_Wrapper( void )\r
 171 {\r
 172         /* Save the context of the interrupted task. */\r
 173         portSAVE_CONTEXT();\r
 174 \r
 175         /* Call the handler to perform the actual work.  This must be a\r
 176         separate function to ensure the correct stack frame is set up. */\r
 177         vI2C_ISR_Handler();\r
 178 \r
 179         /* Restore the context of whichever task is going to run next. */\r
 180         portRESTORE_CONTEXT();\r
 181 }\r
 182 /*-----------------------------------------------------------*/\r
 183 \r
 184 void vI2C_ISR_Handler( void )\r
 185 {\r
 186 /* Holds the current transmission state. */                                                     \r
 187 static I2C_STATE eCurrentState = eSentStart;\r
 188 static long lMessageIndex = -i2cBUFFER_ADDRESS_BYTES; /* There are two address bytes to send prior to the data. */\r
 189 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
 190 long lBytesLeft;\r
 191 \r
 192         /* The action taken for this interrupt depends on our current state. */\r
 193         switch( eCurrentState )\r
 194         {\r
 195                 case eSentStart :       \r
 196 \r
 197                                 /* We sent a start bit, if it was successful we can\r
 198                                 go on to send the slave address. */\r
 199                                 if( ( I2C_I2STAT == i2cSTATUS_START_TXED ) || ( I2C_I2STAT == i2cSTATUS_REP_START_TXED ) )\r
 200                                 {\r
 201                                         /* Send the slave address. */\r
 202                                         I2C_I2DAT = pxCurrentMessage->ucSlaveAddress;\r
 203 \r
 204                                         if( pxCurrentMessage->ucSlaveAddress & i2cREAD )\r
 205                                         {\r
 206                                                 /* We are then going to read bytes back from the \r
 207                                                 slave. */\r
 208                                                 eCurrentState = eSentAddressForRead;\r
 209                                                 \r
 210                                                 /* Initialise the buffer index so the first byte goes\r
 211                                                 into the first buffer position. */\r
 212                                                 lMessageIndex = 0;\r
 213                                         }\r
 214                                         else\r
 215                                         {\r
 216                                                 /* We are then going to write some data to the slave. */\r
 217                                                 eCurrentState = eSentAddressForWrite;\r
 218 \r
 219                                                 /* When writing bytes we first have to send the two\r
 220                                                 byte buffer address so lMessageIndex is set negative,\r
 221                                                 when it reaches 0 it is time to send the actual data. */\r
 222                                                 lMessageIndex = -i2cBUFFER_ADDRESS_BYTES;\r
 223                                         }\r
 224                                 }\r
 225                                 else\r
 226                                 {\r
 227                                         /* Could not send the start bit so give up. */\r
 228                                         i2cEND_TRANSMISSION( pdFAIL );                                  \r
 229                                 }\r
 230 \r
 231                                 I2C_I2CONCLR = i2cSTA_BIT;                              \r
 232 \r
 233                                 break;\r
 234 \r
 235                 case eSentAddressForWrite :\r
 236 \r
 237                                 /* We sent the address of the slave we are going to write to.\r
 238                                 If this was acknowledged we     can go on to send the data. */\r
 239                                 if( I2C_I2STAT == i2cSTATUS_TX_ADDR_ACKED )\r
 240                                 {\r
 241                                         /* Start the first byte transmitting which is the \r
 242                                         first byte of the buffer address to which the data will \r
 243                                         be sent. */\r
 244                                         I2C_I2DAT = pxCurrentMessage->ucBufferAddressHighByte;\r
 245                                         eCurrentState = eSentData;\r
 246                                 }\r
 247                                 else\r
 248                                 {\r
 249                                         /* Address was not acknowledged so give up. */\r
 250                                         i2cEND_TRANSMISSION( pdFAIL );                                  \r
 251                                 }                                       \r
 252                                 break;\r
 253 \r
 254                 case eSentAddressForRead :\r
 255 \r
 256                                 /* We sent the address of the slave we are going to read from.\r
 257                                 If this was acknowledged we can go on to read the data. */\r
 258                                 if( I2C_I2STAT == i2cSTATUS_RX_ADDR_ACKED )\r
 259                                 {\r
 260                                         eCurrentState = eReceiveData;\r
 261                                         if( pxCurrentMessage->lMessageLength > i2cJUST_ONE_BYTE_TO_RX )\r
 262                                         {\r
 263                                                 /* Don't ack the last byte of the message. */\r
 264                                                 I2C_I2CONSET = i2cAA_BIT;\r
 265                                         }                                       \r
 266                                 }\r
 267                                 else\r
 268                                 {\r
 269                                         /* Something unexpected happened - give up. */\r
 270                                         i2cEND_TRANSMISSION( pdFAIL );                                  \r
 271                                 }\r
 272                                 break;\r
 273 \r
 274                 case eReceiveData :\r
 275                                 \r
 276                                 /* We have just received a byte from the slave. */\r
 277                                 if( ( I2C_I2STAT == i2cSTATUS_DATA_RXED ) || ( I2C_I2STAT == i2cSTATUS_LAST_BYTE_RXED ) )\r
 278                                 {\r
 279                                         /* Buffer the byte just received then increment the index \r
 280                                         so it points to the next free space. */\r
 281                                         pxCurrentMessage->pucBuffer[ lMessageIndex ] = I2C_I2DAT;\r
 282                                         lMessageIndex++;\r
 283 \r
 284                                         /* How many more bytes are we expecting to receive? */\r
 285                                         lBytesLeft = pxCurrentMessage->lMessageLength - lMessageIndex;\r
 286                                         if( lBytesLeft == ( unsigned long ) 0 )\r
 287                                         {\r
 288                                                 /* This was the last byte in the message. */\r
 289                                                 i2cEND_TRANSMISSION( pdPASS );\r
 290 \r
 291                                                 /* If xMessageCompleteSemaphore is not null then there\r
 292                                                 is a task waiting for this message to complete and we\r
 293                                                 must 'give' the semaphore so the task is woken.*/\r
 294                                                 if( pxCurrentMessage->xMessageCompleteSemaphore )\r
 295                                                 {\r
 296                                                         xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, &xHigherPriorityTaskWoken );\r
 297                                                 }\r
 298 \r
 299                                                 /* Are there any other messages to transact? */\r
 300                                                 if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xHigherPriorityTaskWoken ) == pdTRUE )\r
 301                                                 {\r
 302                                                         /* Start the next message - which was\r
 303                                                         retrieved from the queue. */\r
 304                                                         I2C_I2CONSET = i2cSTA_BIT;\r
 305                                                 }\r
 306                                                 else\r
 307                                                 {\r
 308                                                         /* No more messages were found to be waiting for\r
 309                                                         transaction so the bus is free. */\r
 310                                                         ulBusFree = ( unsigned long ) pdTRUE;                   \r
 311                                                 }                                               \r
 312                                         }\r
 313                                         else\r
 314                                         {\r
 315                                                 /* There are more bytes to receive but don't ack the \r
 316                                                 last byte. */\r
 317                                                 if( lBytesLeft <= i2cJUST_ONE_BYTE_TO_RX )\r
 318                                                 {\r
 319                                                         I2C_I2CONCLR = i2cAA_BIT;\r
 320                                                 }                                                        \r
 321                                         }\r
 322                                 }\r
 323                                 else\r
 324                                 {\r
 325                                         /* Something unexpected happened - give up. */\r
 326                                         i2cEND_TRANSMISSION( pdFAIL );                                  \r
 327                                 }\r
 328 \r
 329                                 break;\r
 330                                 \r
 331                 case eSentData  :       \r
 332 \r
 333                                 /* We sent a data byte, if successful send the  next byte in \r
 334                                 the message. */\r
 335                                 if( I2C_I2STAT == i2cSTATUS_DATA_TXED )\r
 336                                 {\r
 337                                         /* Index to the next byte to send. */\r
 338                                         lMessageIndex++;\r
 339                                         if( lMessageIndex < 0 )\r
 340                                         {\r
 341                                                 /* lMessage index is still negative so we have so far \r
 342                                                 only sent the first byte of the buffer address.  Send \r
 343                                                 the second byte now, then initialise the buffer index\r
 344                                                 to zero so the next byte sent comes from the actual \r
 345                                                 data buffer. */\r
 346                                                 I2C_I2DAT = pxCurrentMessage->ucBufferAddressLowByte;\r
 347                                         }\r
 348                                         else if( lMessageIndex < pxCurrentMessage->lMessageLength )\r
 349                                         {\r
 350                                                 /* Simply send the next byte in the tx buffer. */\r
 351                                                 I2C_I2DAT = pxCurrentMessage->pucBuffer[ lMessageIndex ];                                                                               \r
 352                                         }\r
 353                                         else\r
 354                                         {\r
 355                                                 /* No more bytes in this message to be send.  Finished \r
 356                                                 sending message - send a stop bit. */\r
 357                                                 i2cEND_TRANSMISSION( pdPASS );\r
 358 \r
 359                                                 /* If xMessageCompleteSemaphore is not null then there\r
 360                                                 is a task waiting for this message to be sent and the\r
 361                                                 semaphore must be 'given' to wake the task. */\r
 362                                                 if( pxCurrentMessage->xMessageCompleteSemaphore )\r
 363                                                 {\r
 364                                                         xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, &xHigherPriorityTaskWoken );\r
 365                                                 }\r
 366 \r
 367                                                 /* Are there any other messages to transact? */\r
 368                                                 if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xHigherPriorityTaskWoken ) == pdTRUE )\r
 369                                                 {\r
 370                                                         /* Start the next message from the Tx queue. */\r
 371                                                         I2C_I2CONSET = i2cSTA_BIT;\r
 372                                                 }\r
 373                                                 else\r
 374                                                 {\r
 375                                                         /* No more message were queues for transaction so \r
 376                                                         the bus is free. */\r
 377                                                         ulBusFree = ( unsigned long ) pdTRUE;                   \r
 378                                                 }\r
 379                                         }\r
 380                                 }\r
 381                                 else\r
 382                                 {\r
 383                                         /* Something unexpected happened, give up. */\r
 384                                         i2cEND_TRANSMISSION( pdFAIL );                                  \r
 385                                 }\r
 386                                 break;\r
 387 \r
 388                 default :       \r
 389                 \r
 390                                 /* Should never get here. */\r
 391                                 eCurrentState = eSentStart;\r
 392                                 break;\r
 393         }       \r
 394 \r
 395         /* Clear the interrupt. */\r
 396         I2C_I2CONCLR = i2cSI_BIT;\r
 397         VICVectAddr = i2cCLEAR_VIC_INTERRUPT;\r
 398 \r
 399         if( xHigherPriorityTaskWoken )\r
 400         {\r
 401                 portYIELD_FROM_ISR();\r
 402         }\r
 403 }\r
 404 /*-----------------------------------------------------------*/\r
 405 \r