2 FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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71 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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73 NOTE: This driver is primarily to test the scheduler functionality. It does
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74 not effectively use the buffers or DMA and is therefore not intended to be
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75 an example of an efficient driver. */
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77 /* Standard include file. */
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80 /* Scheduler include files. */
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81 #include "FreeRTOS.h"
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85 /* Demo app include files. */
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88 /* Hardware setup. */
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91 #define serLOW_SPEED 0
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92 #define serONE_STOP_BIT 0
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93 #define serEIGHT_DATA_BITS_NO_PARITY 0
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94 #define serNORMAL_IDLE_STATE 0
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95 #define serAUTO_BAUD_OFF 0
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96 #define serLOOPBACK_OFF 0
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97 #define serWAKE_UP_DISABLE 0
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98 #define serNO_HARDWARE_FLOW_CONTROL 0
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99 #define serSTANDARD_IO 0
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100 #define serNO_IRDA 0
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101 #define serCONTINUE_IN_IDLE_MODE 0
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102 #define serUART_ENABLED 1
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103 #define serINTERRUPT_ON_SINGLE_CHAR 0
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104 #define serTX_ENABLE 1
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105 #define serINTERRUPT_ENABLE 1
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106 #define serINTERRUPT_DISABLE 0
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107 #define serCLEAR_FLAG 0
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108 #define serSET_FLAG 1
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111 /* The queues used to communicate between tasks and ISR's. */
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112 static QueueHandle_t xRxedChars;
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113 static QueueHandle_t xCharsForTx;
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115 static portBASE_TYPE xTxHasEnded;
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116 /*-----------------------------------------------------------*/
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118 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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122 /* Create the queues used by the com test task. */
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123 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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124 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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126 /* Setup the UART. */
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127 U2MODEbits.BRGH = serLOW_SPEED;
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128 U2MODEbits.STSEL = serONE_STOP_BIT;
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129 U2MODEbits.PDSEL = serEIGHT_DATA_BITS_NO_PARITY;
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130 U2MODEbits.ABAUD = serAUTO_BAUD_OFF;
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131 U2MODEbits.LPBACK = serLOOPBACK_OFF;
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132 U2MODEbits.WAKE = serWAKE_UP_DISABLE;
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133 U2MODEbits.UEN = serNO_HARDWARE_FLOW_CONTROL;
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134 U2MODEbits.IREN = serNO_IRDA;
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135 U2MODEbits.USIDL = serCONTINUE_IN_IDLE_MODE;
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136 U2MODEbits.UARTEN = serUART_ENABLED;
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138 U2BRG = (unsigned short)(( (float)configCPU_CLOCK_HZ / ( (float)16 * (float)ulWantedBaud ) ) - (float)0.5);
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140 U2STAbits.URXISEL = serINTERRUPT_ON_SINGLE_CHAR;
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141 U2STAbits.UTXEN = serTX_ENABLE;
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142 U2STAbits.UTXINV = serNORMAL_IDLE_STATE;
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143 U2STAbits.UTXISEL0 = serINTERRUPT_ON_SINGLE_CHAR;
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144 U2STAbits.UTXISEL1 = serINTERRUPT_ON_SINGLE_CHAR;
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146 /* It is assumed that this function is called prior to the scheduler being
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147 started. Therefore interrupts must not be allowed to occur yet as they
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148 may attempt to perform a context switch. */
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149 portDISABLE_INTERRUPTS();
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151 IFS1bits.U2RXIF = serCLEAR_FLAG;
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152 IFS1bits.U2TXIF = serCLEAR_FLAG;
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153 IPC7bits.U2RXIP = configKERNEL_INTERRUPT_PRIORITY;
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154 IPC7bits.U2TXIP = configKERNEL_INTERRUPT_PRIORITY;
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155 IEC1bits.U2TXIE = serINTERRUPT_ENABLE;
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156 IEC1bits.U2RXIE = serINTERRUPT_ENABLE;
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158 /* Clear the Rx buffer. */
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159 while( U2STAbits.URXDA == serSET_FLAG )
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164 xTxHasEnded = pdTRUE;
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168 /*-----------------------------------------------------------*/
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170 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )
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172 /* Only one port is supported. */
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175 /* Get the next character from the buffer. Return false if no characters
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176 are available or arrive before xBlockTime expires. */
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177 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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186 /*-----------------------------------------------------------*/
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188 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )
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190 /* Only one port is supported. */
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193 /* Return false if after the block time there is no room on the Tx queue. */
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194 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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199 /* A critical section should not be required as xTxHasEnded will not be
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200 written to by the ISR if it is already 0 (is this correct?). */
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203 xTxHasEnded = pdFALSE;
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204 IFS1bits.U2TXIF = serSET_FLAG;
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209 /*-----------------------------------------------------------*/
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211 void vSerialClose( xComPortHandle xPort )
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214 /*-----------------------------------------------------------*/
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216 void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
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219 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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221 /* Get the character and post it on the queue of Rxed characters.
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222 If the post causes a task to wake force a context switch as the woken task
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223 may have a higher priority than the task we have interrupted. */
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224 IFS1bits.U2RXIF = serCLEAR_FLAG;
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225 while( U2STAbits.URXDA )
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228 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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231 if( xHigherPriorityTaskWoken != pdFALSE )
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236 /*-----------------------------------------------------------*/
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238 void __attribute__((__interrupt__, auto_psv)) _U2TXInterrupt( void )
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241 portBASE_TYPE xTaskWoken = pdFALSE;
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243 /* If the transmit buffer is full we cannot get the next character.
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244 Another interrupt will occur the next time there is space so this does
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246 IFS1bits.U2TXIF = serCLEAR_FLAG;
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247 while( !( U2STAbits.UTXBF ) )
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249 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
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251 /* Send the next character queued for Tx. */
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256 /* Queue empty, nothing to send. */
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257 xTxHasEnded = pdTRUE;
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262 if( xTaskWoken != pdFALSE )
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