2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 >>! NOTE: The modification to the GPL is included to allow you to !<<
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14 >>! distribute a combined work that includes FreeRTOS without being !<<
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15 >>! obliged to provide the source code for proprietary components !<<
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16 >>! outside of the FreeRTOS kernel. !<<
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18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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21 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * Having a problem? Start by reading the FAQ "My application does *
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28 * not run, what could be wrong?". Have you defined configASSERT()? *
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30 * http://www.FreeRTOS.org/FAQHelp.html *
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32 ***************************************************************************
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34 ***************************************************************************
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36 * FreeRTOS provides completely free yet professionally developed, *
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37 * robust, strictly quality controlled, supported, and cross *
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38 * platform software that is more than just the market leader, it *
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39 * is the industry's de facto standard. *
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41 * Help yourself get started quickly while simultaneously helping *
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42 * to support the FreeRTOS project by purchasing a FreeRTOS *
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43 * tutorial book, reference manual, or both: *
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44 * http://www.FreeRTOS.org/Documentation *
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46 ***************************************************************************
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48 ***************************************************************************
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50 * Investing in training allows your team to be as productive as *
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51 * possible as early as possible, lowering your overall development *
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52 * cost, and enabling you to bring a more robust product to market *
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53 * earlier than would otherwise be possible. Richard Barry is both *
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54 * the architect and key author of FreeRTOS, and so also the world's *
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55 * leading authority on what is the world's most popular real time *
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56 * kernel for deeply embedded MCU designs. Obtaining your training *
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57 * from Richard ensures your team will gain directly from his in-depth *
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58 * product knowledge and years of usage experience. Contact Real Time *
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59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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60 * by Richard Barry: http://www.FreeRTOS.org/contact
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62 ***************************************************************************
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64 ***************************************************************************
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66 * You are receiving this top quality software for free. Please play *
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67 * fair and reciprocate by reporting any suspected issues and *
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68 * participating in the community forum: *
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69 * http://www.FreeRTOS.org/support *
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73 ***************************************************************************
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75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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76 license and Real Time Engineers Ltd. contact details.
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78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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87 licenses offer ticketed support, indemnification and commercial middleware.
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89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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90 engineered and independently SIL3 certified version for use in safety and
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91 mission critical applications that require provable dependability.
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98 BASIC INTERRUPT DRIVEN DRIVER FOR USB.
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100 This file contains all the usb components that must be compiled
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101 to ARM mode. The components that can be compiled to either ARM or THUMB
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102 mode are contained in USB-CDC.c.
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106 /* Scheduler includes. */
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107 #include "FreeRTOS.h"
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111 /* Demo application includes. */
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114 #include "USB-CDC.h"
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116 #define usbINT_CLEAR_MASK (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
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117 /*-----------------------------------------------------------*/
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119 /* Messages and queue used to communicate between the ISR and the USB task. */
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120 static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
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121 extern QueueHandle_t xUSBInterruptQueue;
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122 /*-----------------------------------------------------------*/
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124 /* The ISR can cause a context switch so is declared naked. */
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125 void vUSB_ISR_Wrapper( void ) __attribute__ ((naked));
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127 /* The function that actually performs the ISR work. This must be separate
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128 from the wrapper function to ensure the correct stack frame gets set up. */
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129 void vUSB_ISR_Handler( void );
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130 /*-----------------------------------------------------------*/
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132 void vUSB_ISR_Handler( void )
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134 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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135 static volatile unsigned long ulNextMessage = 0;
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136 xISRStatus *pxMessage;
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137 unsigned long ulRxBytes;
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138 unsigned char ucFifoIndex;
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140 /* Use the next message from the array. */
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141 pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );
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144 /* Save UDP ISR state for task-level processing. */
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145 pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;
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146 pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
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148 /* Clear interrupts from ICR. */
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149 AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
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152 /* Process incoming FIFO data. Must set DIR (if needed) and clear RXSETUP
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155 /* Read CSR and get incoming byte count. */
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156 ulRxBytes = ( pxMessage->ulCSR0 >> 16 ) & usbRX_COUNT_MASK;
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158 /* Receive control transfers on endpoint 0. */
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159 if( pxMessage->ulCSR0 & ( AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 ) )
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161 /* Save FIFO data buffer for either a SETUP or DATA stage */
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162 for( ucFifoIndex = 0; ucFifoIndex < ulRxBytes; ucFifoIndex++ )
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164 pxMessage->ucFifoData[ ucFifoIndex ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ];
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167 /* Set direction for data stage. Must be done before RXSETUP is
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169 if( ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RXSETUP ) )
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171 if( ulRxBytes && ( pxMessage->ucFifoData[ usbREQUEST_TYPE_INDEX ] & 0x80 ) )
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173 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] |= AT91C_UDP_DIR;
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175 /* Might not be wise in an ISR! */
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176 while( !(AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_DIR) );
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179 /* Clear RXSETUP */
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180 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~AT91C_UDP_RXSETUP;
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182 /* Might not be wise in an ISR! */
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183 while ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RXSETUP );
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187 /* Clear RX_DATA_BK0 */
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188 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~AT91C_UDP_RX_DATA_BK0;
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190 /* Might not be wise in an ISR! */
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191 while ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RX_DATA_BK0 );
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195 /* If we received data on endpoint 1, disable its interrupts until it is
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196 processed in the main loop */
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197 if( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] & ( AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 ) )
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199 AT91C_BASE_UDP->UDP_IDR = AT91C_UDP_EPINT1;
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202 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~( AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT );
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204 /* Clear interrupts for the other endpoints, retain data flags for endpoint
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206 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] &= ~( AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP );
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207 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_2 ] &= ~usbINT_CLEAR_MASK;
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208 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_3 ] &= ~usbINT_CLEAR_MASK;
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210 /* Post ISR data to queue for task-level processing */
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211 xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
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213 /* Clear AIC to complete ISR processing */
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214 AT91C_BASE_AIC->AIC_EOICR = 0;
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216 /* Do a task switch if needed */
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217 if( xHigherPriorityTaskWoken )
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219 /* This call will ensure that the unblocked task will be executed
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220 immediately upon completion of the ISR if it has a priority higher
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221 than the interrupted task. */
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222 portYIELD_FROM_ISR();
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225 /*-----------------------------------------------------------*/
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227 void vUSB_ISR_Wrapper( void )
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229 /* Save the context of the interrupted task. */
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230 portSAVE_CONTEXT();
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232 /* Call the handler to do the work. This must be a separate
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233 function to ensure the stack frame is set up correctly. */
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234 vUSB_ISR_Handler();
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236 /* Restore the context of whichever task will execute next. */
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237 portRESTORE_CONTEXT();
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