2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
\r
4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
\r
5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 ***************************************************************************
\r
9 * FreeRTOS tutorial books are available in pdf and paperback. *
\r
10 * Complete, revised, and edited pdf reference manuals are also *
\r
13 * Purchasing FreeRTOS documentation will not only help you, by *
\r
14 * ensuring you get running as quickly as possible and with an *
\r
15 * in-depth knowledge of how to use FreeRTOS, it will also help *
\r
16 * the FreeRTOS project to continue with its mission of providing *
\r
17 * professional grade, cross platform, de facto standard solutions *
\r
18 * for microcontrollers - completely free of charge! *
\r
20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
\r
22 * Thank you for using FreeRTOS, and thank you for your support! *
\r
24 ***************************************************************************
\r
27 This file is part of the FreeRTOS distribution.
\r
29 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
30 the terms of the GNU General Public License (version 2) as published by the
\r
31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
\r
33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
\r
34 distribute a combined work that includes FreeRTOS without being obliged to
\r
35 provide the source code for proprietary components outside of the FreeRTOS
\r
38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
\r
39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
\r
40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
\r
41 details. You should have received a copy of the GNU General Public License
\r
42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
\r
43 viewed here: http://www.freertos.org/a00114.html and also obtained by
\r
44 writing to Real Time Engineers Ltd., contact details for whom are available
\r
45 on the FreeRTOS WEB site.
\r
49 ***************************************************************************
\r
51 * Having a problem? Start by reading the FAQ "My application does *
\r
52 * not run, what could be wrong?" *
\r
54 * http://www.FreeRTOS.org/FAQHelp.html *
\r
56 ***************************************************************************
\r
59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
\r
60 license and Real Time Engineers Ltd. contact details.
\r
62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
\r
64 fully thread aware and reentrant UDP/IP stack.
\r
66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
\r
67 Integrity Systems, who sell the code with commercial support,
\r
68 indemnification and middleware, under the OpenRTOS brand.
\r
70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
\r
71 engineered and independently SIL3 certified version for use in safety and
\r
72 mission critical applications that require provable dependability.
\r
77 BASIC INTERRUPT DRIVEN DRIVER FOR USB.
\r
79 This file contains all the usb components that must be compiled
\r
80 to ARM mode. The components that can be compiled to either ARM or THUMB
\r
81 mode are contained in USB-CDC.c.
\r
85 /* Scheduler includes. */
\r
86 #include "FreeRTOS.h"
\r
90 /* Demo application includes. */
\r
93 #include "USB-CDC.h"
\r
95 #define usbINT_CLEAR_MASK (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
\r
96 /*-----------------------------------------------------------*/
\r
98 /* Messages and queue used to communicate between the ISR and the USB task. */
\r
99 static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
\r
100 extern xQueueHandle xUSBInterruptQueue;
\r
101 /*-----------------------------------------------------------*/
\r
103 /* The ISR can cause a context switch so is declared naked. */
\r
104 void vUSB_ISR_Wrapper( void ) __attribute__ ((naked));
\r
106 /* The function that actually performs the ISR work. This must be separate
\r
107 from the wrapper function to ensure the correct stack frame gets set up. */
\r
108 void vUSB_ISR_Handler( void );
\r
109 /*-----------------------------------------------------------*/
\r
111 void vUSB_ISR_Handler( void )
\r
113 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
114 static volatile unsigned long ulNextMessage = 0;
\r
115 xISRStatus *pxMessage;
\r
116 unsigned long ulRxBytes;
\r
117 unsigned char ucFifoIndex;
\r
119 /* Use the next message from the array. */
\r
120 pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );
\r
123 /* Save UDP ISR state for task-level processing. */
\r
124 pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;
\r
125 pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
\r
127 /* Clear interrupts from ICR. */
\r
128 AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
\r
131 /* Process incoming FIFO data. Must set DIR (if needed) and clear RXSETUP
\r
134 /* Read CSR and get incoming byte count. */
\r
135 ulRxBytes = ( pxMessage->ulCSR0 >> 16 ) & usbRX_COUNT_MASK;
\r
137 /* Receive control transfers on endpoint 0. */
\r
138 if( pxMessage->ulCSR0 & ( AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 ) )
\r
140 /* Save FIFO data buffer for either a SETUP or DATA stage */
\r
141 for( ucFifoIndex = 0; ucFifoIndex < ulRxBytes; ucFifoIndex++ )
\r
143 pxMessage->ucFifoData[ ucFifoIndex ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ];
\r
146 /* Set direction for data stage. Must be done before RXSETUP is
\r
148 if( ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RXSETUP ) )
\r
150 if( ulRxBytes && ( pxMessage->ucFifoData[ usbREQUEST_TYPE_INDEX ] & 0x80 ) )
\r
152 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] |= AT91C_UDP_DIR;
\r
154 /* Might not be wise in an ISR! */
\r
155 while( !(AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_DIR) );
\r
158 /* Clear RXSETUP */
\r
159 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~AT91C_UDP_RXSETUP;
\r
161 /* Might not be wise in an ISR! */
\r
162 while ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RXSETUP );
\r
166 /* Clear RX_DATA_BK0 */
\r
167 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~AT91C_UDP_RX_DATA_BK0;
\r
169 /* Might not be wise in an ISR! */
\r
170 while ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RX_DATA_BK0 );
\r
174 /* If we received data on endpoint 1, disable its interrupts until it is
\r
175 processed in the main loop */
\r
176 if( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] & ( AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 ) )
\r
178 AT91C_BASE_UDP->UDP_IDR = AT91C_UDP_EPINT1;
\r
181 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~( AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT );
\r
183 /* Clear interrupts for the other endpoints, retain data flags for endpoint
\r
185 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] &= ~( AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP );
\r
186 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_2 ] &= ~usbINT_CLEAR_MASK;
\r
187 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_3 ] &= ~usbINT_CLEAR_MASK;
\r
189 /* Post ISR data to queue for task-level processing */
\r
190 xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
\r
192 /* Clear AIC to complete ISR processing */
\r
193 AT91C_BASE_AIC->AIC_EOICR = 0;
\r
195 /* Do a task switch if needed */
\r
196 if( xHigherPriorityTaskWoken )
\r
198 /* This call will ensure that the unblocked task will be executed
\r
199 immediately upon completion of the ISR if it has a priority higher
\r
200 than the interrupted task. */
\r
201 portYIELD_FROM_ISR();
\r
204 /*-----------------------------------------------------------*/
\r
206 void vUSB_ISR_Wrapper( void )
\r
208 /* Save the context of the interrupted task. */
\r
209 portSAVE_CONTEXT();
\r
211 /* Call the handler to do the work. This must be a separate
\r
212 function to ensure the stack frame is set up correctly. */
\r
213 vUSB_ISR_Handler();
\r
215 /* Restore the context of whichever task will execute next. */
\r
216 portRESTORE_CONTEXT();
\r