1 Documentation and download available at http://www.FreeRTOS.org/
\r
3 Changes since the last release:
\r
4 + Added xTaskCatchUpTicks() which corrects the tick count value after the
\r
5 application code has held interrupts disabled for an extended period.
\r
6 + Updated the xTaskResumeAll() implementation so it uses the new
\r
7 xTaskCatchUpTicks() function mentioned above to unwind ticks that were
\r
8 pended while the scheduler was suspended.
\r
9 + Update the Windows simulator port to use a synchronous object to prevent
\r
10 a user reported error whereby a task continues to run for a short time
\r
11 after being moved to the Blocked state. Note we were not able to
\r
12 replicate the reported error.
\r
13 + Added the vPortGetHeapStats() API function which returns information on
\r
14 the heap_4 and heap_5 state.
\r
15 + Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it
\r
16 has same type as variables it is compared to, and therefore also rename
\r
17 the variable xPendingTicks.
\r
18 + Correct alignment of stack top in RISC-V port when
\r
19 configISR_STACK_SIZE_WORDS is defined to a non zero value.
\r
20 + RISC-V port updates: The machine timer compare register can now be for
\r
21 any HART, and correct the sequence used to update the 64-bit machine timer
\r
22 compare register on 32-bit cores.
\r
23 + Update Keil projects that use the MPU so memory regions come from linker
\r
24 script (scatter file) variables instead of being hard coded.
\r
25 + Added tickless low power modes into the ARM, IAR and GCC Cortex-M0 compiler
\r
27 + Updated the behaviour of the ARMv7-M MPU (Memory Protection Unit) ports to
\r
28 match that of the ARMv8-M ports whereby privilege escalations can only
\r
29 originate from within the kernel's own memory segment.
\r
30 + Added LPC51U68 Cortex-M0+ port for GCC (MCUXpresso), Keil and IAR
\r
32 + Added CORTEX_MPU_STM32L4_Discovery_Keil_STM32Cube demo.
\r
33 + Added xTaskAbortDelayFromISR() API function.
\r
34 + Added xTaskNotifyValueClear() API function.
\r
37 Changes between FreeRTOS V10.2.1 and FreeRTOS V10.2.0 released May 13 2019:
\r
39 + Added ARM Cortex-M23 port layer to complement the pre-existing ARM
\r
40 Cortex-M33 port layer.
\r
41 + The RISC-V port now automatically switches between 32-bit and 64-bit
\r
43 + Introduced the portMEMORY_BARRIER macro to prevent instruction re-ordering
\r
44 when GCC link time optimisation is used.
\r
45 + Introduced the portDONT_DISCARD macro to the ARMv8-M ports to try and
\r
46 prevent the secure side builds from removing symbols required by the
\r
47 non secure side build.
\r
48 + Introduced the portARCH_NAME to provide additional data to select semi-
\r
49 automated build environments.
\r
50 + Cortex-M33 and Cortex-M23 ports now correctly disable the MPU before
\r
51 updating the MPU registers.
\r
53 + Added Nuvoton NuMaker-PFM-M2351 ARM Cortex-M23 demo.
\r
54 + Added LPC55S69 ARM Cortex-M33 demo.
\r
55 + Added an STM32 dual core AMP stress test demo.
\r
58 Changes between FreeRTOS V10.1.1 and FreeRTOS V10.2.0 released February 25 2019:
\r
60 + Added GCC RISC-V MCU port with three separate demo applications.
\r
61 + Included pre-existing ARM Cortex-M33 (ARMv8-M) GCC/ARMclang and IAR ports
\r
62 with Keil simulator demo.
\r
63 + Update the method used to detect if a timer is active. Previously the
\r
64 timer was deemed to be inactive if it was not referenced from a list.
\r
65 However, when a timer is updated it is temporarily removed from, then
\r
66 re-added to a list, so now the timer's active status is stored separately.
\r
67 + Add vTimerSetReloadMode(), xTaskGetIdleRunTimeCounter(), and
\r
68 xTaskGetApplicationTaskTagFromISR() API functions.
\r
69 + Updated third party Xtensa port so it is MIT licensed.
\r
70 + Added configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H to the Renesas
\r
71 compiler RX600v2 port to enable switching between platform.h and
\r
72 iodefine.h includes within that port's port.c file.
\r
73 + Removed the 'FromISR' functions from the MPU ports as ISRs run privileged
\r
75 + Added uxTaskGetStackHighWaterMark2() function to enable the return type to
\r
76 be changed without breaking backward compatibility.
\r
77 uxTaskGetStackHighWaterMark() returns a UBaseType_t as always,
\r
78 uxTaskGetStackHighWaterMark2() returns configSTACK_DEPTH_TYPE to allow the
\r
79 user to determine the return type.
\r
80 + Fixed issues in memory protected ports related to different combinations
\r
81 of static memory only and dynamic memory only builds. As a result the
\r
82 definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE became more
\r
83 complex and was moved to FreeRTOS.h with a table explaining its definition.
\r
84 + Added a 'get task tag from ISR' function.
\r
85 + Change the method used to determine if a timer is active or not from just
\r
86 seeing if it is referenced from the active timer list to storing its
\r
87 active state explicitly. The change prevents the timer reporting that it
\r
88 is inactive while it is being moved from one list to another.
\r
89 + The pcName parameter passed into the task create functions can be NULL,
\r
90 previously a name had to be provided.
\r
91 + When using tickless idle, prvResetNextTaskUnblockTime() is now only called
\r
92 in xTaskRemoveFromEventList() if the scheduler is not suspended.
\r
93 + Introduced portHAS_STACK_OVERFLOW_CHECKING, which should be set to 1 for
\r
94 FreeRTOS ports that run on architectures that have stack limit registers.
\r
97 Changes between FreeRTOS V10.1.0 and FreeRTOS V10.1.1 released 7 September 2018
\r
99 + Reverted a few structure name changes that broke several kernel aware
\r
101 + Updated to the latest trace recorder code.
\r
102 + Fixed some formatting in the FreeRTOS+TCP TCP/IP stack code.
\r
103 + Reverted moving some variables from file to function scope as doing so
\r
104 broke debug scenarios that require the static qualifier to be removed.
\r
106 Changes between FreeRTOS V10.0.1 and FreeRTOS V10.1.0 released 22 August 2018
\r
108 FreeRTOS Kernel Changes:
\r
110 + Update lint checked MISRA compliance to use the latest MISRA standard, was
\r
111 previously using the original MISRA standard.
\r
112 + Updated all object handles (TaskHandle_t, QueueHandle_t, etc.) to be
\r
113 unique types instead of void pointers, improving type safety. (this was
\r
114 attempted some years back but had to be backed out due to bugs in some
\r
115 debuggers). Note this required the pvContainer member of a ListItem_t
\r
116 struct to be renamed - set configENABLE_BACKWARD_COMPATIBILITY to 1 if
\r
117 this causes an issue.
\r
118 + Added configUSE_POSIX_ERRNO to enable per task POSIX style errno
\r
119 functionality in a more user friendly way - previously the generic thread
\r
120 local storage feature was used for this purpose.
\r
121 + Added Xtensa port and demo application for the XCC compiler.
\r
122 + Changed the implementation of vPortEndScheduler() for the Win32 port to
\r
123 simply call exit( 0 ).
\r
124 + Bug fix in vPortEnableInterrupt() for the GCC Microblaze port to protect
\r
125 the read modify write access to an internal Microblaze register.
\r
126 + Fix minor niggles when the MPU is used with regards to prototype
\r
127 differences, static struct size differences, etc.
\r
128 + The usStackHighWaterMark member of the TaskStatus_t structure now has type
\r
129 configSTACK_DEPTH_TYPE in place of uint16_t - that change should have been
\r
130 made when the configSTACK_DEPTH_TYPE type (which gets around the previous
\r
131 16-bit limit on stack size specifications) was introduced.
\r
132 + Added the xMessageBufferNextLengthBytes() API function and likewise stream
\r
134 + Introduce configMESSAGE_BUFFER_LENGTH_TYPE to allow the number of bytes
\r
135 used to hold the length of a message in the message buffer to be reduced.
\r
136 configMESSAGE_BUFFER_LENGTH_TYPE default to size_t, but if, for example,
\r
137 messages can never be more than 255 bytes it could be set to uint8_t,
\r
138 saving 3 bytes each time a message is written into the message buffer
\r
139 (assuming sizeof( size_t ) is 4).
\r
140 + Updated the StaticTimer_t structure to ensure it matches the size of the
\r
141 Timer_t structure when the size of TaskFunction_t does not equal the size
\r
143 + Update various Xilinx demos to use 2018.1 version of the SDK tools.
\r
144 + Various updates to demo tasks to maintain test coverage.
\r
145 + FreeRTOS+UDP was removed in FreeRTOS V10.1.0 as it was replaced by
\r
146 FreeRTOS+TCP, which was brought into the main download in FreeRTOS
\r
147 V10.0.0. FreeRTOS+TCP can be configured as a UDP only stack, and
\r
148 FreeRTOS+UDP does not contain the patches applied to FreeRTOS+TCP.
\r
150 FreeRTOS+TCP Changes:
\r
152 + Multiple security improvements and fixes in packet parsing routines, DNS
\r
153 caching, and TCP sequence number and ID generation.
\r
154 + Disable NBNS and LLMNR by default.
\r
155 + Add TCP hang protection by default.
\r
157 We thank Ori Karliner of Zimperium zLabs Team for reporting these issues.
\r
160 Changes between FreeRTOS V10.0.0 and FreeRTOS V10.0.1, released December 20 2017
\r
162 + Fix position of "#if defined( __cplusplus )" in stream_buffer.h.
\r
163 + Correct declarations of MPU_xQueuePeek() and MPU_xQueueSemaphoreTake() in
\r
165 + Correct formatting in vTaskList() helper function when it prints the state
\r
166 of the currently executing task.
\r
167 + Introduce #error if stream_buffer.c is built without
\r
168 configUSE_TASK_NOTIFICATIONS set to 1.
\r
169 + Update FreeRTOS+TCP to V2.0.0
\r
170 - Improve the formatting of text that displays the available netword
\r
171 interfaces when FreeRTOS+TCP is used on Windows with WinPCap.
\r
172 - Introduce ipconfigSOCKET_HAS_USER_WAKE_CALLBACK option to enable a user
\r
173 definable callback to execute when data arrives on a socket.
\r
175 Changes between FreeRTOS V9.0.1 and FreeRTOS V10.0.0:
\r
177 The FreeRTOS kernel is now MIT licensed: https://www.FreeRTOS.org/license
\r
179 New Features and components:
\r
181 + Stream Buffers - see http://www.FreeRTOS.org/RTOS-stream-buffer-example.html
\r
182 + Message Buffers - see http://www.FreeRTOS.org//RTOS-message-buffer-example.html
\r
183 + Move FreeRTOS+TCP into the main repository, along with the basic Win32
\r
184 TCP demo FreeRTOS_Plus_TCP_Minimal_Windows_Simulator.
\r
186 New ports or demos:
\r
188 + Added demo for TI SimpleLink CC3220 MCU.
\r
189 + Added MPU and non MPU projects for Microchip CEC and MEC 17xx and 51xx
\r
191 + Added CORTEX_MPU_Static_Simulator_Keil_GCC demo to test static allocation
\r
194 Fixes or enhancements:
\r
196 + Cortex-M ports push additional register prior to calling
\r
197 vTaskSwitchContext to ensure 8-byte alignment is maintained. Only
\r
198 important if a user defined tick hook function performs an operation that
\r
199 requires 8-byte alignment.
\r
200 + Optimisations to the implementation of the standard tickless idle mode on
\r
202 + Improvements to the Win32 port including using higher priority threads.
\r
203 + Ensure interrupt stack alignment on PIC32 ports.
\r
204 + Updated GCC TriCore port to build with later compiler versions.
\r
205 + Update mpu_wrappers.c to support static allocation.
\r
206 + The uxNumberOfItems member of List_t is now volatile - solving an issue
\r
207 when the IAR compiler was used with maximum optimization.
\r
208 + Introduced configRECORD_STACK_HIGH_ADDRESS. When set to 1 the stack start
\r
209 address is saved into each task's TCB (assuming stack grows down).
\r
210 + Introduced configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H to allow user defined
\r
211 functionality, and user defined initialisation, to be added to FreeRTOS's
\r
212 tasks.c source file. When configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H is
\r
213 set to 1 a user provided header file called freertos_task_c_additions.h
\r
214 will be included at the bottom of tasks.c. Functions defined in that
\r
215 header file can call freertos_tasks_c_additions_init(), which in turn
\r
216 calls a macro called FREERTOS_TASKS_C_ADDITIONS_INIT(), if it is defined.
\r
217 FREERTOS_TASKS_C_ADDITIONS_INIT() can be defined in FreeRTOSConfig.h.
\r
218 + Introduced configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x ) which can be
\r
219 defined by a user in FreeRTOSConfig.h. The macro is called before
\r
220 assessing whether to enter tickless idle mode or not. If the macro sets
\r
221 x to zero then tickless idle mode will not be entered. This allows users
\r
222 to abort tickless idle mode entry before the tickless idle function is
\r
223 even called - previously it was only possible to abort from within the
\r
224 tickless idle function itself.
\r
225 + Added configPRINTF(), which can be defined by users to allow all libraries
\r
226 to use the same print formatter.
\r
227 + Introduced configMAX() and configMIN() macros which default to standard
\r
228 max( x, y ) and min( x, y ) macro behaviour, but can be overridden if the
\r
229 application writer defines the same macros in FreeRTOSConfig.h.
\r
230 + Corrected the definition of StaticTask_t in the case where
\r
231 INCLUDE_xTaskAbortDelay is set to 1.
\r
232 + Introduced configTIMER_SERVICE_TASK_NAME and configIDLE_TASK_NAME, both of
\r
233 which can be defined to strings in FreeRTOSConfig.h to change the default
\r
234 names of the timer service and idle tasks respectively.
\r
235 + Only fill the stack of a newly created task with a known value if stack
\r
236 checking, or high water mark checking/viewing, is in use - removing the
\r
237 dependency on memset() in other cases.
\r
238 + Introduced xTaskCreateRestrictedStatic() so static allocation can be used
\r
240 + Ensure suspended tasks cannot be unsuspended by a received task
\r
242 + Fix race condition in vTaskSetTimeOutState().
\r
243 + Updated trace recorder files to the latest version.
\r
245 Changes since FreeRTOS V9.0.0:
\r
247 + Priority dis-inheritance behaviour has been enhanced in the case where a
\r
248 task that attempted to take a mutex that was held by a lower priority task
\r
249 timed out before it was able to obtain the mutex (causing the task that
\r
250 holds the mutex to have its priority raised, then lowered again, in
\r
251 accordance with the priority inheritance protocol).
\r
252 + Split the overloaded xQueueGenericReceive() function into three separate
\r
253 dedicated functions.
\r
254 + Allow the default human readable text names given to the Idle and Timer
\r
255 tasks to be overridden by defining the configIDLE_TASK_NAME and
\r
256 configTIMER_SERVICE_TASK_NAME definitions respectively in FreeRTOSConfig.h.
\r
257 + Introduced configINITIAL_TICK_COUNT to allow the tick count to take a
\r
258 value of than than 0 when the system boots. This can be useful for
\r
259 testing purposes - although setting configUSE_16_BIT_TICKS to 1 can also
\r
260 be used to test frequent tick overflows.
\r
261 + Ensure the Cortex-M SysTick count is cleared to zero before starting the
\r
263 + Add configASSERT() into ARM Cortex-M ports to check the number of priority
\r
265 + Clear the 'control' register before starting ARM Cortex-M4F ports in case
\r
266 the FPU is used before the scheduler is started. This just saves a few
\r
267 bytes on the main stack as it prevents space being left for a later save
\r
269 + Added xSemaphoreGetMutexHolderFromISR().
\r
270 + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
\r
271 + Introduced configSTACK_DEPTH_TYPE to allow users to change the type used
\r
272 to specify the stack size when using xTaskCreate(). For historic reasons,
\r
273 when FreeRTOS was only used on small MCUs, the type was set to uint16_t,
\r
274 but that can be too restrictive when FreeRTOS is used on larger
\r
275 processors. configSTACK_DEPTH_TYPE defaults to uint16_t.
\r
276 xTaskCreateStatic(), being a newer function, used a uint32_t.
\r
277 + Increase the priority of the Windows threads used by the Win32 port. As
\r
278 all the threads run on the same core, and the threads run with very high
\r
279 priority, there is a risk that the host will become unresponsive, so also
\r
280 prevent the Windows port executing on single core hosts.
\r
282 Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:
\r
284 See http://www.FreeRTOS.org/FreeRTOS-V9.html
\r
286 RTOS kernel updates:
\r
288 + The prototype of the new xTaskCreateStatic() API function was modified to
\r
289 remove a parameter and improve compatibility with other new
\r
290 "CreateStatic()" API functions. The stack size parameter in
\r
291 xTaskCreateStatic() is now uint32_t, which changes the prototype of the
\r
292 callback functions. See the following URL:
\r
293 http://www.freertos.org/xTaskCreateStatic.html
\r
294 + GCC ARM Cortex-A port: Introduced the configUSE_TASK_FPU_SUPPORT
\r
295 constant. When configUSE_TASK_FPU_SUPPORT is set to 2 every task is
\r
296 automatically given a floating point (FPU) context.
\r
297 + GCC ARM Cortex-A port: It is now possible to automatically save and
\r
298 restore all floating point (FPU) registers on entry to each potentially
\r
299 nested interrupt by defining vApplicationFPUSafeIRQHandler() instead of
\r
300 vApplicationIRQHandler().
\r
301 + All ARM Cortex-M3/4F/7 ports: Clear the least significant bit of the task
\r
302 entry address placed onto the stack of a task when the task is created for
\r
303 strict compliance with the ARM Cortex-M3/4/7 architecture documentation
\r
304 (no noticeable effect unless using the QMEU emulator).
\r
305 + Added GCC and Keil ARM Cortex-M4F MPU ports - previously the MPU was only
\r
306 supported on ARM Cortex-M3.
\r
307 + ARM Cortex-M3/4F MPU ports: Update to fully support the FreeRTOS V9.0.0
\r
308 API (other than static object creation) and added the
\r
309 FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC demo application to
\r
310 demonstrate how to use the updated MPU port.
\r
311 + All ARM Cortex-M3/4F/7 ports: Add additional barrier instructions to the
\r
312 default low power tickless implementation.
\r
313 + All ARM Cortex-M0 ports: Prevent an item being left on the stack of the
\r
314 first task that executes.
\r
315 + Win32 ports: Reduce the amount of stack used and change the way Windows
\r
316 threads are deleted to increase the maximum execution time.
\r
317 + Add an ARM Cortex-M4F port for the MikroC compiler. Ensure to read the
\r
318 documentation page for this port before use.
\r
319 + MPS430X IAR port: Update to be compatible with the latest EW430 tools
\r
321 + IAR32 GCC port: Correct vPortExitCritical() when
\r
322 configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
\r
323 + For consistency vTaskGetTaskInfo() now has the alias vTaskGetInfo(),
\r
324 xTaskGetTaskHandle() now has the alias xTaskGetHandle() and
\r
325 pcQueueGetQueueName() now has an alias pcQueueGetName().
\r
326 + Fix various errors in comments and compiler warnings.
\r
328 Demo application updates:
\r
330 + Update Atmel Studio projects to use Atmel Studio 7.
\r
331 + Update Xilinx SDK projects to use the 2016.1 version of the SDK.
\r
332 + Remove dependency on legacy IO libraries from the PIC32 demos.
\r
333 + Move the Xilinx UltraScale Cortex-R5 demo into the main distribution.
\r
334 + Update the MSP432 libraries to the latest version.
\r
335 + Add Microchip CEC1302 (ARM Cortex-M4F) demos for GCC, Keil and MikroC
\r
337 + Move the Atmel SAMA5D2 demo into the main distribution.
\r
339 Changes between FreeRTOS V9.0.0rc1 and FreeRTOS V9.0.0rc2 (release candidate 2)
\r
340 released March 30 2016:
\r
342 NOTE - See http://www.FreeRTOS.org/FreeRTOS-V9.html for details
\r
344 + The functions that create RTOS objects using static memory allocation have
\r
345 been simplified and will not revert to using dynamic allocation if a
\r
346 buffer is passed into a function as NULL.
\r
347 + Introduced the configSUPPORT_DYNAMIC_ALLOCATION configuration constant to
\r
348 allow a FreeRTOS application to be built without a heap even being being
\r
349 defined. The Win32 example located in the
\r
350 /FreeRTOS/demo/WIN32-MSVC-Static-Allocation-Only directory is provided as
\r
351 a reference for projects that do not include a FreeRTOS heap.
\r
352 + Minor run-time optimisations.
\r
353 + Two new low power tickless implementations that target Silicon Labs EFM32
\r
355 + Addition of the xTimerGetPeriod() and xTimerGetExpireTime() API functions.
\r
357 Changes between FreeRTOS V8.2.3 and FreeRTOS V9.0.0rc1 (release candidate 1)
\r
358 released February 19 2016:
\r
360 RTOS Kernel Updates:
\r
362 + Major new feature - tasks, semaphores, queues, timers and event groups can
\r
363 now be created using statically allocated memory, so without any calls to
\r
365 + Major new features - Added the xTaskAbortDelay() API function which allows
\r
366 one task to force another task to immediately leave the Blocked state,
\r
367 even if the event the blocked task is waiting for has not occurred, or the
\r
368 blocked task's timeout has not expired.
\r
369 + Updates necessary to allow FreeRTOS to run on 64-bit architectures.
\r
370 + Added vApplicationDaemonTaskStartupHook() which executes when the RTOS
\r
371 daemon task (which used to be called the timer service task) starts
\r
372 running. This is useful if the application includes initialisation code
\r
373 that would benefit from executing after the scheduler has been started.
\r
374 + Added the xTaskGetTaskHandle() API function, which obtains a task handle
\r
375 from the task's name. xTaskGetTaskHandle() uses multiple string compare
\r
376 operations, so it is recommended that it is called only once per task.
\r
377 The handle returned by xTaskGetTaskHandle() can then be stored locally for
\r
379 + Added the pcQueueGetQueueName() API function, which obtains the name of
\r
380 a queue from the queue's handle.
\r
381 + Tickless idling (for low power applications) can now also be used when
\r
382 configUSE_PREEMPTION is 0.
\r
383 + If one task deletes another task, then the stack and TCB of the deleted
\r
384 task is now freed immediately. If a task deletes itself, then the stack
\r
385 and TCB of the deleted task are freed by the Idle task as before.
\r
386 + If a task notification is used to unblock a task from an ISR, but the
\r
387 xHigherPriorityTaskWoken parameter is not used, then pend a context switch
\r
388 that will then occur during the next tick interrupt.
\r
389 + Heap_1.c and Heap_2.c now use the configAPPLICATION_ALLOCATED_HEAP
\r
390 settings, which previously was only used by heap_4.c.
\r
391 configAPPLICATION_ALLOCATED_HEAP allows the application writer to declare
\r
392 the array that will be used as the FreeRTOS heap, and in-so-doing, place
\r
393 the heap at a specific memory location.
\r
394 + TaskStatus_t structures are used to obtain details of a task.
\r
395 TaskStatus_t now includes the bae address of the task's stack.
\r
396 + Added the vTaskGetTaskInfo() API function, which returns a TaskStatus_t
\r
397 structure that contains information about a single task. Previously this
\r
398 information could only be obtained for all the tasks at once, as an array
\r
399 of TaskStatus_t structures.
\r
400 + Added the uxSemaphoreGetCount() API function.
\r
401 + Replicate previous Cortex-M4F and Cortex-M7 optimisations in some
\r
402 Cortex-M3 port layers.
\r
404 Demo Application Updates:
\r
406 Further demo applications will be added prior to the final FreeRTOS V9
\r
409 + Updated SAM4L Atmel Studio project to use Atmel Studio 7.
\r
410 + Added ARM Cortex-A53 64-bit port.
\r
411 + Added a port and demo for the ARM Cortex-A53 64-bit cores on the Xilinx
\r
413 + Added Cortex-M7 SAME70 GCC demo.
\r
414 + Added EFM32 Giant and Wonder Gecko demos.
\r
417 Changes between V8.2.2 and V8.2.3 released October 16, 2015
\r
419 RTOS kernel updates:
\r
421 + Fix bug identified in a modification made in V8.2.2 to the software timer
\r
422 code that allows tickless low power applications to sleep indefinitely
\r
423 when software timers are used.
\r
424 + Simplify and improve efficiency of stack overflow checking.
\r
425 + Add xTaskNotifyStateClear() API function.
\r
426 + New IAR and GCC Cortex-R ports for microprocessors that do not use an ARM
\r
427 generic interrupt controller (GIC).
\r
428 + New PIC32MEC14xx port.
\r
429 + Add support for PIC32MZ EF parts (with floating point) into the PIC32MZ
\r
431 + Zynq7000 port layer now declares the functions that setup and clear the
\r
432 tick interrupt as weak symbols so they can be overridden by the
\r
433 application, and uses a global XScuGic object so the same object can be
\r
434 used by the application code.
\r
435 + Introduced configUSE_TASK_FPU_SUPPORT, although the PIC32MZ EF port is
\r
436 currently the only port that uses it.
\r
437 + Updates to RL78 and 78K0 IAR port layers to improve support for
\r
438 combinations of memory models.
\r
439 + Minor updates to heap_5.c to remove compiler warnings generated by some
\r
441 + License simplifications. See /FreeRTOS/License/license.txt in the
\r
442 official distribution.
\r
446 + Update directory names to use WolfSSL instead of CyaSSL, inline with
\r
447 WolfSSL's re-branding.
\r
448 + Update to latest WolfSSL code.
\r
449 + Update to latest FreeRTOS+Trace recorder code.
\r
450 + Add in the FreeRTOS+Trace recorder library required for streaming trace.
\r
452 Demo application changes:
\r
454 + Add demo applications for Renesas RZ/T (Cortex-R), PIC32MZ EF (PIC32 with
\r
455 floating point hardware), PIC32MEC14xx, RX71M, RX113 and RX231.
\r
456 + General tidy up of spelling and compiler warnings.
\r
459 Changes between V8.2.1 and V8.2.2 released August 12, 2015
\r
461 RTOS kernel updates:
\r
463 + Added Intel IA32/x86 32-bit port.
\r
464 + General maintenance.
\r
465 + PRIVILEGED_FUNCTION and PRIVILEGED_DATA macros, which are used in memory
\r
466 protected systems, have been added to the newer event group and software
\r
468 + Add the errno definitions used by FreeRTOS+ components into projdefs.h.
\r
469 + Remove the restriction that prevented tick-less idle implementations
\r
470 waiting indefinitely when software timers were used in the same
\r
472 + Introduce xTaskNotifyAndQueryFromISR() as the interrupt safe version of
\r
473 xTaskNotifyAndQuery().
\r
474 + Add additional NOPs to the MSP430X port layers to ensure strict compliance
\r
475 with the hardware documentation.
\r
476 + Microblaze port: Added option for port optimised task selection.
\r
477 + Microblaze port: Previously tasks inherited the exception enable state
\r
478 at the time the task was created. Now all tasks are created with
\r
479 exceptions enabled if the Microblaze design supports exceptions.
\r
480 + Windows port: Add additional safe guards to ensure the correct start up
\r
481 sequence and thread switching timing.
\r
482 + Windows port: Improve the implementation of the port optimised task
\r
483 selection assembly code.
\r
484 + Update heap_4 and heap_5 to allow use on 64-bit processors.
\r
485 + Simplify the code that creates a queue.
\r
486 + General improved tick-less idle behaviour.
\r
487 + Ensure none of the variables in the common kernel files are initialised to
\r
488 anything other than zero.
\r
489 + Correct calculation of xHeapStructSize in heap_4 and heap_5.
\r
491 Demo application updates:
\r
493 + Added demo project for the new IA32/x86 port that targets the Galileo
\r
495 + Added MSP430FR5969 demos (previously provided as a separate download).
\r
496 + Added FreeRTOS BSP repository for automatic creation of FreeRTOS
\r
497 applications in the Xilinx SDK.
\r
498 + Added Atmel Studio / GCC project for the SAMV71 (ARM Cortex-M7)
\r
499 + Update Xilinx SDK projects to use version 2015.2 of the SDK.
\r
500 + Remove Microblaze demos that were using obsolete tools.
\r
501 + Add MSP43FR5969 IAR and CCS demos.
\r
505 + Updated FreeRTOS+Trace recorder library, which requires an update to the
\r
506 FreeRTOS+Trace application.
\r
507 + Added Reliance Edge source code and demo application. Reliance edge is
\r
508 a fail safe transactional file system ideal for applications that require
\r
509 file storage, and especially when high reliability is essential.
\r
510 + Introduce configAPPLICATION_PROVIDES_cOutputBuffer to allow FreeRTOS+CLI
\r
511 users to place the output buffer at a fixed memory address.
\r
512 + Improve the NetworkInterface.c file provided for the Windows port of
\r
515 Changes between V8.2.0 and V8.2.1 released 24th March 2015.
\r
517 RTOS kernel updates:
\r
519 + Added user definable and flexible thread local storage facility.
\r
520 + Added vTimerSetTimerID() API function to complement the pvTimerGetTimerID()
\r
521 function to allow the timer's ID to be used as timer local storage.
\r
522 + Fixed a potential issue related to the use of queue sets from an ISR.
\r
523 + Some updates to the Xilinx Microblaze GCC port.
\r
524 + Added ARM Cortex-M4F port for Texas Instruments Code Composer Studio.
\r
525 + Added ARM Cortex-M7 r0p1 port layer for IAR, GCC and Keil which contains a
\r
526 minor errata work around. All other ARM Cortex-M7 core revisions should
\r
527 use the ARM Cortex-M4F port.
\r
528 + Exclude the whole of croutine.c if configUSE_CO_ROUTINES is set to 0.
\r
529 + Change some data types from uint32_t to size_t in preparation for 64-bit
\r
531 + Update the PIC32 port to remove deprecation warnings output by the latest
\r
533 + Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to
\r
534 overwrite items in two queues that are part of the same set.
\r
536 Demo application updates:
\r
538 + Added demo application for TI's ARM Cortex-M4F based MSP432
\r
539 microcontroller using IAR, Keil and CCS compilers.
\r
540 + Added demo application for STM32F ARM Cortex-M7 based microcontroller
\r
541 using IAR and Keil.
\r
542 + Added demo application for Atmel SAMV71 ARM Cortex-M7 based
\r
543 microcontroller using IAR and Keil.
\r
544 + Added Microblaze demo that uses the 2014.4 version of the Xilinx SDK and
\r
545 runs on the KC705 evaluation board (Kintex FPGA).
\r
547 Changes between V8.1.2 and V8.2.0 released 16th January 2015
\r
549 Changes between release candidate 1 and the official release are restricted
\r
550 to maintenance only.
\r
552 Significant RTOS kernel updates:
\r
554 + MAJOR NEW FEATURE! Task notifications. Please see the following URL for
\r
555 details: http://www.FreeRTOS.org/RTOS-task-notifications.html
\r
556 + NEW HEADER FILE REQUIRED! Obsolete definitions have been separated into
\r
557 a new header file called FreeRTOS/Source/include/deprecated_definitions.h.
\r
558 This header file must be present to build. Note some of the obsolete
\r
559 definitions are still used by very old demo application projects.
\r
561 Other RTOS kernel updates:
\r
563 + Made xSemaphoreGiveFromISR() a function rather than a macro that calls
\r
564 xQueueGenericSendFromISR(). This allows for major performance
\r
565 enhancements at the expense of some additional code size if both functions
\r
566 are used in the same application. NOTE: In most uses cases such use of
\r
567 a semaphore can now be replaced with a task notification which is smaller
\r
569 + The TCB is now always allocated such that the task's stack grows away from
\r
570 the TCB (improves debugging of stack overflows as the overflow will not
\r
571 overwrite the task's name).
\r
572 + GCC, IAR and Keil Cortex-M4F ports now use more inlining (performance
\r
573 enhancements at the cost of a little additional code space).
\r
574 + Queues are now allocated with a single call to pvPortMalloc() which
\r
575 allocates both the queue structure and the queue storage area.
\r
576 + Introduced a new critical section macro for reading the tick count that
\r
577 defines away to nothing in cases where the width of the tick allows the
\r
578 tick count to be read atomically (performance benefits - especially when
\r
579 optimisation is on).
\r
580 + Introduced configAPPLICATION_ALLOCATED_HEAP in heap_4.c to allow the
\r
581 application writer to provide their own heap array - and in so doing
\r
582 control the location of the heap.
\r
583 + Introduced configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES which, when set, will
\r
584 include known values in both list and list item structures. The values
\r
585 are intended to assist debugging. If the values get overwritten then it
\r
586 is likely application code has written over RAM used by the kernel.
\r
587 + configASSERT()s in all Cortex-M ports used to test the lowest 5 bits of
\r
588 the interrupt control register to detect taskENTER_CRITICAL() being called
\r
589 from an interrupt. This has been changed to test all 8 bits.
\r
590 + Introduced uxTaskPriorityGetFromISR().
\r
591 + Microblze V8 port now tests XPAR_MICROBLAZE_0_USE_FPU for inequality to 0
\r
592 rather than equality to 1, and 2 and 3 are also valid values.
\r
593 + Cortex-A5 GIC-less port no longer passes the address of the interrupting
\r
594 peripheral into the interrupt handler.
\r
595 + Fix an issue in FreeRTOS-MPU where an attempt was made to free the stack
\r
596 belonging to a task when the task was deleted, even when the stack was
\r
597 allocated statically.
\r
598 + Utility (helper) functions that format task statistic information into
\r
599 human readable tables now pad task names with spaces to ensure columns
\r
600 line up correctly even where task name lengths vary greatly.
\r
601 + Update FreeRTOS+Trace recorder library to version 2.7.0.
\r
603 Demo application updates:
\r
605 + Added two new standard demo task sets: IntSemTest and TaskNotify.
\r
606 + Added port and demo application for Atmel SAMA5D4 Cortex-A5 MPU.
\r
607 + Added demo application for Altera Cyclone V Cortex-A9 MPU.
\r
608 + Updated Zynq demo to use version 2014.4 of Xilinx's SDK and added in
\r
609 demo tasks for new RTOS features.
\r
610 + Updated Atmel SAM4E and SAM4S demos to include a lot of additional test
\r
612 + Fixed a corner case issue in Atmel SAM4L low power tickless
\r
613 implementation, and added button interrupt handling.
\r
614 + Make the interrupt queue tests more tolerant to heave CPU loads.
\r
615 + Updated MSVC FreeRTOS simulator demo to include the latest standard test
\r
617 + Updated MingW/Eclipse FreeRTOS simulator demo to match the FreeRTOS MSVC
\r
619 + Updated all demos that use FreeRTOS+Trace to work with the latest trace
\r
623 Changes between V8.1.1 and V8.1.2 released September 2nd 2014
\r
625 Move the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into the
\r
626 individual port layers where necessary so it does not affect ports that do
\r
627 not support the definition.
\r
629 Changes between V8.1.0 and V8.1.1 released August 29th 2014
\r
631 By popular requests - a minor patch to V8.1.0 to re-instate the ability to
\r
632 give a mutex type semaphore (with priority inheritance) from an interrupt
\r
635 Changes between V8.0.1 and V8.1.0 released August 26th 2014
\r
637 FreeRTOS scheduler, kernel, demo and test updates:
\r
639 + Improved the priority inheritance algorithms to assist integration with
\r
640 off the shelf middleware that may hold multiple mutexes simultaneously.
\r
641 + Introduce heap_5.c, which is similar to heap_4.c but allows the heap to
\r
642 span multiple non-contiguous memory regions.
\r
643 + Updated all Cortex-A9 ports to help trap a couple of common usage errors -
\r
644 the first being when a task incorrectly attempts to exit its implementing
\r
645 function and the second being when a non interrupt safe API function is
\r
646 called from an interrupt.
\r
647 + Update all Cortex-A9 ports to remove obsolete mode switches prior to
\r
648 restoring a task context.
\r
649 + configUSE_PORT_OPTIMISED_TASK_SELECTION now defaults to 1 instead of 0.
\r
650 + Update all Cortex-M3/4F ports to trap a non interrupt safe API function
\r
651 being called from an interrupt handler.
\r
652 + Simplify the alignment checks in heap_4.c.
\r
653 + Update the MSVC Windows simulator demo to use heap_5.c in place of
\r
654 heap_4.c to ensure end users have an example to refer to.
\r
655 + Updated standard demo test code to test the new priority inheritance
\r
657 + Updated the standard demo tasks to make use of stdint and the FreeRTOS
\r
658 specific typedefs that were introduced in FreeRTOS V8.0.0.
\r
659 + Introduce the pdMS_TO_TICKS() macro as a more user friendly and intuitive
\r
660 alternative to pdTICKS_PER_MS - both of which can be used to convert a
\r
661 time specified in milliseconds to a time specified in RTOS ticks.
\r
662 + Fix a bug in the Tasking compiler's Cortex-M port that resulted in an
\r
663 incorrect value being written to the basepri register. This only effects
\r
664 users of the Tasking compiler.
\r
665 + Update the Zynq demo to use version 2014.2 of the SDK and add in an lwIP
\r
666 example that demonstrates lwIP being used with both its raw and sockets
\r
668 + Updated the CCS Cortex-R4 port to enable it to be built with the latest
\r
671 New ports and demo applications:
\r
673 + Two Renesas RX64M ports (RXv2 core) and demos introduced, one for the GCC
\r
674 compiler and one for the Renesas compiler. Both demos use e2 studio.
\r
675 + Generic IAR Cortex-A5 port (without any reliance on a GIC) introduced.
\r
676 The new port is demonstrated on an Atmel SAMA5D3 XPlained board.
\r
678 FreeRTOS+ component updates:
\r
680 + Update CyaSSL to the latest version.
\r
681 + Updated the FreeRTOS+ components supplied directly by Real Time Engineers
\r
682 Ltd. to make use of stdint and the FreeRTOS specific typedefs that were
\r
683 introduced in FreeRTOS V8.0.0.
\r
684 + Rework and simplify the FreeRTOS+FAT SL RAM disk driver.
\r
686 Miscellaneous updates and maintenance:
\r
688 + Update the IAR and DS-5/ARM RZ demos to target the official RZ RSK
\r
689 hardware in place of the previously targeted Renesas internal (not
\r
690 publicly available) hardware.
\r
691 + Various other maintenance tasks.
\r
694 Changes between V8.0.0 and V8.0.1 released 2nd May 2014
\r
696 + Minor fixes to the event group functionality that was released in V8.0.0.
\r
697 The 'clear bits from ISR' functionality is now implemented using a
\r
698 deferred interrupt callback instead of a function, and the 'wait bits' and
\r
699 'task sync' functions now correctly clear internal control bits before
\r
700 returning a value in every possible path through the respective functions.
\r
701 + Ensure the updating of internal control data is protected by a critical
\r
702 section after a task is deleted or suspended.
\r
703 + Minor fixes to FreeRTOS+FAT SL - namely seeking beyond the end of a file
\r
704 when the offset was not a multiple of the sector size.
\r
705 + Ensure Cortex-A9 system registers are only ever accessed as 32-bit values,
\r
706 even when only the lest significant byte of the register is implemented.
\r
710 + Updated the XMC4200 IAR project so it links with version 7.x of the IAR
\r
712 + Add RL78L1C demo.
\r
713 + Add pcTimerGetName() API function.
\r
714 + Call _reclaim_reent() when a task is deleted if configUSE_NEWLIB_REENTRANT
\r
717 Changes between V7.6.0 and V8.0.0 released 19th Feb 2014
\r
719 http://www.freertos.org/upgrading-to-FreeRTOS-V8.html
\r
721 FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x,
\r
722 although a change to the type used to reference character strings may result
\r
723 in application code generating a few (easily clearable) compiler warnings
\r
724 after the upgrade, and an updated typedef naming convention means use of the
\r
725 old typedef names is now discouraged.
\r
726 See http://www.freertos.org/upgrading-to-FreeRTOS-V8.html for full
\r
729 New features and functionality:
\r
731 + Event groups - see http://www.freertos.org/FreeRTOS-Event-Groups.html
\r
732 + Centralised deferred interrupt processing - see
\r
733 http://www.freertos.org/xTimerPendFunctionCallFromISR.html
\r
737 + Previously, when a task left the Blocked state, a context switch was
\r
738 performed if the priority of the unblocked task was greater than or equal
\r
739 to the priority of the Running task. Now a context switch is only
\r
740 performed if the priority of the unblocked task is greater than the
\r
741 priority of the Running task.
\r
742 + New low power tickless demonstration project that targets the ST STM32L
\r
743 microcontroller - see
\r
744 http://www.freertos.org/STM32L-discovery-low-power-tickless-RTOS-demo.html
\r
745 + Add xPortGetMinimumEverFreeHeapSize() to heap_4.c.
\r
746 + Small change to the tickless low power implementation on the SAM4L to
\r
747 ensure the alarm value (compare match value) cannot be set to zero when a
\r
748 tickless period is exited due to an interrupt originating from a source
\r
749 other than the RTOS tick.
\r
750 + Update the GCC/Eclipse Win32 simulator demo to make better use of Eclipse
\r
751 resource filters and match the functionality of the MSVC equivalent.
\r
752 + xTaskIsTaskSuspended() is no longer a public function. Use
\r
753 eTaskGetState() in its place.
\r
754 + Improved trace macros, including tracing of heap usage.
\r
755 + Remove one level of indirection when accepting interrupts on the PIC32MZ.
\r
756 + Add Cortex-A9 GCC port layer.
\r
757 + Add Xilinx Zynq demo application.
\r
760 Changes between V7.5.3 and V7.6.0 released 18th November 2013
\r
762 V7.6.0 changes some behaviour when the co-operative scheduler is used (when
\r
763 configUSE_PREEMPTION is set to 0). It is important to note that the
\r
764 behaviour of the pre-emptive scheduler is unchanged - the following
\r
765 description only applies when configUSE_PREEMPTION is set to 0:
\r
767 WHEN configUSE_PREEMPTION IS SET TO 0 (which is in a small minority of
\r
768 cases) a context switch will now only occur when a task places itself into
\r
769 the Blocked state, or explicitly calls taskYIELD(). This differs from
\r
770 previous versions, where a context switch would also occur when implicitly
\r
771 moving a higher priority task out of the Blocked state. For example,
\r
772 previously, WHEN PREEMPTION WAS TURNED OFF, if task A unblocks task B by
\r
773 writing to a queue, then the scheduler would switch to the higher priority
\r
774 task. Now, WHEN PREEMPTION IS TURNED OFF, if task A unblocks task B by
\r
775 writing to a queue, task B will not start running until task A enters the
\r
776 Blocked state or task A calls taskYIELD(). [If configUSE_PREEMPTION is not
\r
777 set to 0, so the normal pre-emptive scheduler is being used, then task B
\r
778 will start running immediately that it is moved out of the Blocked state].
\r
782 + Added a port layer and a demo project for the new PIC32MZ architecture.
\r
783 + Update the PIC32MX port layer to re-introduce some ehb instructions that
\r
784 were previously removed, add the ability to catch interrupt stack
\r
785 overflows (previously only task stack overflows were trapped), and also
\r
786 add the ability to catch an application task incorrectly attempting to
\r
787 return from its implementing function.
\r
788 + Make dramatic improvements to the performance of the Win32 simulator port
\r
790 + Ensure tasks that are blocked indefinitely report their state as Blocked
\r
791 instead of Suspended.
\r
792 + Slight improvement to the Cortex-M4F port layers where previously one
\r
793 register was inadvertently being saved twice.
\r
794 + Introduce the xSemaphoreCreateBinary() API function to ensure consistency
\r
795 in the semantics of how each semaphore type is created. It is no longer
\r
796 recommended to use vSemaphoreCreateBinary() (the version prefixed with a
\r
797 'v'), although it will remain in the code for backward compatibility.
\r
798 + Update the Cortex-M0 port layers to allow the scheduler to be started
\r
799 without using the SVC handler.
\r
800 + Added a build configuration to the PIC32MX MPLAB X demo project that
\r
801 targets the PIC32 USB II starter kit. Previously all the build
\r
802 configurations required the Explorer 16 hardware.
\r
803 + Some of the standard demo tasks have been updated to ensure they execute
\r
804 correctly with the updated co-operative scheduling behaviour.
\r
805 + Added comprehensive demo for the Atmel SAM4E, including use of
\r
806 FreeRTOS+UDP, FreeRTOS+FAT SL and FreeRTOS+CLI.
\r
810 + Minor maintenance on FreeRTOS+UDP.
\r
812 Changes between V7.5.2 and V7.5.3 released October 14 2013
\r
816 + Prior to V7.5.x yields requested from the tick hook would occur in the
\r
817 same tick interrupt - revert to that original behaviour.
\r
818 + New API function uxQueueSpacesAvailable().
\r
819 + Introduced the prvTaskExitError() function to Cortex-M0, Cortex-M3/4
\r
820 and Cortex-M4F ports. prvTaskExitError() is used to trap tasks that
\r
821 attempt to return from their implementing functions (tasks should call
\r
822 vTaskDelete( NULL ); if they want to exit).
\r
823 + The Cortex-M0 version of portSET_INTERRUPT_MASK_FROM_ISR and
\r
824 portCLEAR_INTERRUPT_MASK_FROM_ISR are now fully nestable.
\r
825 + Improved behaviour and robustness of the default Cortex-M tickless idle
\r
827 + Add workaround for silicon errata PMU_CM001 in Infineon XMC4000 devices to
\r
828 all Cortex-M4F ports.
\r
829 + Add Cortex-M0 port for Keil.
\r
830 + Updated Cortus port.
\r
831 + Ensure _impure_ptr is initialised before the scheduler is started.
\r
832 Previously it was not set until the first context switch.
\r
836 + Update FreeRTOS+UDP to V1.0.1 - including direct integration of the
\r
837 FreeRTOS+Nabto task, improvements to the DHCP behaviour, and a correction
\r
838 to the test that prevents the network event hook being called on the first
\r
839 network down event. The FreeRTOS+UDP change history is maintained
\r
841 + Correct the __NVIC_PRIO_BITS setting in the LPC18xx.h header files
\r
842 provided in the NXP CMSIS library, then update the interrupts used by the
\r
843 LPC18xx demos accordingly.
\r
844 + Replace double quotes (") with single quotes (') in FreeRTOS+CLI help
\r
845 strings to ensure the strings can be used with the JSON descriptions used
\r
846 in the FreeRTOS+Nabto demos.
\r
848 Demo and miscellaneous changes:
\r
850 + Added demo for the Atmel SAMD20 Cortex-M0+. The demo includes
\r
852 + Added a demo for the Infineon Cortex-M0 that can be built with the IAR
\r
853 Keil and GCC tools.
\r
854 + Updated the Infineon XMC4000 demos for IAR, Keil, GCC and Tasking tools,
\r
855 with additional build configurations to directly support the XMC4200 and
\r
856 XMC4400 devices, in addition to the previously supported XMC4500.
\r
857 + Updated the demo application.
\r
858 + Added additional trace macros traceMALLOC and traceFREE to track heap
\r
861 Changes between V7.5.0 and V7.5.2 released July 24 2013
\r
863 V7.5.2 makes the new Cortex-M vPortCheckInterruptPriority() function
\r
864 compatible with the STM32 standard peripheral driver library, and adds
\r
865 an extra critical section to the default low power tickless mode
\r
866 implementation. Only users of the STM32 peripheral library or the default
\r
867 tickless implementation need update from version 7.5.0.
\r
869 Changes between V7.4.2 and V7.5.0 released July 19 2013
\r
871 V7.5.0 is a major upgrade that includes multiple scheduling and efficiency
\r
872 improvements, and some new API functions.
\r
874 Compatibility information for FreeRTOS users:
\r
875 FreeRTOS V7.5.0 is backward compatible with FreeRTOS V7.4.0 with one
\r
876 exception; the vTaskList() and vTaskGetRunTimeStats() functions are now
\r
877 considered legacy, having been replaced by the single uxTaskGetSystemState()
\r
878 function. configUSE_STATS_FORMATTING_FUNCTIONS must be set to 1 in
\r
879 FreeRTOSConfig.h for vTaskList() and vTaskGetRunTimeStats() to be
\r
882 Compatibility information for FreeRTOS port writers:
\r
883 vTaskIncrementTick() is now called xTaskIncrementTick() (because it now
\r
888 + Multiple scheduling and efficiency improvements.
\r
889 + Core kernel files now pass PC-Lint V8 static checking without outputting
\r
890 any warnings (information on the test conditions will follow).
\r
894 + uxTaskGetSystemState() http://www.freertos.org/uxTaskGetSystemState.html
\r
895 + xQueueOverwrite() http://www.freertos.org/xQueueOverwrite.html
\r
896 + xQueueOverwriteFromISR()
\r
897 + xQueuePeekFromISR()
\r
899 The following ports and demos, which were previously available separately,
\r
900 are now incorporated into the main FreeRTOS zip file download:
\r
902 + ARM Cortex-A9 IAR
\r
903 + ARM Cortex-A9 ARM compiler
\r
905 + Microsemi SmartFusion2
\r
907 New FreeRTOSConfig.h settings
\r
908 http://shop.freertos.org/FreeRTOS_API_and_Configuration_Reference_s/1822.htm
\r
910 + configUSE_TIME_SLICING
\r
911 + configUSE_NEWLIB_REENTRANT
\r
912 + configUSE_STATS_FORMATTING_FUNCTIONS
\r
913 + configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
\r
917 + (MPU port only) The configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
\r
918 options provides a mechanism that allows application writers to execute
\r
919 certain functions in privileged mode even when a task is running in user
\r
921 + Ports that support interrupt nesting now include a configASSERT() that
\r
922 will trigger if an interrupt safe FreeRTOS function is called from an
\r
923 interrupt that has a priority designated as above the maximum system/API
\r
924 call interrupt priority.
\r
925 + The included FreeRTOS+Trace recorder code has been updated to the latest
\r
926 version, and the demo applications that use the trace recorder code have
\r
927 been updated accordingly.
\r
928 + The FreeRTOS Windows Simulator (MSVC version only) has been updated to
\r
929 include a new basic 'blinky' build option in addition to the original
\r
930 comprehensive build option.
\r
931 + Improve RAM usage efficiency of heap_4.c and heap_2.c.
\r
932 + Prevent heap_4.c from attempting to free memory blocks that were not
\r
933 allocated by heap_4.c, or have already been freed.
\r
934 + As FreeRTOS now comes with FreeRTOS+FAT SL (donated by HCC) the Chan FATfs
\r
935 files have been removed from FreeRTOS/Demo/Common.
\r
936 + Fix build error when R4 port is build in co-operative mode.
\r
937 + Multiple port and demo application maintenance activities.
\r
939 Changes between V7.4.1 and V7.4.2 released May 1 2013
\r
941 NOTE: There are no changes in the FreeRTOS kernel between V7.4.1 and V7.4.2
\r
943 + Added FreeRTOS+FAT SL source code and demo project. The demo project
\r
944 runs in the FreeRTOS Windows simulator for easy and hardware independent
\r
945 experimentation and evaluation. See http://www.FreeRTOS.org/fat_sl
\r
947 Changes between V7.4.0 and V7.4.1 released April 18 2013
\r
949 + To ensure strict conformance with the spec and ensure compatibility with
\r
950 future chips data and instruction barrier instructions have been added to
\r
951 the yield macros of Cortex-M and Cortex-R port layers. For efficiency
\r
952 the Cortex-M port layer "yield" and "yield" from ISR are now implemented
\r
953 separately as the barrier instructions are not required in the ISR case.
\r
954 + Added FreeRTOS+UDP into main download.
\r
955 + Reorganised the FreeRTOS+ directory so it now matches the FreeRTOS
\r
956 directory with Source and Demo subdirectories.
\r
957 + Implemented the Berkeley sockets select() function in FreeRTOS+UDP.
\r
958 + Changed (unsigned) casting in calls to standard library functions with
\r
960 + Added the Atmel SAM4L and Renesas RX100 demos that demonstrates the
\r
961 tickless (tick suppression) low power FreeRTOS features.
\r
962 + Add a new RL78 IAR demo that targets numerous new RL78 chips and
\r
964 + Adjusted stack alignment on RX200 ports to ensure an assert was not
\r
965 falsely triggered when configASSERT() is defined.
\r
966 + Updated the Cortex_M4F_Infineon_XMC4500_IAR demo to build with the latest
\r
968 + Corrected header comments in the het.c and het.h files (RM48/TMS570 demo).
\r
971 Changes between V7.3.0 and V7.4.0 released February 20 2013
\r
973 + New feature: Queue sets. See:
\r
974 http://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html
\r
975 + Overhauled the default tickless idle mode implementation provided with the
\r
976 ARM Cortex-M3 port layers.
\r
977 + Enhanced tickless support in the core kernel code with the introduction of
\r
978 the configEXPECTED_IDLE_TIME_BEFORE_SLEEP macro and the
\r
979 eTaskConfirmSleepModeStatus() function.
\r
980 + Added the QueueSet.c common demo/test file. Several demo applications
\r
981 have been updated to use the new demo/test tasks.
\r
982 + Removed reliance on the PLIB libraries from the MPLAB PIC32 port layer and
\r
984 + Added the FreeRTOS+Trace recorder code to the MSVC Win32 demo.
\r
985 + Renamed eTaskStateGet() to eTaskGetState() for consistency, and added a
\r
986 pre-processor macro for backward compatibility with the previous name.
\r
987 + Updated functions implemented in the core queue.c source file to allow
\r
988 queue.h to be included from the .c file directly (this prevents compiler
\r
989 warnings that were generated by some compilers).
\r
990 + Updated the CCS Cortex-R4 port layer to replace the CLZ assembler function
\r
991 with the CLZ compiler intrinsic that is provided by the latest versions of
\r
992 the CCS ARM compiler.
\r
993 + Updated all heap_x.c implementations to replace the structure that was
\r
994 used to ensure the start of the heap was aligned with a more portable
\r
995 direct C code implementation.
\r
996 + Added support for PIC24 devices that include EDS.
\r
997 + Minor optimisations to the PIC32 port layer.
\r
998 + Minor changes to tasks.c that allow the state viewer plug-ins to display
\r
999 additional information.
\r
1000 + Bug fix: Update prvProcessReceivedCommands() in timers.c to remove an
\r
1001 issue that could occur if the priority of the timer daemon task was set
\r
1002 below the priority of tasks that used timer services.
\r
1003 + Update the FreeRTOS+Trace recorder code to the latest version.
\r
1005 Changes between V7.2.0 and V7.3.0 released October 31 2012
\r
1007 + Added ability to override the default scheduler task selection mechanism
\r
1008 with implementations that make use of architecture specific instructions.
\r
1009 + Added ability to suppress tick interrupts during idle time, and in so
\r
1010 doing, provide the ability to make use of architecture specific low power
\r
1012 + Added the portSUPPRESS_TICKS_AND_SLEEP() macro and vTaskStepTick() helper
\r
1014 + Added the configSYSTICK_CLOCK_HZ configuration constant.
\r
1015 + Reworked the Cortex-M3 and Cortex-M4F port layers for GCC, Keil and IAR to
\r
1016 directly support basic power saving functionality.
\r
1017 + Added hooks to allow basic power saving to be augmented in the application
\r
1018 by making use of chip specific functionality.
\r
1019 + Minor change to allow mutex type semaphores to be used from interrupts
\r
1020 (which would not be a normal usage model for a mutex).
\r
1021 + Change the behaviour of the interrupt safe interrupt mask save and restore
\r
1022 macros in the Cortex-M ports. The save macro now returns the previous
\r
1023 mask value. The restore macro now uses the previous mask value. These
\r
1024 changes are not necessary for the kernel's own implementation, and are
\r
1025 made purely because the macros were being used by application writers.
\r
1026 + Added eTaskStateGet() API function.
\r
1027 + Added port specific optimisations to the PIC32 port layer, and updated the
\r
1028 PIC32 demo applications to make use of this new feature.
\r
1029 + Added port specific optimisations to the Win32 simulator port.
\r
1030 + Added new ports and demo applications for the TI Hercules RM48 and TMS570
\r
1031 safety microcontrollers.
\r
1032 + Added SAM3 demos targeting the ATSAM3S-EK2 and ATSAM3X-EK evaluation
\r
1034 + Updated the PIC32 MPLAB X project to manually set the compiler include
\r
1035 paths instead of using the IDE entry box following reports that the
\r
1036 include paths were somehow being deleted.
\r
1037 + Improved character handling in FreeRTOS+CLI.
\r
1039 Changes between V7.1.1 and V7.2.0 released 14 August 2012
\r
1041 FreeRTOS V7.2.0 is backward compatible with FreeRTOS V7.1.2.
\r
1043 + Added a FreeRTOS+ sub-directory. The directory contains some FreeRTOS+
\r
1044 source code, and example projects that use the FreeRTOS Win32 simulator.
\r
1045 + Added a new example heap allocation implementation (heap_4.c) that
\r
1046 includes memory block coalescence.
\r
1047 + Added a demo that targets the Atmel SAM4S Cortex-M4 based microcontroller.
\r
1048 The demo is preconfigured to build using the free Atmel Studio 6 IDE and
\r
1050 + Added xSemaphoreTakeFromISR() implementation.
\r
1051 + The last parameter in ISR safe FreeRTOS queue and semaphore functions
\r
1052 (xHigherPriorityTaskWoken) is now optional and can be set to NULL if it
\r
1054 + Update the IAR and MSP430X ports to clear all lower power mode bits before
\r
1055 exiting the tick interrupt [bug fix].
\r
1056 + Allow xQueueReset() to be used, even when the queues event lists are not
\r
1058 + Added a vQueueDelete() handler for the FreeRTOS MPU port (this was
\r
1059 previously missing).
\r
1060 + Updated the vPortSVCHandler() functions in the FreeRTOS MPU port layer to
\r
1061 ensure it compiles with the latest ARM GCC compilers from Linaro.
\r
1062 + Updated the prvReadGP() function in the NIOS II port to ensure the compiler
\r
1063 can choose any register for the functions parameter (required at high
\r
1064 compiler optimisation levels).
\r
1065 + Add #error macros into the Keil and IAR Cortex-M ports to ensure they
\r
1066 cannot be built if the user has set configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
1068 + Added comments in the FreeRTOSConfig.h files associated with Cortex-M3 and
\r
1069 Cortex-M4 demos stating that the configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
1070 parameter must not be set to 0.
\r
1071 + Introduce new INCLUDE_xQueueGetMutexHolder configuration constant
\r
1073 + Added two new list handling macros - for internal use only in upcoming new
\r
1075 + Removed all mention of the legacy vTaskStartTrace and ulTaskEndTrace
\r
1076 macros. FreeRTOS+Trace supersedes the legacy trace.
\r
1077 + Added a configASSERT() into the vPortFree() function in heap_1.c as it is
\r
1078 invalid for the function to be called.
\r
1079 + Made the xRxLock and xTxLock members of the queue structure volatile.
\r
1080 This is probably not necessary, and is included as a precautionary
\r
1082 + Modify the assert() that checks to see if the priority passed into an
\r
1083 xTaskCreate() function is within valid bounds to permit the assert to be
\r
1084 used in the FreeRTOS MPU port.
\r
1085 + The software timer service (daemon) task is now created in a way that
\r
1086 to ensure compatibility with FreeRTOS MPU.
\r
1088 Changes between V7.1.0 and V7.1.1 released May 1 2012
\r
1092 The following ports are brand new:
\r
1093 + Cortex-M3 Tasking
\r
1095 The following ports have been available as separate downloads for a number
\r
1096 of months, but are now included in the main FreeRTOS download.
\r
1099 + Cortex-M4F GCC (with full floating point support)
\r
1104 The following demos are brand new:
\r
1105 + Renesas RX63N RDK (Renesas compiler)
\r
1107 The following demos have been available as separate downloads for a number
\r
1108 of months, but are now included in the main FreeRTOS download.
\r
1109 + NXP LPC1114 GCC/LPCXpresso
\r
1110 + ST STM32F0518 IAR
\r
1111 + Infineon XMC4500 GCC/Atollic
\r
1112 + Infineon XMC4500 IAR
\r
1113 + Infineon XMC4500 Keil
\r
1114 + Infineon XMC4500 Tasking
\r
1117 Kernel miscellaneous / maintenance:
\r
1119 + Introduced the portSETUP_TCB() macro to remove the requirement for the
\r
1120 Windows simulator to use the traceTASK_CREATE() macro, leaving the trace
\r
1121 macro available for use by FreeRTOS+Trace (http://www.FreeRTOS.org/trace).
\r
1122 + Added a new trace macro, traceMOVE_TASK_TO_READY_STATE(), to allow future
\r
1123 FreeRTOS+Trace versions to provide even more information to users.
\r
1124 + Updated the FreeRTOS MPU port to be correct for changes that were
\r
1125 introduced in FreeRTOS V7.1.0.
\r
1126 + Introduced the xQueueReset() API function.
\r
1127 + Introduced the xSemaphoreGetMutexHolder() API function.
\r
1128 + Tidy up various port implementations to add the static key word where
\r
1129 appropriate, and remove obsolete code.
\r
1130 + Slight change to the initial stack frame given to the RX600 ports to allow
\r
1131 them to be used in the Eclipse based E2Studio IDE without confusing GDB.
\r
1132 + Correct the alignment given to the initial stack of Cortex-M4F tasks.
\r
1133 + Added a NOP following each DINT instruction on MSP430 devices for strict
\r
1134 conformance with the instructions on using DINT.
\r
1135 + Changed the implementation of thread deletes in the Win32 port to prevent
\r
1136 the port making use of the traceTASK_DELETE() trace macros - leaving this
\r
1137 macro free for use by FreeRTOS+Trace.
\r
1138 + Made some benign changes to the RX600 Renesas compiler port layer to
\r
1139 ensure the code can be built to a library without essential code being
\r
1140 removed by the linker.
\r
1141 + Reverted the change in the name of the uxTaskNumber variable made in
\r
1142 V7.1.0 as it broke the IAR plug-in.
\r
1145 Demo miscellaneous / maintenance:
\r
1147 + The command interpreter has now been formally released as FreeRTOS+CLI,
\r
1148 and been moved out of the main FreeRTOS download, to instead be available
\r
1149 from the FreeRTOS+ Ecosystem site http://www.FreeRTOS.org/plus.
\r
1150 + flash_timer.c/h has been added to the list of standard demo tasks. This
\r
1151 performs the same functionality as the flash.c tasks, but using software
\r
1152 timers in place of tasks.
\r
1153 + Upgraded the PIC32 demo as follows: Changes to how the library functions
\r
1154 are called necessitated by the new compiler version, addition of MPLAB X
\r
1155 project with PIC32MX360, PIC32MX460 and PIC32MX795 configurations,
\r
1156 addition of simply blinky demo, updated FreeRTOSConfig.h to include more
\r
1157 parameters, addition of hook function stubs.
\r
1158 + The MSP430X IAR and CCS demos have been updated to ensure the power
\r
1159 settings are correct for the configured CPU frequency.
\r
1160 + Rowley CrossWorks projects have been updated to correct the "multiple
\r
1161 definition of ..." warnings introduced when the toolchain was updated.
\r
1162 + Updated various FreeRTOSConfig.h header files associated with projects
\r
1163 that build with Eclipse to include a #error statement informing the user
\r
1164 that the CreateProjectDirectoryStructure.bat batch file needs to be
\r
1165 executed before the projects can be opened.
\r
1166 + Renamed directories that included "CCS4" in their name to remove the '4'
\r
1167 and instead just be "CCS". This is because the demo was updated and
\r
1168 tested to also work with later Code Composer Studio versions.
\r
1169 + Updated the TCP/IP periodic timer frequency in numerous uIP demos to be
\r
1170 50ms instead of 500ms.
\r
1172 Changes between V7.0.2 and V7.1.0 released December 13 2011
\r
1176 + Cortex-M4F IAR port.
\r
1177 + Cortex-M4F Keil/RVDS port.
\r
1178 + TriCore GCC port.
\r
1182 + NXP LPC4350 using the Keil MDK, and demonstrated on a Hitex development
\r
1184 + ST STM32F407 using the IAR Embedded Workbench for ARM, and demonstrated on
\r
1185 the IAR STM32F407ZG-SK starter kit.
\r
1186 + Infineon TriCore TC1782, using the GCC compiler, demonstrated on the
\r
1187 TriBoard TC1782 evaluation board.
\r
1188 + Renesas RX630, using the Renesas compiler and HEW, demonstrated on an
\r
1189 RX630 RSK (Renesas Starter Kit).
\r
1191 Miscellaneous / maintenance:
\r
1193 + Removed all calls to printf() from the K60/IAR Kinetis demo so the project
\r
1194 can execute stand alone - without being connected to the debugger.
\r
1195 + Completed the command interpreter framework. Command handlers now receive
\r
1196 the entire command string, giving them direct access to parameters.
\r
1197 Utility functions are provided to check the number of parameters, and
\r
1198 return parameter sub-strings.
\r
1199 + The previously documented fix for the bug in xTaskResumeFromISR() that
\r
1200 effected (only) ports supporting interrupt nesting has now been
\r
1201 incorporated into the main release.
\r
1202 + The portALIGNMENT_ASSERT_pxCurrentTCB() definition has been added to allow
\r
1203 specific ports to skip the second stack alignment check when a task is
\r
1204 created. This is because the second check is not appropriate for some
\r
1205 ports - including the new TriCore port where the checked pointer does not
\r
1206 actually point to a stack.
\r
1207 + The portCLEAN_UP_TCB() macro has been added to allow port specific clean
\r
1208 up when a task is deleted - again this is required by the TriCore port.
\r
1209 + Various other minor changes to ensure warning free builds on a growing
\r
1210 number of microcontroller and toolchain platforms. This includes a
\r
1211 (benign) correction to the prototype of the
\r
1212 vApplicationStackOverflowHook() definition found in lots of recent demos.
\r
1216 + The legacy trace mechanism has been completely removed - it has been
\r
1217 obsolete for the years since the trace macros were introduced. The
\r
1218 configuration constant configUSE_TRACE_FACILITY is now used to optionally
\r
1219 include additional queue and task information. The additional information
\r
1220 is intended to make the trace mechanism more generic, and allow the trace
\r
1221 output to provide more information. When configUSE_TRACE_FACILITY is set
\r
1223 - the queue structure includes an additional member to hold the queue
\r
1224 type, which can be base, mutex, counting semaphore, binary semaphore
\r
1225 or recursive mutex.
\r
1226 - the queue structure includes an additional member to hold a queue
\r
1227 number. A trace tool can set and query the queue number for its own
\r
1228 purposes. The kernel does not use the queue number itself.
\r
1229 - the TCB structure includes an additional member to hold a task number
\r
1230 number. A trace tool can set and query the task number for its own
\r
1231 purposes. The kernel does not use the task number itself.
\r
1232 + Queues and all types of semaphores are now automatically allocated their
\r
1233 type as they are created.
\r
1234 + Added two new trace macros - traceTASK_PRIORITY_INHERIT() and
\r
1235 traskTASK_PRIORITY_DISINHERIT().
\r
1236 + Updated the traceQUEUE_CREATE_FAILED() macro to take a parameter that
\r
1237 indicates the type of queue, mutex, or semaphore that failed to be
\r
1239 + The position from which traceCREATE_MUTEX() is called has been moved from
\r
1240 after the call to xQueueGenericSend() [within the same function] to before
\r
1241 the call. This ensures the trace events occur in the correct order.
\r
1242 + The value passed into tracePRIORITY_SET() has been corrected for the case
\r
1243 where vTaskPrioritySet() is called with a null parameter.
\r
1245 Changes between V7.0.1 and V7.0.2 released September 20 2011
\r
1249 + The official FreeRTOS Renesas RX200 port and demo application have been
\r
1250 incorporated into the main FreeRTOS zip file download.
\r
1251 + The official FreeRTOS Renesas RL78 port and demo application have been
\r
1252 incorporated into the main FreeRTOS zip file download.
\r
1253 + The official FreeRTOS Freescale Kinetis K60 tower demo application has
\r
1254 been incorporated into the main FreeRTOS zip file download. This includes
\r
1255 an embedded web server example.
\r
1256 + A new Microblaze V8 port layer has been created to replace the older, now
\r
1257 deprecated, port layer. The V8 port supports V8.x of the Microblaze IP,
\r
1258 including exceptions, caches, and the floating point unit. A new
\r
1259 Microblaze demo has also been added to demonstrate the new Microblaze V8
\r
1260 port layer. The demo application was created using V13.1 of the Xilinx
\r
1261 EDK, and includes a basic embedded web server that uses lwIP V1.4.0.
\r
1262 + The official FreeRTOS Fujitsu FM3 MB9A310 demo application has been
\r
1263 incorporated into the main FreeRTOS zip file download. Projects are
\r
1264 provided for both the IAR and Keil toolchains.
\r
1269 + xTaskGetIdleTaskHandle() has been added.
\r
1270 + xTaskGetTimerDaemonTaskHandle() has been added.
\r
1271 + pcTaskGetTaskName() has been added.
\r
1272 + vSemaphoreDelete() macro has been added to make it obvious how to delete
\r
1273 a semaphore. In previous versions vQueueDelete() had to be used.
\r
1274 + vTaskCleanUpResources() has been removed. It has been obsolete for a
\r
1276 + portPOINTER_SIZE_TYPE has been introduced to prevent compiler warnings
\r
1277 being generated when the size of a pointer does not match the size of
\r
1278 the stack type. This will (has already) be used in new ports, but will
\r
1279 not be retrofitted to existing ports until the existing port itself is
\r
1282 Other updates and news:
\r
1284 + The core files have all been modified to tighten the coding standard even
\r
1285 further. These are style, not functional changes.
\r
1286 + All ARM7 port layers have been slightly modified to prevent erroneous
\r
1287 assert() failures when tasks are created and configASSERT() is defined.
\r
1288 + All ARM IAR projects have been updated to build with the latest V6.2.x
\r
1289 versions of the IAR Embedded Workbench for ARM tools (EWARM). This was
\r
1290 necessary due to a change in the way EWARM uses the CMSIS libraries.
\r
1291 + The PIC32 port layer has been updated in preparation for V2 of the C32
\r
1293 + The old Virtex-4 Microblaze demo has been marked as deprecated. Please
\r
1294 use the brand new Spartan-6 port and demo in its place.
\r
1295 + The bones of a new generic command interpreter is located in
\r
1296 FreeRTOS/Demo/Common/Utils/CommandInterpreter.c. This is still a work in
\r
1297 progress, and not documented. It is however already in use. It will be
\r
1298 documented in full when the projects that are already using it are
\r
1300 + A couple of new standard demos have been included. First, a version of
\r
1301 flop.c called sp_flop.c. This is similar to flop.c, but uses single
\r
1302 precision floats in place of double precision doubles. This allows the
\r
1303 for testing ports to processors that have only single precision floating
\r
1304 point units, and revert to using emulated calculations whenever a double
\r
1305 is used. Second, comtest_strings.c has been included to allow the test
\r
1306 of UART drivers when an entire string is transmitted at once. The
\r
1307 previous comtest.c only used single character transmission and reception.
\r
1308 + lwIP V1.4.0 is now included in the FreeRTOS/Demo/Common directory, and
\r
1309 used by a couple of new demos.
\r
1311 Changes between V7.0.0 and V7.0.1 released May 13 2011
\r
1313 + Added a Fujitsu FM3 demo application for both the IAR and Keil tool
\r
1315 + Added a SmartFusion demo application for all of the IAR, Keil and
\r
1316 SoftConsole (GCC/Eclipse) tool chains.
\r
1317 + Updated the RX600 port and demo applications to take into account the
\r
1318 different semantics required when using the latest (V1.0.2.0) version of
\r
1319 the Renesas compiler.
\r
1320 + Modified the RX600 Ethernet driver slightly to make it more robust under
\r
1321 heavy load, and updated the uIP handling task to make use of the FreeRTOS
\r
1323 + Slightly changed the PIC32 port layer to move an ehb instruction in line
\r
1324 with the recommendations of the MIPS core manual, and ensure 8 byte stack
\r
1325 alignment is truly always obtained.
\r
1326 + Changed the behaviour when tasks are suspended before the scheduler has
\r
1327 been started. Before, there needed to be at least one task that was not
\r
1328 in the suspended state. This is no longer the case.
\r
1330 Changes between V6.1.1 and V7.0.0 released April 8 2011
\r
1332 FreeRTOS V7.0.0 is backward compatible with FreeRTOS V6.x.x
\r
1336 + Introduced a new software timer implementation.
\r
1337 + Introduced a new common demo application file to exercise the new timer
\r
1339 + Updated the Win32/MSVC simulator project to include the new software timer
\r
1340 demo tasks and software timer tick hook test. Much simpler software timer
\r
1341 demonstrations are included in the demo projects for both of the new ports
\r
1342 (MSP430X with CCS4 and STM32 with TrueStudio).
\r
1343 + Various enhancements to the kernel implementation in tasks.c. These are
\r
1344 transparent to users and do not effect the pre-existing API.
\r
1345 + Added calls to configASSERT() within the kernel code. configASSERT() is
\r
1346 functionally equivalent to the standard C assert() macro, but does not
\r
1347 rely on the compiler providing assert.h.
\r
1351 + Updated the MSP430X IAR port and demo project to include support for the
\r
1352 medium memory model.
\r
1353 + Added a demo project for the MSP430X that targets the MSP430X Discovery
\r
1354 board and uses the Code Composer Studio 4 tools. This demo includes use
\r
1355 of the new software timer implementation.
\r
1356 + Added an STM32F100RB demo project that targets the STM32 Discovery Board
\r
1357 and uses the TrueStudio Eclipse based IDE from Atollic.
\r
1358 + Removed some compiler warnings from the PSoC demo application.
\r
1359 + Updated the PIC32 port layer to ensure the
\r
1360 configMAX_SYSCALL_INTERRUPT_PRIORITY constant works as expected no matter
\r
1361 what its value is (within the valid range set by the microcontroller
\r
1363 + Updated the PIC24, dsPIC and PIC32 projects so they work with the latest
\r
1364 MPLAB compiler versions from Microchip.
\r
1365 + Various cosmetic changes to prepare for a standards compliance statement
\r
1366 that will be published after the software release.
\r
1369 Changes between V6.1.0 and V6.1.1 released January 14 2011
\r
1371 + Added two new Windows simulator ports. One uses the free Microsoft Visual
\r
1372 Studio 2010 express edition, and the other the free MingW/Eclipse
\r
1373 environment. Demo projects are provided for both.
\r
1374 + Added three demo projects for the PSoC 5 (CYAC5588). These are for the
\r
1375 GCC, Keil, and RVDS build tools, and all use the PSoC Creator IDE.
\r
1376 + Added a demo for the low power STM32L152 microcontroller using the IAR
\r
1377 Embedded Workbench.
\r
1378 + Added a new port for the MSP430X core using the IAR Embedded Workbench.
\r
1379 + Updated all the RX62N demo projects that target the Renesas Demonstration
\r
1380 Kit (RDK) to take into account the revered LED wiring on later hardware
\r
1381 revisions, and the new J-Link debug interface DLL.
\r
1382 + Updated all the RX62N demo projects so the IO page served by the example
\r
1383 embedded web server works with all web browsers.
\r
1384 + Updated the Red Suite projects to work with the up coming Red Suite
\r
1385 release, and to use a more recent version of the CMSIS libraries.
\r
1386 + Added the traceTAKE_MUTEX_RECURSIVE_FAILED() trace macro.
\r
1387 + Removed the (pointless) parameter from the traceTASK_CREATE_FAILED()
\r
1389 + Introduced the portALT_GET_RUN_TIME_COUNTER_VALUE() macro to compliment
\r
1390 the already existing portGET_RUN_TIME_COUNTER_VALUE(). This allows for
\r
1391 more flexibility in how the time base for the run time statistics feature
\r
1392 can be implemented.
\r
1393 + Added a "cpsie i" instruction before the "svc 0" instruction used to start
\r
1394 the scheduler in each of the Cortex M3 ports. This is to ensure that
\r
1395 interrupts are globally enabled prior to the "svc 0" instruction being
\r
1396 executed in cases where interrupts are left disabled by the C start up
\r
1398 + Slight optimisation in the run time stats calculation.
\r
1400 Changes between V6.0.5 and V6.1.0 released October 6 2010
\r
1402 + Added xTaskGetTickCountFromISR() function.
\r
1403 + Modified vTaskSuspend() to allow tasks that have just been created to be
\r
1404 immediately suspended even when the kernel has not been started. This
\r
1405 allows them to effectively start in the Suspended state - a feature that
\r
1406 has been asked for on numerous occasions to assist with initialisation
\r
1408 + Added ports for the Renesas RX62N using IAR, GCC and Renesas tool suites.
\r
1409 + Added a STM32F103 demo application that uses the Rowley tools.
\r
1410 + Under specific conditions xFreeBytesRemaining within heap_2.c could end up
\r
1411 with an incorrect value. This has been fixed.
\r
1412 + xTaskCreateGeneric() has a parameter that can be used to pass the handle
\r
1413 of the task just created out to the calling task. The assignment to this
\r
1414 parameter has been moved to ensure it is assigned prior to the newly
\r
1415 created having any possibility of executing. This takes into account the
\r
1416 case where the assignment is made to a global variable that is accessed by
\r
1417 the newly created task.
\r
1418 + Fixed some build time compiler warnings in various FreeTCPIP (based on
\r
1420 + Fixed some build time compiler warnings in Demo/Common/Minimal/IntQueue.c.
\r
1422 Changes between V6.0.4 and V6.0.5 released May 17 2010
\r
1424 + Added port and demo application for the Cortus APS3 processor.
\r
1426 Changes between V6.0.3 and V6.0.4 released March 14 2010
\r
1428 + All the contributed files that were located in the Demo/Unsupported_Demos
\r
1429 directory have been removed. These files are instead now available in the
\r
1430 new Community Contributions section of the FreeRTOS website. See
\r
1431 http://www.freertos.org/RTOS-contributed-ports.html
\r
1432 + The project file located in the Demo/CORTEX_STM32F107_GCC_Rowley directory
\r
1433 has been upgraded to use V2.x of the Rowley Crossworks STM32 support
\r
1435 + An initial Energy Micro EFM32 demo has been included. This will be
\r
1436 updated over the coming months to make better use of the low power modes
\r
1437 the EFM32 provides.
\r
1439 Changes between V6.0.2 and V6.0.3 released February 26 2010
\r
1441 + SuperH SH7216 (SH2A-FPU) port and demo application added.
\r
1442 + Slight modification made to the default implementation of
\r
1443 pvPortMallocAligned() and vPortFreeAligned() macros so by default they
\r
1444 just call pvPortMalloc() and vPortFree(). The macros are only needed to
\r
1445 be defined when a memory protection unit (MPU) is being used - and then
\r
1446 only depending on other configuration settings.
\r
1448 Changes between V6.0.1 and V6.0.2 released January 9th 2010
\r
1450 + Changed all GCC ARM 7 ports to use 0 as the SWI instruction parameter.
\r
1451 Previously the parameter was blank and therefore only an implicit 0 but
\r
1452 newer GCC releases do not permit this.
\r
1453 + Updated IAR SAM7S and SAM7X ports to work with IAR V5.40.
\r
1454 + Changed the stack alignment requirement for PIC32 from 4 bytes to 8 bytes.
\r
1455 + Updated prvListTaskWithinSingleList() is it works on processors where the
\r
1456 stack grows up from low memory.
\r
1457 + Corrected some comments.
\r
1458 + Updated the startup file for the RVDS LPC21xx demo.
\r
1460 Changes between V6.0.0 and V6.0.1 released November 15th 2009
\r
1462 + Altered pxPortInitialiseStack() for all Cortex-M3 ports to ensure the
\r
1463 stack pointer is where the compiler expects it to be when a task first
\r
1466 The following minor changes only effect the Cortex-M3 MPU port:
\r
1468 + portRESET_PRIVILEGE() assembly macro updated to include a clobber list.
\r
1469 + Added prototypes for all the privileged function wrappers to ensure no
\r
1470 compile time warnings are generated no matter what the warning level
\r
1472 + Corrected the name of portSVC_prvRaisePrivilege to
\r
1473 portSVC_RAISE_PRIVILEGE.
\r
1474 + Added conditional compilation into xTaskGenericCreate() to prevent some
\r
1475 compilers issuing warnings when portPRIVILEGE_BIT is defined as zero.
\r
1478 Changes between V5.4.2 and V6.0.0 released October 16th 2009
\r
1480 FreeRTOS V6 is backward compatible with FreeRTOS V5.x.
\r
1484 + FreeRTOS V6 is the first version to include memory protection unit (MPU)
\r
1485 support. Two ports now exist for the Cortex M3, the standard FreeRTOS
\r
1486 which does not include MPU support, and FreeRTOS-MPU which does.
\r
1487 + xTaskCreateRestricted() and vTaskAllocateMPURegions() API functions added
\r
1488 in support of FreeRTOS-MPU.
\r
1489 + Wording for the GPL exception has been (hopefully) clarified. Also the
\r
1490 license.txt file included in the download has been fixed (the previous
\r
1491 version contained some corruption).
\r
1495 + New API function xPortGetFreeHeapSize() added to heap_1.c and heap_2.c.
\r
1496 + ARM7 GCC demo interrupt service routines wrappers have been modified to
\r
1497 call the C portion using an __asm statement. This prevents the function
\r
1498 call being inlined at higher optimisation levels.
\r
1499 + ARM7 ports now automatically set the THUMB bit if necessary when
\r
1500 setting up the initial stack of a task - removing the need for
\r
1501 THUMB_INTERWORK to be defined. This also allows THUMB mode and ARM mode
\r
1502 tasks to be mixed more easily.
\r
1503 + All ARM7/9 ports now have portBYTE_ALIGNMENT set to 8 by default.
\r
1504 + Various demo application project files have been updated to be up to date
\r
1505 with the latest IDE versions.
\r
1506 + The linker scripts used with command line GCC demos have been updated to
\r
1507 include an eh_frame section to allow their use with the latest Yagarto
\r
1508 release. Likewise the demo makefiles have been updated to include
\r
1509 command line options to reduce or eliminate the eh_frame section all
\r
1511 + The definition of portBYTE_ALIGNMENT_MASK has been moved out of the
\r
1512 various memory allocation files and into the common portable.h header
\r
1514 + Removed unnecessary use of portLONG, portSHORT and portCHAR.
\r
1515 + Added LM3Sxxxx demo for Rowley CrossWorks.
\r
1516 + Posix simulator has been upgraded - see the corresponding WEB page on the
\r
1517 FreeRTOS.org site.
\r
1520 Changes between V5.4.1 and V5.4.2 released August 9th 2009
\r
1522 + Added a new port and demo app for the Altera Nios2 soft core.
\r
1523 + Added LPC1768 demo for IAR.
\r
1524 + Added a USB CDC demo to all LPC1768 demos (Code Red, CrossWorks and IAR).
\r
1525 + Changed clock frequency of LPC1768 demos to 99MHz.
\r
1527 Changes between V5.4.0 and V5.4.1 released July 25th 2009
\r
1529 + New hook function added. vApplicationMallocFailedHook() is (optionally)
\r
1530 called if pvPortMalloc() returns NULL.
\r
1531 + Additional casting added to xTaskCheckForTimeOut(). This prevents
\r
1532 problems that can arise should configUSE_16_BIT_TICKS be set to 1 on a
\r
1533 32 bit architecture (which would probably be a mistake, anyway).
\r
1534 + Corrected the parameter passed to NVIC_SetPriority() to set the MAC
\r
1535 interrupt priority in both LPC1768 demos.
\r
1536 + Decreased the default setting of configMINIMAL_STACK_SIZE in the PIC32
\r
1537 demo application to ensure the heap space was not completely consumed
\r
1538 before the scheduler was started.
\r
1540 Changes between V5.3.1 and V5.4.0 released July 13th 2009
\r
1542 + Added Virtex5 / PPC440 port and demos.
\r
1543 + Replaced the LPC1766 Red Suite demo with an LPC1768 Red Suite demo. The
\r
1544 original demo was configured to use engineering samples of the CPU. The
\r
1545 new demo has an improved Ethernet driver.
\r
1546 + Added LPC1768 Rowley demo with zero copy Ethernet driver.
\r
1547 + Reworked byte alignment code to ensure 8 byte alignment works correctly.
\r
1548 + Set configUSE_16_BIT_TICKS to 0 in the PPC405 demo projects.
\r
1549 + Changed the initial stack setup for the PPC405 to ensure the small data
\r
1550 area pointers are setup correctly.
\r
1552 Changes between V5.3.0 and V5.3.1 released June 21st 2009
\r
1554 + Added ColdFire V1 MCF51CN128 port and WEB server demo.
\r
1555 + Added STM32 Connectivity Line STM32107 Cortex M3 WEB server demo.
\r
1556 + Changed the Cortex M3 port.c asm statements to __asm so it can be
\r
1557 compiled using Rowley CrossWorks V2 in its default configuration.
\r
1558 + Updated the Posix/Linux simulator contributed port.
\r
1560 Changes between V5.2.0 and V5.3.0 released June 1st 2009
\r
1564 + Added new (optional) feature that gathers statistics on the amount of CPU
\r
1565 time used by each task.
\r
1566 + Added a new demo application for the Atmel AT91SAM3U Cortex-M3 based
\r
1568 + Added a new demo application for the NXP LPC1766 Cortex-M3 based
\r
1570 + Added a contributed port/demo that allows FreeRTOS to be 'simulated' in a
\r
1571 Linux environment.
\r
1574 + Updated the Stellaris uIP WEB server demos to include the new run time
\r
1575 statistics gathering feature - and include a served WEB page that
\r
1576 presents the information in a tabular format.
\r
1577 + Added in the lwIP port layer for the Coldfire MCF52259.
\r
1578 + Updated the CrossWorks LPC2368 WEB server to include an image in the
\r
1580 + Changed some of the timing in the initialisation of the LPC2368 MAC to
\r
1581 permit its use on all part revisions.
\r
1582 + Minor modifications to the core uIP code to remove some compiler warnings.
\r
1583 + Added xTaskGetApplicationTaskTag() function and updated the OpenWatcom
\r
1584 demo to make use of the new function.
\r
1585 + Added contributed demos for AVR32 AP7000, STM32 Primer 2 and STM32 using
\r
1586 Rowley Crossworks.
\r
1587 + Heap_1.c and Heap_2.c used to define structures for the purpose of data
\r
1588 alignment. These have been converted to unions to save a few bytes of
\r
1589 RAM that would otherwise be wasted.
\r
1590 + Remove the call to strncpy() used to copy the task name into the TCB when
\r
1591 the maximum task name is configured to be 1 byte long.
\r
1593 Changes between V5.1.2 and V5.2.0 released March 14th 2009
\r
1595 + Optimised the queue send and receive functions (also used by semaphores).
\r
1596 + Replaced the standard critical sections used to protect BIOS calls in the
\r
1597 PC port to instead use scheduler locks. This is because the BIOS calls
\r
1598 always return with interrupts enabled.
\r
1599 + Corrected unclosed comments in boot.s.
\r
1601 Changes between V5.1.1 and V5.1.2 released February 9th 2009
\r
1603 + Added NEC V850ES port and demo.
\r
1604 + Added NEC 78K0R port and demo.
\r
1605 + Added MCF52259 port and demo.
\r
1606 + Added the AT91SAM9XE port and demo.
\r
1607 + Updated the MCF52233 FEC driver to work around a silicon bug that
\r
1608 prevents the part auto negotiating some network parameters.
\r
1609 + Minor modifications to the MCF52233 makefile to permit it to be used
\r
1611 + Updated the STM32 primer files to allow them to be built with the latest
\r
1612 version of the RIDE tools.
\r
1613 + Updated the threads.js Java script used for kernel aware debugging in
\r
1614 the Rowley CrossWorks IDE.
\r
1617 Changes between V5.1.0 and V5.1.1 released November 20, 2008
\r
1619 + Added Coldfire MCF52233 WEB server demo using GCC and Eclipse.
\r
1620 + Added IAR MSP430 port and demo.
\r
1621 + Corrected several compiler time issues that had crept in as tool versions
\r
1623 + Included FreeRTOS-uIP - a faster uIP. This is not yet complete.
\r
1625 Changes between V5.0.4 and V5.1.0 released October 24, 2008
\r
1627 + Added a new port and demo application for the ColdFire V2 core using the
\r
1628 CodeWarrior development tools.
\r
1629 + Replaced the ARM7 demo that used the old (and now no longer supported)
\r
1630 Keil compiler with a new port that uses the new Keil/RVDS combo.
\r
1631 + Stack overflow checking now works for stacks that grow up from low
\r
1632 memory (PIC24 and dsPIC).
\r
1633 + BUG FIX - set the PIC32 definition of portSTACK_GROWTH to the correct
\r
1635 + MSP430 port layers have been updated to permit tasks to place the
\r
1636 microcontroller into power down modes 1 to 3. The demo applications have
\r
1637 likewise been updated to demonstrate the new feature.
\r
1638 + Replaced the two separate MSP430/Rowley port layers with a single and more
\r
1640 + Added more contributed ports, including ports for NEC and SAM9
\r
1642 + Changed the linker script used in the LPC2368 Eclipse demo.
\r
1644 Changes between V5.0.3 and V5.0.4 released September 22, 2008
\r
1646 + Completely re-written port for ColdFire GCC.
\r
1647 + Bug fix: All Cortex M3 ports have a minor change to the code that sets
\r
1648 the pending interrupt.
\r
1649 + Some header files require that FreeRTOS.h be included prior to their
\r
1650 inclusion. #error message have been added to all such header file
\r
1651 informing users to the cause of the compilation error should the headers
\r
1652 not be included in the correct order.
\r
1654 Changes between V5.0.2 and V5.0.3 released July 31, 2008
\r
1656 Changes relating to the Cortex M3:
\r
1658 + Added configMAX_SYSCALL_INTERRUPT_PRIORITY usage to all the Cortex M3
\r
1659 ports and demos. See the port documentation pages on the FreeRTOS.org
\r
1660 WEB site for full usage information.
\r
1661 + Improved efficiency of Cortex M3 port even further.
\r
1662 + Ensure the Cortex M3 port works no matter where the vector table is
\r
1664 + Added the IntQTimer demo/test tasks to a demo project for each CM3 port
\r
1665 (Keil, GCC and IAR) to test the new configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
1667 + Added the mainINCLUDE_WEB_SERVER definition to the LM3SXXXX IAR and Keil
\r
1668 projects to allow the WEB server to be conditionally excluded from the
\r
1669 build and therefore allow use of the KickStart (code size limited)
\r
1674 + Moved the PIC24 and dsPIC versions of vPortYield() from the C file to
\r
1675 an assembly file to allow use with all MPLAB compiler versions. This also
\r
1676 allows the omit-frame-pointer optimisation to be turned off.
\r
1678 Changes between V5.0.0 and V5.0.2 released May 30, 2008
\r
1680 + Updated the PIC32 port to allow queue API calls to be used from
\r
1681 interrupts above the kernel interrupt priority, and to allow full
\r
1682 interrupt nesting. Task stack usages has also been reduced.
\r
1683 + Added a new PowerPC port that demonstrates how the trace macros can be
\r
1684 used to allow the use of a floating point co-processor. The
\r
1685 traceTASK_SWITCHED_OUT() and traceTASK_SWITCHED_INT() macros are used to
\r
1686 save and restore the floating point context respectively for those tasks
\r
1687 that actually use floating point operations.
\r
1688 + BUG FIX: The first PPC405 port contained a bug in that it did not leave
\r
1689 adequate space above the stack for the backchain to be saved when a task
\r
1690 started to execute for the first time.
\r
1691 + Updated queue.c to add in the means to allow interrupt nesting and for
\r
1692 queue API functions to be called from interrupts that have a priority
\r
1693 above the kernel priority. This is only supported on PIC32 ports thus
\r
1695 + Fixed the compiler warnings that were generated when the latest version
\r
1696 of WinAVR was used.
\r
1697 + Remove all inline usage of 'inline' from the core kernel code.
\r
1698 + Added the queue registry feature. The queue registry is provided as a
\r
1699 means for kernel aware debuggers to locate queue definitions. It has no
\r
1700 purpose unless you are using a kernel aware debugger. The queue registry
\r
1701 will only be used when configQUEUE_REGISTRY_SIZE is greater than zero.
\r
1702 + Added the ST Cortex-M3 drivers into the Demo/Common/Drivers directory to
\r
1703 prevent them from having to be included in multiple demos.
\r
1704 + Added a Keil STM32 demo application.
\r
1705 + Changed the blocktim.c test files as it is no longer legitimate for all
\r
1706 ports to call queue API functions from within a critical section.
\r
1707 + Added the IntQueue.c test file to test the calling of queue API functions
\r
1708 from different interrupt priority levels, and test interrupt nesting.
\r
1710 Changes between V5.0.0 and V5.0.1
\r
1712 + V5.0.1 was a customer specific release.
\r
1714 Changes between V4.8.0 and V5.0.0 released April 15, 2008
\r
1716 *** VERY IMPORTANT INFORMATION ON UPGRADING TO FREERTOS.ORG V5.0.0 ***
\r
1718 The parameters to the functions xQueueSendFromISR(), xQueueSendToFrontFromISR(),
\r
1719 xQueueSendToBackFromISR() and xSemaphoreGiveFromISR() have changed. You must
\r
1720 update all calls to these functions to use the new calling convention! Your
\r
1721 compiler might not issue any type mismatch warnings!
\r
1724 See http://www.FreeRTOS.org/upgrading.html for full information.
\r
1729 + Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3
\r
1731 + New task hook feature added.
\r
1732 + PowerPC demo updated to use version 10.1 of the Xilinx EDK.
\r
1733 + Efficiency gains within the PIC32 port layer.
\r
1735 Changes between V4.7.2 and V4.8.0 released March 26 2008
\r
1737 + Added a Virtex4 PowerPC 405 port and demo application.
\r
1738 + Added optional stack overflow checking and new
\r
1739 uxTaskGetStackHighWaterMark() function.
\r
1740 + Added new xQueueIsQueueEmptyFromISR(), xQueueIsQueueFullFromISR() and
\r
1741 uxQueueMessagesWaitingFromISR() API functions.
\r
1742 + Efficiency improvements to the Cortex-M3 port layer. NOTE: This
\r
1743 requires that an SVC handler be installed in the application.
\r
1744 + Efficiency improvements to the queue send and receive functions.
\r
1745 + Added new trace macros. These are application definable to provide
\r
1746 a flexible trace facility.
\r
1747 + Implemented the configKERNEL_INTERRUPT_PRIORITY within the Keil Cortex
\r
1748 M3 port layer (bringing it up to the same standard as the IAR and GCC
\r
1750 + Ports that used the arm-stellaris-eabi-gcc tools have been converted to
\r
1751 use the arm-non-eabi-gcc tools.
\r
1753 Changes between V4.7.1 and V4.7.2 released February 21, 2008
\r
1755 + Added Fujitsu MB91460 port and demo.
\r
1756 + Added Fujitsu MB96340 port and demo.
\r
1757 + Tidied up the capitalisation of include files to facilitate builds on
\r
1759 + Removed some redundant casting that was generating warnings - but was
\r
1760 included to remove warnings on other compilers.
\r
1762 Changes between V4.7.0 and V4.7.1 released February 3, 2008
\r
1764 + Updated all IAR ARM projects to use V5.11 of the IAR Embedded Workbench
\r
1766 + Introduced recursive semaphore feature.
\r
1767 + Updated LPC2368 demos to take into account silicon bugs in old chip
\r
1769 + Updated STR9 uIP port to manually set the net mask and gateway addresses.
\r
1770 + Updating demos to allow more to run with the co-operative scheduler.
\r
1771 + Fixed co-operative scheduler behaviour upon the occurrence of a tick
\r
1772 interrupt while the scheduler was suspended.
\r
1773 + Updated documentation contained within semphr.h.
\r
1774 + ARM7 GCC ports no longer use the IRQ attribute.
\r
1776 Changes between V4.6.1 and V4.7.0 released December 6, 2007
\r
1778 + Introduced the counting semaphore macros and demo source files. The
\r
1779 Open Watcom PC project has been updated to include the new demo. See
\r
1780 the online documentation for more information.
\r
1781 + Introduced the 'alternative' queue handling API and demo source files.
\r
1782 The Open Watcom PC project has been updated to include the new demo
\r
1783 source files. See the online documentation for more information.
\r
1784 + Added AT91SAM7X Eclipse demo project.
\r
1785 + Added the STM32 primer demo project for the GCC compiler and Ride IDE.
\r
1786 + Removed the .lock files that were mistakenly included in the V4.6.1
\r
1787 eclipse workspaces.
\r
1789 Changes between V4.6.0 and V4.6.1 released November 5 2007
\r
1791 + Added support for the MIPS M4K based PIC32.
\r
1792 + Added 'extern "C"' to all the header files to facilitate use with C++.
\r
1794 Changes between V4.5.0 and V4.6.0 released October 28 2007
\r
1796 + Changed the method used to force a context switch within an ISR for the
\r
1797 ARM7/9 GCC ports only. The portENTER_SWITCHING_ISR() and
\r
1798 portEXIT_SWITCHING_ISR() macros are no longer supported. This is to
\r
1799 ensure correct behaviour no matter which GCC version is used, with or
\r
1800 without the -fomit-frame-pointer option, and at all optimisation levels.
\r
1801 + Corrected the prototype for xQueueGenericSend() within queue.h.
\r
1803 Changes between V4.4.0 and V4.5.0 released September 17 2007
\r
1805 + Added the xQueueSendToFront(), xQueueSendToBack() and xQueuePeek()
\r
1806 functionality. These should now be used in preference to the old
\r
1807 xQueueSend() function - which is maintained for backward compatibility.
\r
1808 + Added Mutex functionality. The behaviour of mutexes is subtly different
\r
1809 to the already existing binary semaphores as mutexes automatically
\r
1810 include a priority inheritance mechanism.
\r
1811 + Added the GenQTest.c and QPeek.c to test and demonstrate the behaviour
\r
1812 of the new functionality.
\r
1813 + Updated the LM3Sxxxx and PC ports to include the new GenQTest.c and
\r
1815 + Updated the GCC port for the Cortex M3 to include the
\r
1816 configKERNEL_INTERRUPT_PRIORITY functionality. This was previously only
\r
1817 included in the IAR port.
\r
1818 + Optimised the GCC and IAR port layer code - specifically the context
\r
1820 + Consolidated the LM3Sxxxx EK demos for all development tools into a
\r
1821 single project that automatically detects which version of the EK the
\r
1822 application is executing on.
\r
1823 + Added Eclipse support for LM3Sxxxx evaluation kits.
\r
1824 + Added Eclipse support for the Keil LPC2368 evaluation kit.
\r
1825 + Added the Demo/Drivers directory to hold code that is common to multiple
\r
1826 demo application projects.
\r
1827 + Included some minor bug fixes in the uIP 1.0 code.
\r
1828 + Added an lwIP demo for the STR9 - thanks ST for assistance.
\r
1829 + Updated the AVR32 port to ensure correct behaviour with full compiler
\r
1831 + Included binaries for OpenOCD FTDI and parallel port interfaces.
\r
1833 Changes between V4.4.0 and V4.3.1 released July 31, 2007
\r
1835 + Added AVR32 UC3B demo application.
\r
1836 + Updated AVR32 UC3A port and demo applications.
\r
1837 + Added IAR lwIP demo for AVR32 UC3A.
\r
1838 + Updated listGET_OWNER_OF_NEXT_ENTRY() to assist compiler optimisation
\r
1839 (thanks Niu Yong for making the suggestion).
\r
1840 + Added xTaskGetSchedulerState() API function.
\r
1841 + BUG FIX: Corrected behaviour when tasks that are blocked indefinitely
\r
1842 have their block time adjusted (within xQueueSend() and xQueueReceive()),
\r
1843 and are the subject of a call the vTaskResume() when they are not
\r
1844 actually in the Suspended state (thanks Dan Searles for reporting the
\r
1848 Changes between V4.3.0 and V4.3.1 released June 11, 2007
\r
1850 + Added STMicroelectronics STM32 Cortex-M3 demo application.
\r
1851 + Updated ustdlib.c for the GCC LM3S6965 demo.
\r
1853 Changes between V4.2.1 and V4.3.0 released June 5, 2007
\r
1855 + Introduced configKERNEL_INTERRUPT_PRIORITY to the IAR Cortex-M3, PIC24
\r
1856 and dsPIC ports. See the LM3S6965 and PIC24 demo application
\r
1857 documentation pages for more information.
\r
1858 + Updated the PIC24 and dsPIC demos to build with V3.0 of the PIC30 GCC
\r
1859 tools, and changed the demo applications.
\r
1860 + Added demos for the new Ethernet and CAN enabled Luminary Micro Stellaris
\r
1862 + Corrected bug in uIP the demos that prevented frames of approximately 1480
\r
1863 bytes and over from being transmitted.
\r
1864 + Included the LPC2368/uIP/Rowley demo into the main FreeRTOS.org
\r
1866 + Update to WizC PIC18 port to permit its use with version 14 of the
\r
1867 compiler. Thanks Marcel!
\r
1869 Changes between V4.2.1 and V4.2.0 released April 2, 2007
\r
1871 + Added AVR32 AT32UC3A ports for GCC and IAR.
\r
1872 + Added -fomit-frame-pointer option to lwIP SAM7X demo makefile.
\r
1873 + Moved location of call to LCD_Init() in STR9 demo to ensure it is only
\r
1874 called after the scheduler has been started.
\r
1876 Changes between V4.1.3 and V4.2.0 released February 8, 2007
\r
1878 + Changes to both task.c and queue.c as a result of testing performed on
\r
1879 the SafeRTOS code base.
\r
1880 + Added Cortex-M3 LM3S811 demos for GCC and IAR tools.
\r
1882 Changes between V4.1.2 and V4.1.3 released November 19, 2006
\r
1884 + Added STR750 ARM7 port using the Raisonance RIDE/GCC tools.
\r
1885 + Added -fomit-frame-pointer option to Rowley ARM7 demos as work around
\r
1886 to GCC bug at some optimisation levels.
\r
1887 + Altered the way the heap is defined in the LM3S811 Keil demo to prevent
\r
1888 the RAM usage from counting toward the code size limit calculation.
\r
1889 + CO-ROUTINE BUG FIX: Removed the call to prvIsQueueEmpty from within
\r
1890 xQueueCRReceive as it exited with interrupts enabled. Thanks Paul Katz.
\r
1891 + Tasks that block on events with a timeout of portMAX_DELAY are now
\r
1892 blocked indefinitely if configINCLUDE_vTaskSuspend is defined.
\r
1893 Previously portMAX_DELAY was just the longest block time possible. This
\r
1894 is still the case if configINCLUDE_vTaskSuspend is not defined.
\r
1895 + Minor changes to some demo application files.
\r
1897 Changes between V4.1.1 and V4.1.2 released October 21, 2006
\r
1899 + Added 16bit PIC ports and demos.
\r
1900 + Added STR750 port and demo.
\r
1903 Changes between V4.1.0 and V4.1.1 released September 24, 2006
\r
1905 + Added the Luminary Micro Stellaris LM3S811 demo application.
\r
1907 Changes between V4.0.5 and V4.1.0 released August 28, 2006
\r
1909 + Prior to V4.1.0, under certain documented circumstances, it was possible
\r
1910 for xQueueSend() and xQueueReceive() to return without having completed
\r
1911 and without their block time expiring. The block time effectively
\r
1912 stated a maximum block time, and the return value of the function needed
\r
1913 to be checked to determine the reason for returning. This is no longer
\r
1914 the case as the functions will only return once the block time has
\r
1915 expired or they are able to complete their operation. It is therefore no
\r
1916 longer necessary to wrap calls within loops.
\r
1917 + Changed the critical section handling in the IAR AVR port to correct the
\r
1918 behaviour when used with later compiler versions.
\r
1919 + Added the LPC2138 CrossWorks demo into the zip file. Previously this was
\r
1920 only available as a separate download.
\r
1921 + Modified the AVR demo applications to demonstrate the use of co-routines.
\r
1923 Changes between V4.0.4 and V4.0.5 released August 13, 2006
\r
1925 + Introduced API function xTaskResumeFromISR(). Same functionality as
\r
1926 xTaskResume(), but can be called from within an interrupt service routine.
\r
1927 + Optimised vListInsert() in the case when the wake time is the maximum
\r
1929 + Bug fix: The 'value' of the event list item is updated when the priority
\r
1930 of a task is changed. Previously only the priority of the TCB itself was
\r
1932 + vTaskPrioritySet() and vTaskResume() no longer use the event list item.
\r
1933 This has not been necessary since V4.0.1 when the xMissedYield handling
\r
1935 + Lowered the PCLK setting on the ARM9 STR9 demo from 96MHz to 48MHz.
\r
1936 + When ending the scheduler - do not try to attempt a context switch when
\r
1937 deleting the current task.
\r
1938 + SAM7X EMAC drivers: Corrected the Rx frame length mask when obtaining
\r
1939 the length from the rx descriptor.
\r
1942 Changes between V4.0.3 and V4.0.4 released June 22, 2006
\r
1944 + Added a port and demo application for the STR9 ARM9 based processors from
\r
1946 + Slight optimisation to the vTaskPrioritySet() function.
\r
1947 + Included the latest uIP version (1.0) in the demo/common/ethernet
\r
1950 Changes between V4.0.2 and V4.0.3 released June 7, 2006
\r
1952 + Added a port and demo application for the Cortex-M3 target using the IAR
\r
1953 development tools.
\r
1954 + The ARM Cortex-m3 Rowley projects have been updated to use V1.6 of the
\r
1955 CrossStudio tools.
\r
1956 + The heap size defined for the lwIP Rowley demo has been reduced so that
\r
1957 the project will link correctly when using the command line GCC tools
\r
1958 also. The makefile has also been modified to allow debugging.
\r
1959 + The lwIP Rowley demo not includes a 'kernel aware' debug window.
\r
1960 + The uIP Rowley project has been updated to build with V1.6 of CrossWorks.
\r
1961 + The second set of tasks in the blockQ demo were created the wrong way
\r
1962 around (inconsistent to the description in the file). This has been
\r
1965 Changes between V4.0.1 and V4.0.2 released May 28, 2006
\r
1967 + Port and demo application added for the Tern Ethernet Engine controller.
\r
1968 + Port and demo application added for MC9S12 using GCC, thanks to
\r
1969 Jefferson "imajeff" Smith.
\r
1970 + The function vTaskList() now suspends the scheduler rather than disabling
\r
1971 interrupts during the creation of the task list.
\r
1972 + Allow a task to delete itself by passing in its own handle. Previously
\r
1973 this could only be done by passing in NULL.
\r
1974 + Corrected the value passed to the WDG_PeriodValueConfig() library
\r
1975 function in the STR71x demo.
\r
1976 + The tick hook function is now called only within a tick isr. Previously
\r
1977 it was also called when the tick function was called during the scheduler
\r
1978 unlocking process.
\r
1979 + The EMAC driver in the SAM7X lwIP demo has been made more robust as per
\r
1980 the thread: http://sourceforge.net/forum/message.php?msg_id=3714405
\r
1981 + In the PC ports: Add function prvSetTickFrequencyDefault() to set the
\r
1982 DOS tick back to its proper value when the scheduler exits. Thanks
\r
1984 + In the Borland x86 ports there was a mistake in the portFIRST_CONTEXT
\r
1985 macro where the BP register was not popped from the stack correctly. The
\r
1986 BP value would never get used so this did not cause a problem, but it has
\r
1987 been corrected all the same.
\r
1990 Changes between V4.0.0 and V4.0.1 released April 7 2006
\r
1992 + Improved the ARM CORTEX M3 ports so they now only have to service
\r
1993 pendSV interrupts.
\r
1994 + Added a Luminary Micro port and demo for use with Rowley CrossWorks.
\r
1995 + Added the xMissedYield handling to tasks.c.
\r
1997 Changes between V3.2.4 and V4.0.0
\r
2001 + Added new RTOS port for Luminary Micros ARM CORTEX M3 microcontrollers.
\r
2002 + Added new co-routine functionality.
\r
2004 Other kernel changes:
\r
2006 + An optional tick hook call is now included in the tick function.
\r
2007 + Introduced the xMiniListItem structure and removed the list pxHead
\r
2008 member in order to reduce RAM usage.
\r
2009 + Added the following definitions to the FreeRTOSConfig.h file included
\r
2011 configUSE_TICK_HOOK
\r
2012 configUSE_CO_ROUTINES
\r
2013 configMAX_CO_ROUTINE_PRIORITIES
\r
2014 + The volatile qualification has been changed on the list members to allow
\r
2015 the task.c code to be tidied up a bit.
\r
2016 + The scheduler can now be started even if no tasks have been created!
\r
2017 This is to allow co-routines to run when there are no tasks.
\r
2018 + A task being woken by an event will now preempt the currently running task
\r
2019 even if its priority is only equal to the currently running task.
\r
2021 Port and demo application changes:
\r
2023 + Updated the WinAVR demo to compile with the latest version of WinAVR
\r
2024 with no warnings generated.
\r
2025 + Changed the WinAVR makefile to make chars signed - needed for the
\r
2026 co-routine code if BaseType_t is set to char.
\r
2027 + Added new demo application file crflash.c. This demonstrates co-routine
\r
2028 functionality including passing data between co-routines.
\r
2029 + Added new demo application file crhook.c. This demonstrates co-routine
\r
2030 and tick hook functionality including passing data between and ISR and
\r
2032 + Some NOP's were missing following stmdb{}^ instructions in various ARM7
\r
2033 ports. These have been added.
\r
2034 + Updated the Open Watcom PC demo project to include the crflash and crhook
\r
2035 demo co-routines as an example of their use.
\r
2036 + Updated the H8S demo to compile with the latest version of GCC.
\r
2037 + Updated the SAM7X EMAC drivers to take into account the hardware errata
\r
2038 regarding lost packets.
\r
2039 + Changed the default MAC address used by some WEB server demos as the
\r
2040 original addresses used was not liked by some routers.
\r
2041 + Modified the SAM7X/IAR startup code slightly to prevent it hanging on
\r
2042 some systems when the code is executed using a j-link debugger. The
\r
2043 j-link macro file configures the PLL before the code executes so
\r
2044 attempting to configure it again in the startup code was causing a
\r
2045 problem for some user. Now a check is performed first to see if the
\r
2046 PLL is already set up.
\r
2047 + GCC port now contain all assembler code in a single asm block rather than
\r
2048 individual blocks as before.
\r
2049 + GCC LPC2000 code now explicitly uses R0 rather than letting the assembler
\r
2050 choose the register to use as a temporary register during the context
\r
2052 + Added portNOP() macro.
\r
2053 + The compare match load value on LPC2000 ports now has 1 added to correct
\r
2055 + The minimal stack depth has been increased slightly on the WIZC PIC18
\r
2058 Changes between V3.2.3 and V3.2.4
\r
2060 + Modified the GCC ARM7 port layer to allow use with GCC V4.0.0 and above.
\r
2061 Many thanks to Glen Biagioni for the provided update.
\r
2062 + Added a new Microblaze port and demo application.
\r
2063 + Modified the SAM7X EMAC demo to default to use the MII interface rather
\r
2064 than the RMII interface.
\r
2065 + Modified the startup sequence of the SAM7X demo slightly to allow the
\r
2066 EMAC longer to auto negotiate.
\r
2068 Changes between V3.2.2 and V3.2.3
\r
2070 + Added MII interface support to the SAM7X EMAC peripheral driver.
\r
2071 Previously versions worked with the RMII interface only.
\r
2072 + Added command line GCC support to the SAM7X lwIP demo. Previously the
\r
2073 project could only be built using the CrossWorks IDE. Modifications to
\r
2074 this end include the addition of a standard makefile and linker script to
\r
2075 the download, and some adjustments to the stacks allocated to each task.
\r
2076 + Changed the page returned by the lwIP WEB server demo to display the
\r
2077 task status table rather than the TCP/IP statistics.
\r
2078 + Corrected the capitalisation of some header file includes and makefile
\r
2079 dependencies to facilitate use on Linux host computers.
\r
2080 + The various LPC2000 ports had a mistake in the timer setup where the
\r
2081 prescale value was written to T0_PC instead of T0_PR. This would have
\r
2082 no effect unless a prescale value was actually required. This has been
\r
2085 Changes between V3.2.1 and V3.2.2 - Released 23 September, 2005
\r
2087 + Added an IAR port for the Philips LPC2129
\r
2088 + The Atmel ARM7 IAR demo project files are now saved in the IAR Embedded
\r
2089 Workbench V4.30a format.
\r
2090 + Updated the J-Link macro file included with the SAM7X uIP demo project
\r
2091 to allow the demo board to be reset over the J-Link.
\r
2093 Changes between V3.2.0 and V3.2.1 - Released 1 September, 2005
\r
2095 + Added lwIP demo for AT91SAM7X using Rowley tools.
\r
2096 + Added uIP demo for AT91SAM7X using IAR tools.
\r
2097 + Added function xTaskGetCurrentTaskHandle().
\r
2098 + Renamed events.h to mevents.h to prevent it conflicting with the events.h
\r
2099 generated automatically by the HCS12 processor expert utility. events.h
\r
2100 is only used by the PC demo application.
\r
2101 + Both PIC18 ports now initialise the TBLPTRU to 0 as this is the value
\r
2102 expected by the compiler, and the compilers do not write to this
\r
2104 + The HCS12 banked model demo now creates the 'suicide' tasks immediately
\r
2105 prior to starting the scheduler. These tasks should be the last tasks to
\r
2106 get started in order for the test to function correctly.
\r
2108 Changes between V3.1.1 and V3.2.0 - Released 29 June, 2005
\r
2110 V3.2.0 introduces two new MSP430 ports and corrects a minor kernel
\r
2111 issues. Thanks to Ares.qi for his input.
\r
2113 + Added two MSP430 ports that use the Rowley CrossWorks development tools.
\r
2114 One port just mirrors the existing GCC port. The other port was provided
\r
2115 by Milos Prokic. Thanks!
\r
2116 + V3.2.0 corrects the behavior when vTaskPrioritySet() or vTaskResume()
\r
2117 are called while the scheduler is locked (by a call to
\r
2118 vTaskSuspendAll()). When this is done the subject task now starts to
\r
2119 execute immediately when the scheduler is unlocked if it has the highest
\r
2120 priority that is ready to run. Previously there was a possibility that
\r
2121 the task would not run until the next RTOS tick or call to portYIELD().
\r
2122 + Another similar small correction ensures that in the case where more than
\r
2123 one task is blocked on a semaphore or queue, the task with the highest
\r
2124 priority is guaranteed to be unblocked first.
\r
2125 + Added a couple of more test tasks to the PC demo which cover the points
\r
2128 Changes between V3.1.0 and V3.1.1 - Released 21st June, 2005
\r
2130 This release updates the HCS12 port. The common kernel code
\r
2131 remains unchanged.
\r
2133 + Updated the HCS12 port to support banking and introduced a demo
\r
2134 application for the MC9S12DP256. The new demo application is
\r
2135 located in the Demo/HCS12_CodeWarrior_banked directory.
\r
2136 + The name of the directory containing the MC9S12F32 demo application
\r
2137 has been changed to Demo/HCS12_CodeWarrior_small (as in 'small'
\r
2139 + MC9S12F32 demo updated slightly to use the PLL. The CPU speed for the
\r
2140 demo application is now 24MHz. Previously it was 8MHz.
\r
2141 + The demo application file Demo/Common/Minimal/death.c has a slight
\r
2142 alteration to prevent it using floating point variables.
\r
2145 Changes between V3.0.0 and V3.1.0 - Released 11th June, 2005
\r
2147 + Added new ports for ST Microsystems STR71x, and Freescale HCS12
\r
2148 microcontrollers. Currently the HCS12 port is limited to the small
\r
2149 memory model. Large memory models will be supported in the next
\r
2151 + PIC18 wizC port updated. Thanks to Marcel van Lieshout for his
\r
2152 continuing contribution.
\r
2153 + The accuracy of the AVR port timer setup has been improved. Thanks to
\r
2154 Thomas Krutmann for this contribution.
\r
2155 + Added a new conditional compilation macro configIDLE_SHOULD_YIELD.
\r
2156 See the WEB documentation for details.
\r
2157 + Updated the CrossWorks uIP demo to build with V1.4 of CrossWorks.
\r
2158 + Slight modification to the SAM7 release build configuration to correct
\r
2159 an include path definition.
\r
2160 + Updated the MPLAB PIC18 documentation to provide extra details on linker
\r
2161 file configuration.
\r
2163 Changes between V3.0.0 and V2.6.1 - Released 23rd April, 2005
\r
2165 V3.0.0 includes many enhancements, so this history list is broken into
\r
2166 subsections as follows:
\r
2170 Directory name changes
\r
2171 Kernel and miscellaneous changes changes
\r
2175 + Each port now defines BaseType_t as the data type that is most
\r
2176 efficient for that architecture. The type BaseType_t is used
\r
2177 extensively in API calls necessitating the following changes to the
\r
2178 FreeRTOS API function prototypes.
\r
2180 See the "New for V3.0.0" section of the FreeRTOS online
\r
2181 documentation for full details of API changes.
\r
2185 + The AT91FR40008 ARM7 port contributed by John Feller is now included
\r
2186 in the download (thanks John!).
\r
2187 + The PIC18 port for the wizC/fedC compiler contributed by Marcel van
\r
2188 Lieshout is now included in the download (thanks Marcel!).
\r
2189 + The IAR port for the AVR microcontroller has been upgraded to V3.0.0
\r
2190 and is now a supported port.
\r
2192 - Directory name changes
\r
2194 For consistency, and to allow integration of the new ports, the
\r
2195 following directory names have been changed.
\r
2197 + The source/portable/GCC/ARM7 directory has been renamed
\r
2198 source/portable/GCC/ARM7_LPC2000 so it is compatible with the naming
\r
2199 of other GCC ARM7 ports.
\r
2200 + The Demo/PIC directory has been renamed Demo/PIC18_MPLAB to
\r
2201 accommodate the wizC/fedC PIC port.
\r
2202 + The demo applications for the two AVR ports no longer share the same
\r
2203 directory. The WinAVR demo is in the Demo/AVR_ATMega323_WinAVR
\r
2204 directory and the IAR port in the Demo/AVR_ATMega323_IAR directory.
\r
2207 - Kernel and miscellaneous changes changes
\r
2209 See the "New for V3.0.0" section of the FreeRTOS online
\r
2210 documentation for more information.
\r
2212 + Previously 'portmacro.h' contained some user editable definitions
\r
2213 relating to the user application, and some fixed definitions relating
\r
2214 specifically to the port being used. The application specific
\r
2215 definitions have been removed from 'portmacro.h' and placed inside a
\r
2216 new header file called 'FreeRTOSConfig.h'. 'portmacro.h' should now
\r
2217 never be modified by the user. A 'FreeRTOSConfig.h' is now included
\r
2218 in each of FreeRTOS/Demo subdirectories - as it's settings relate to
\r
2219 the demo application rather than being specific to the port.
\r
2220 + Introduced configUSE_IDLE_HOOK in idle task.
\r
2221 + The idle task will yield when another idle priority task is ready to
\r
2222 run. Previously the idle task would run to the end of its time slice
\r
2224 + The idle task is now created when the scheduler is started. This
\r
2225 requires less stack than the previous scheme where it was created upon
\r
2226 creation of the first application task.
\r
2227 + The function usPortCheckFreeStackSpace() has been renamed
\r
2228 usTaskCheckFreeStackSpace() and moved from the portable layer to
\r
2230 + Corrected spelling of portMINMAL_STACK_SIZE to portMINIMAL_STACK_SIZE.
\r
2231 + The portheap.c file included with the AVR port has been deleted. The
\r
2232 AVR demo now uses the standard heap1 sample memory allocator.
\r
2233 + The GCC AVR port is now build using the standard make utility. The
\r
2234 batch files used previously have been deleted. This means a recent
\r
2235 version of WinAVR is required in order to create a binary suitable for
\r
2236 source level debugging.
\r
2237 + vTaskStartScheduler() no longer takes the configUSE_PREEMPTION
\r
2238 constant as a parameter. Instead the constant is used directly within
\r
2239 tasks.c and no parameter is required.
\r
2240 + The header file 'FreeRTOS.h' has been created and is used to include
\r
2241 'projdefs.h', 'FreeRTOSConfig.h' and 'portable.h' in the necessary
\r
2242 order. FreeRTOS.h can now be included in place of these other
\r
2244 + The header file 'errors.h' has been deleted. The definitions it
\r
2245 contained are now located within 'projdefs.h'.
\r
2246 + pvPortMalloc() now takes a size_t parameter as per the ANSI malloc().
\r
2247 Previously an unsigned short was used.
\r
2248 + When resuming the scheduler a yield is performed if either a tick has
\r
2249 been missed, or a task is moved from the pending ready list into a
\r
2250 ready list. Previously a yield was not performed on this second
\r
2252 + In heap1.c an overflow check has been added to ensure the next free
\r
2253 byte variable does not wrap around.
\r
2254 + Introduced the portTASK_FUNCTION() and portTASK_FUNCTION_PROTO()
\r
2256 + The MPLAB PIC port now saved the TABLAT register in interrupt service
\r
2259 Changes between V2.6.0 and V2.6.1 - Released Feb 22, 2005
\r
2261 This version adds support for the H8 processor.
\r
2265 + tskMAX_TASK_NAME_LEN removed from the task.h header and added to each
\r
2266 individual portmacro.h file as portMAX_TASK_NAME_LEN. This allows RAM
\r
2267 limited ports to allocate fewer characters to the task name.
\r
2268 + AVR port - Replaced the inb() and outb() functions with direct memory
\r
2269 access. This allows the port to be built with the 20050414 build of
\r
2271 + GCC LPC2106 port - removed the 'static' from the definition of
\r
2272 vNonPreemptiveTick() to allow the demo to link when using the cooperative
\r
2274 + GCC LPC2106 port - Corrected the optimisation options in the batch files
\r
2275 ROM_THUMB.bat, RAM_THUMB.bat, ROM_ARM.bat and RAM_ARM.bat. The lower case
\r
2276 -o is replaced by an uppercase -O.
\r
2277 + Tasks.c - The strcpy call has been removed when copying across the task
\r
2278 name into the TCB.
\r
2279 + Updated the trace visualisation to always be 4 byte aligned so it can be
\r
2280 used on ARM architectures.
\r
2281 + There are now two tracecon executables (that convert the trace file binary
\r
2282 into an ASCII file). One for big endian targets and one for little endian
\r
2284 + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called
\r
2285 too often in the idle task.
\r
2286 + SAM7 USB driver - Replaced the duplicated RX_DATA_BK0 in the interrupt
\r
2287 mask with the RX_DATA_BK1.
\r
2290 Changes between V2.5.5 and V2.6.0 - Released January 16, 2005
\r
2292 + Added the API function vTaskDelayUntil(). The demo app file
\r
2293 Demo/Common/Minimal/flash.c has been updated to demonstrate its use.
\r
2294 + Added INCLUDE_vTaskDelay conditional compilation.
\r
2295 + Changed the name of the Demo/ARM7_AtmelSAM7S64_IAR directory to
\r
2296 Demo/ARM7_AT91SAM7S64_IAR for consistency.
\r
2297 + Modified the AT91SAM7S USB driver to allow descriptors that have
\r
2298 a length that is an exact multiple of the FIFO to be transmitted.
\r
2300 Changes between V2.5.4 and V2.5.5 - Released January 3, 2005
\r
2302 This version adds support for the Atmel SAM7 ARM7 microcontrollers
\r
2303 along with the IAR development tools.
\r
2307 + Renamed the Demo/ARM7 directory to Demo/ARM7_LPC2106_GCC.
\r
2308 + Renamed the Demo/ARM7_Keil directory to Demo/ARM7_LPC2129_Keil.
\r
2309 + Modified the Philips ARM7 serial interrupt service routines to only
\r
2310 process one interrupt per call. This seems to enable the ISR to
\r
2311 operate more quickly.
\r
2312 + Removed the 'far' keyword from the Open Watcom portable layer source
\r
2313 files. This allows their use with V1.3 of Open Watcom.
\r
2314 + Minor modifications to the SDCC build files to allow their use under
\r
2315 Linux. Thanks to Frieder Ferlemann for this contribution.
\r
2316 + Small change to sTaskCreate() to allow a context switch even when
\r
2317 pxCreatedTask is NULL. Thanks to Kamil for this contribution.
\r
2318 + inline keyword removed from vTaskSwitchContext() and VTaskIncrementTick()
\r
2321 Changes between V2.5.3 and V2.5.4 - Released Dec 1, 2004
\r
2323 This is an important maintenance release.
\r
2325 The function cTaskResumeAll() has been modified so it can be used safely
\r
2326 prior to the kernel being initialised. This was an issue as
\r
2327 cTaskResumeAll() is called from pvPortMalloc(). Thanks to Daniel Braun
\r
2328 for highlighting this issue.
\r
2330 Changes between V2.5.2 and V2.5.3 - Released Nov 2, 2004
\r
2332 The critical section handling functions have been changed for the GCC ARM7
\r
2333 port. Some optimisation levels use the stack differently to others. This
\r
2334 means the interrupt flags cannot always be stored on the stack and are
\r
2335 instead now stored in a variable, which is then saved as part of the
\r
2336 tasks context. This allows the GCC ARM7 port to be used at all
\r
2337 optimisation levels - including -Os.
\r
2339 Other minor changes:
\r
2341 + MSP430 definition of usCriticalNesting now uses the volatile qualifier.
\r
2342 This is probably not required but added just in case.
\r
2344 Changes between V2.5.1 and V2.5.2 - Released Oct 26, 2004
\r
2346 + Added the Keil ARM7 port.
\r
2347 + Slight modification to comtest.c to make the delay periods more random.
\r
2348 This creates a better test condition.
\r
2350 Changes between V2.5.0 and V2.5.1 - Released Oct 9, 2004
\r
2352 + Added the MSP430 port.
\r
2353 + Extra comments added to the GCC ARM7 port.c and portISR.c files.
\r
2354 + The memory pool allocated within heap_1.c has been placed within a
\r
2355 structure to ensure correct memory alignment on 32bit systems.
\r
2356 + Within the GCC ARM7 serial drivers an extra check is made to ensure
\r
2357 the post to the queue was successful if then attempting immediately
\r
2358 retrieve the posted character.
\r
2359 + Changed the name of the constant portTICKS_PER_MS to portTICK_PERIOD_MS
\r
2360 as the old name was misleading.
\r
2363 Changes between V2.4.2 and V2.5.0 - Released Aug 12, 2004
\r
2365 The RTOS source code download now includes three separate memory allocation
\r
2366 schemes - so you can choose the most appropriate for your application.
\r
2367 These are found in the Source/Portable/MemMang directory. The demo
\r
2368 application projects have also been updated to demonstrate the new schemes.
\r
2369 See the "Memory Management" page of the API documentation for more details.
\r
2371 + Added heap_1.c, heap_2.c and heap_3.c in the Source/Portable/MemMang
\r
2373 + Replaced the portheap.c files for each demo application with one of the
\r
2374 new memory allocation files.
\r
2375 + Updated the portmacro.h file for each demo application to include the
\r
2376 constants required for the new memory allocators: portTOTAL_HEAP_SIZE and
\r
2377 portBYTE_ALIGNMENT.
\r
2378 + Added a new test to the ARM7 demo application that tests the operation
\r
2379 of the heap_2 memory allocator.
\r
2382 Changes between V2.4.1 and V2.4.2 - Released July 14, 2004
\r
2384 + The ARM7 port now supports THUMB mode.
\r
2385 + Modification to the ARM7 demo application serial port driver.
\r
2387 Changes between V2.4.0 and V2.4.1 - Released July 2, 2004
\r
2389 + Rationalised the ARM7 port version of portEXIT_CRITICAL() -
\r
2390 improvements provided by Bill Knight.
\r
2391 + Made demo serial driver more complete and robust.
\r
2394 Changes between V2.4.0 and V2.3.1 - Released June 30, 2004
\r
2396 + Added the first ARM7 port - thanks to Bill Knight for the assistance
\r
2398 + Added extra files to the Demo/Common/Minimal directory. These are
\r
2399 equivalent to their Demo/Common/Full counterparts but with the
\r
2400 calls to the functions defined in print.c removed.
\r
2401 + Added TABLAT to the list of registers saved as part of a PIC18 context.
\r
2403 Changes between V2.3.0 and V2.3.1 - Released June 25, 2004
\r
2405 + Changed the way the vector table is defined to be more portable.
\r
2406 + Corrected the definitions of SPH and SPL in portmacro.s90.
\r
2407 The previous definitions prevented V2.3.0 operating if the iom323.h
\r
2408 header file was included in portmacro.s90.
\r
2410 Changes between V2.2.0 and V2.3.0 - Released June 19, 2004
\r
2412 + Added an AVR port that uses the IAR compiler.
\r
2413 + Explicit use of 'signed' qualifier on plain char types.
\r
2414 + Modified the Open Watcom project files to use 'signed' as the
\r
2415 default char type.
\r
2416 + Changed odd calculation of initial pxTopOfStack value when
\r
2417 portSTACK_GROWTH < 0.
\r
2418 + Added inline qualifier to context switch functions within task.c.
\r
2419 Ports that do not support the (non ANSI) inline keyword have the
\r
2420 inline #define'd away in their respective portmacro.h files.
\r
2422 Changes between V2.1.1 and V2.2.0 - Released May 18, 2004
\r
2424 + Added Cygnal 8051 port.
\r
2425 + PCLATU and PCLATH are now saved as part of the PIC18 context. This
\r
2426 allows function pointers to be used within tasks. Thanks to Javier
\r
2427 Espeche for the enhancement.
\r
2428 + Minor changes to demo application files to reduce stack usage.
\r
2429 + Minor changes to prevent compiler warnings when compiling the new port.
\r
2431 Changes between V2.1.0 and V2.1.1 - Released March 12, 2004
\r
2433 + Bug fix - pxCurrentTCB is now initialised before the call to
\r
2434 prvInitialiseTaskLists(). Previously pxCurrentTCB could be accessed
\r
2435 while null during the initialisation sequence. Thanks to Giuseppe
\r
2436 Franco for the correction.
\r
2438 Changes between V2.0.0 and V2.1.0 - Released Feb 29, 2004
\r
2440 V2.1.0 has significant reworks that greatly reduce the amount of time
\r
2441 the kernel has interrupts disabled. The first section of modifications
\r
2442 listed here must be taken into account by users. The second section
\r
2443 are related to the kernel implementation and as such are transparent.
\r
2447 + The typedef TickType_t has been introduced. All delay times should
\r
2448 now use a variable of type TickType_t in place of the unsigned long's
\r
2449 used previously. API function prototypes have been updated
\r
2451 + The configuration macro USE_16_BIT_TICKS has been introduced. If set
\r
2452 to 1 TickType_t is defined as an unsigned short. If set to 0
\r
2453 TickType_t is defined as an unsigned long. See the configuration
\r
2454 section of the API documentation for more details.
\r
2455 + The configuration macro INCLUDE_vTaskSuspendAll is now obsolete.
\r
2456 + vTaskResumeAll() has been renamed cTaskResumeAll() as it now returns a
\r
2457 value (see the API documentation).
\r
2458 + ulTaskGetTickCount() has been renamed xTaskGetTickCount() as the type
\r
2459 it returns now depends on the USE_16_BIT_TICKS definition.
\r
2460 + cQueueReceive() must now >never< be used from within an ISR. Use the new
\r
2461 cQueueReceiveFromISR() function instead.
\r
2465 + A mechanism has been introduced that allows a queue to be accessed by
\r
2466 a task and ISR simultaneously.
\r
2467 + A "pending ready" queue has been introduced that enables interrupts to
\r
2468 be processed when the scheduler is suspended.
\r
2469 + The list implementation has been improved to provide faster item
\r
2471 + The scheduler now makes use of the scheduler suspend mechanism in places
\r
2472 where previously interrupts were disabled.
\r
2474 Changes between V1.2.6 and V2.0.0 - Released Jan 31, 2004
\r
2476 + Introduced new API functions:
\r
2477 vTaskPriorityGet ()
\r
2478 vTaskPrioritySet ()
\r
2481 vTaskSuspendAll ()
\r
2483 + Added conditional compilation options that allow the components of the
\r
2484 kernel that are unused by an application to be excluded from the build.
\r
2485 See the Configuration section on the WEB site for more information (on
\r
2486 the API pages). The macros have been added to each portmacro.h file (
\r
2487 sometimes called prtmacro.h).
\r
2488 + Rearranged tasks.c.
\r
2489 + Added demo application file dynamic.c.
\r
2490 + Updated the PC demo application to make use of dynamic.c.
\r
2491 + Updated the documentation contained in the kernel header files.
\r
2492 + Creating a task now causes a context switch if the task being created
\r
2493 has a higher priority than the calling task - assuming the kernel is
\r
2495 + vTaskDelete() now only causes a context switch if the calling task is
\r
2496 the task being deleted.
\r
2498 Changes between V1.2.5 and V1.2.6 - Released December 31, 2003
\r
2500 Barring the change to the interrupt vector (PIC port) these are minor
\r
2503 + The interrupt vector used for the PIC master ISR has been changed from
\r
2504 0x18 to 0x08 - where it should have always been. The incorrect address
\r
2505 still works but probably executes a number of NOP's before getting to the
\r
2507 + Changed the baud rate used by the AVR demo application to 38400. This
\r
2508 has an error percentage of less than one percent with an 8MHz clock.
\r
2509 + Raised the priority of the Rx task in demo\full\comtest.c. This only
\r
2510 affects the Flashlite and PC ports. This was done to prevent the Rx
\r
2511 buffer becoming full.
\r
2512 + Reverted the Flashlite COM port driver back so it does not use the DMA.
\r
2513 The DMA appears to miss characters under stress. The Borland Flashlite
\r
2514 port was also calculating a register value incorrectly resulting in the
\r
2515 wrong DMA source address being used. The same code worked fine when
\r
2516 compiling with Open Watcom. Other minor enhancements were made to the
\r
2517 interrupt handling.
\r
2518 + Modified the PIC serial Rx ISR to check for and clear overrun errors.
\r
2519 Overrun errors seem to prevent any further characters being received.
\r
2520 + The PIC demo projects now have some optimisation switched on.
\r
2523 Changes between V1.2.4 and V1.2.5
\r
2525 Small fix made to the PIC specific port.c file described below.
\r
2527 + Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global
\r
2528 interrupt flag setting. Using the two bits defined within
\r
2529 portINITAL_INTERRUPT_STATE was causing the w register to get clobbered
\r
2530 before the test was performed.
\r
2532 Changes between V1.2.3 and V1.2.4
\r
2534 V1.2.4 contains a release version of the PIC18 port.
\r
2535 An optional exception has been included with the GPL. See the licensing
\r
2536 section of www.FreeRTOS.org for details.
\r
2538 + The function xPortInitMinimal() has been renamed to
\r
2539 xSerialPortInitMinimal() and the function xPortInit() has been renamed
\r
2540 to xSerialPortInit().
\r
2541 + The function sSerialPutChar() has been renamed cSerialPutChar() and
\r
2542 the function return type chaned to portCHAR.
\r
2543 + The integer and flop tasks now include calls to tskYIELD(), allowing
\r
2544 them to be used with the cooperative scheduler.
\r
2545 + All the demo applications now use the integer and comtest tasks when the
\r
2546 cooperative scheduler is being used. Previously they were only used with
\r
2547 the preemptive scheduler.
\r
2548 + Minor changes made to operation of minimal versions of comtest.c and
\r
2550 + The ATMega port definition of portCPU_CLOSK_HZ definition changed to
\r
2551 8MHz base 10, previously it base 16.
\r
2555 Changes between V1.2.2a and V1.2.3
\r
2557 The only change of any significance is to the license, which has changed
\r
2558 from the Open Software License to the GNU GPL.
\r
2560 The zip file also contains a pre-release version of the PIC18 port. This
\r
2561 has not yet completed testing and as such does not constitute part of the
\r
2562 V1.2.3 release. It is still however covered by the GNU GPL.
\r
2564 There are minor source code changes to accommodate the PIC C compiler.
\r
2565 These mainly involve more explicit casting.
\r
2567 + sTaskCreate() has been modified slightly to make use of the
\r
2568 portSTACK_GROWTH macro. This is required for the PIC port where the
\r
2569 stack grows in the opposite direction to the other existing ports.
\r
2570 + prvCheckTasksWaitingTermination() has been modified slightly to bring
\r
2571 the decrementing of usCurrentNumberOfTasks within the critical section,
\r
2572 where it should have been since the creation of an eight bit port.
\r
2574 Changes between V1.2.2 and V1.2.2a
\r
2576 The makefile and buildcoff.bat files included with the AVR demo application
\r
2577 have been modified for use with the September 2003 build of WinAVR. No
\r
2578 source files have changed.
\r
2580 Changes between V1.2.1 and V1.2.2
\r
2582 There are only minor changes here to allow the PC and Flashlite 186 ports
\r
2583 to use the Borland V4.52 compiler, as supplied with the Flashlite 186
\r
2586 + Introduced a BCC directory under source\portable. This contains all the
\r
2587 files specific to the Borland compiler port.
\r
2588 + Corrected the macro naming of portMS_PER_TICK to portTICKS_PER_MS.
\r
2589 + Modified comtest.c to increase the rate at which the string is
\r
2590 transmitted and received on the serial port. The Flashlite 186 demo
\r
2591 app baud rate has also been increased.
\r
2592 + The values of the constants used in both integer.c files have been
\r
2593 increased to force the Borland compiler to use 32 bit values. The
\r
2594 Borland optimiser placed the previous values in 16 bit registers, and in
\r
2595 So doing invalidated the test.
\r
2597 Changes between V1.2.0 and V1.2.1
\r
2599 This version includes some minor changes to the list implementation aimed
\r
2600 at improving the context switch time - with is now approximately 10% faster.
\r
2601 Changes include the removal of some null pointer assignment checks. These
\r
2602 were redundant where the scheduler uses the list functions, but means any
\r
2603 user application choosing to use the same list functions must now check
\r
2604 that no NULL pointers are passed as a parameter.
\r
2606 The Flashlite 186 serial port driver has also been modified to use a DMA
\r
2607 channel for transmissions. The serial driver is fully functional but still
\r
2608 under development. Flashlite users may prefer to use V1.2.0 for now.
\r
2612 + Changed the baud rate for the ATMega323 serial test from 19200 to 57600.
\r
2613 + Use vSerialPutString() instead of single character puts in
\r
2614 Demo\Full\Comtest.c. This allows the use of the flashlite DMA serial
\r
2615 driver. Also the check variable only stops incrementing after two
\r
2616 consecutive failures.
\r
2617 + semtest.c creates four tasks, two of which operate at the idle priority.
\r
2618 The tasks that operate at the idle priority now use a lower expected
\r
2619 count than those running at a higher priority. This prevents the low
\r
2620 priority tasks from signalling an error because they have not been
\r
2621 scheduled enough time for each of them to count the shared variable to
\r
2622 the higher original value.
\r
2623 + The flashlite 186 serial driver now uses a DMA channel for transmissions.
\r
2624 + Removed the volatile modifier from the list function parameters. This was
\r
2625 only ever included to prevent compiler warnings. Now warnings are
\r
2626 removed by casting parameters where the calls are made.
\r
2627 + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been
\r
2628 removed from list.c and added as macros in list.h.
\r
2629 + usNumberOfItems has been added to the list structure. This removes the
\r
2630 need for a pointer comparison when checking if a list is empty, and so
\r
2631 is slightly faster.
\r
2632 + Removed the NULL check in vListRemove(). This makes the call faster but
\r
2633 necessitates any application code utilising the list implementation to
\r
2634 ensure NULL pointers are not passed.
\r
2635 + Renamed portTICKS_PER_MS definition to portMS_PER_TICK (milli seconds
\r
2636 per tick). This is what it always should have been.
\r
2638 Changes between V1.01 and V1.2.0
\r
2640 The majority of these changes were made to accommodate the 8bit AVR port.
\r
2641 The scheduler workings have not changed, but some of the data types used
\r
2642 have been made more friendly to an eight bit environment.
\r
2646 + Changed the version numbering format.
\r
2648 + Split the directory demo\common into demo\common\minimal and
\r
2649 demo\common\full. The files in the full directory are for systems with
\r
2650 a display (currently PC and Flashlite 186 demo's). The files in the
\r
2651 minimal directory are for systems with limited RAM and no display
\r
2652 (currently MegaAVR).
\r
2653 + Minor changes to demo application function prototypes to make more use
\r
2654 of 8bit data types.
\r
2655 + Within the scheduler itself the following functions have slightly
\r
2656 modified declarations to make use of 8bit data types where possible:
\r
2660 usQueueMessageWaiting(),
\r
2661 sQueueSendFromISR(),
\r
2664 sSemaphoreGiveFromISR(),
\r
2666 sTaskMoveFromEventList().
\r
2668 Where the return type has changed the function name has also changed in
\r
2669 accordance with the naming convention. For example
\r
2670 usQueueMessageWaiting() has become ucQueueMessageWaiting().
\r
2671 + The definition tskMAX_PRIORITIES has been moved from task.h to
\r
2672 portmacro.h and renamed portMAX_PRIORITIES. This allows different
\r
2673 ports to allocate a different maximum number of priorities.
\r
2674 + By default the trace facility is off, previously USE_TRACE_FACILITY
\r
2676 + comtest.c now uses a psuedo random delay between sends. This allows for
\r
2677 better testing as the interrupts do not arrive at regular intervals.
\r
2678 + Minor change to the Flashlite serial port driver. The driver is written
\r
2679 to demonstrate the scheduler and is not written to be efficient.
\r
2683 Changes between V1.00 and V1.01
\r
2685 These changes improve the ports. The scheduler itself has not changed.
\r
2687 Improved context switch mechanism used when performing a context
\r
2688 switch from an ISR (both the tick ISR and the serial comms ISR's within
\r
2689 the demo application). The new mechanism is faster and uses less stack.
\r
2691 The assembler file portasm.asm has been replaced by a header file
\r
2692 portasm.h. This includes a few assembler macro definitions.
\r
2694 All saving and restoring of registers onto/off of the stack is now handled
\r
2695 by the compiler. This means the initial stack setup for a task has to
\r
2696 mimic the stack used by the compiler, which is different for debug and
\r
2699 Slightly changed the operation of the demo application, details below.
\r
2703 + portSWITCH_CONTEXT() replaced by vPortFirstContext().
\r
2704 + pxPortInitialiseStack() modified to replicate the stack used by the
\r
2706 + portasm.asm file removed.
\r
2707 + portasm.h introduced. This contains macro definitions for
\r
2708 portSWITCH_CONTEXT() and portFIRST_CONTEXT().
\r
2709 + Context switch from ISR now uses the compiler generated interrupt
\r
2710 mechanism. This is done simply by calling portSWITCH_CONTEXT and leaving
\r
2711 the save/restore to compiler generated code.
\r
2712 + Calls to taskYIELD() during ISR's have been replaced by calling the
\r
2713 simpler and faster portSWITCH_CONTEXT().
\r
2714 + The Flashlite 186 port now uses 186 instruction set (used to use 80x86
\r
2715 instructions only).
\r
2716 + The blocking queue tasks within the demo application did not operate
\r
2717 quite as described. This has been corrected.
\r
2718 + The priority of the comtest Rx task within the demo application has been
\r
2719 lowered. Received characters are now processed (read from the queue) at
\r
2720 the idle priority, allowing low priority tasks to run evenly at times of
\r
2721 a high communications overhead.
\r
2722 + Prevent the call to kbhit() in main.c for debug builds as the debugger
\r
2723 seems to have problems stepping over the call. This if for the PC port
\r
projects / freertos / blob