2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /* FreeRTOS includes. */
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67 #include "FreeRTOS.h"
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70 /*-----------------------------------------------------------*/
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72 /* Count of the critical section nesting depth. */
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73 unsigned portLONG ulCriticalNesting = 9999;
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75 /*-----------------------------------------------------------*/
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77 /* Registers required to configure the RTI. */
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78 #define portRTI_GCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC00 ) )
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79 #define portRTI_TBCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC04 ) )
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80 #define portRTI_COMPCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC0C ) )
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81 #define portRTI_CNT0_FRC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC10 ) )
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82 #define portRTI_CNT0_UC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC14 ) )
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83 #define portRTI_CNT0_CPUC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC18 ) )
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84 #define portRTI_CNT0_COMP0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC50 ) )
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85 #define portRTI_CNT0_UDCP0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC54 ) )
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86 #define portRTI_SETINTENA_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC80 ) )
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87 #define portRTI_CLEARINTENA_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC84 ) )
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88 #define portRTI_INTFLAG_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC88 ) )
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91 /* Constants required to set up the initial stack of each task. */
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92 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1F )
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93 #define portINITIAL_FPSCR ( ( portSTACK_TYPE ) 0x00 )
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94 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0x04 )
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95 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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97 /* The number of words on the stack frame between the saved Top Of Stack and
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98 R0 (in which the parameters are passed. */
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99 #define portSPACE_BETWEEN_TOS_AND_PARAMETERS ( 12 )
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101 /*-----------------------------------------------------------*/
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103 /* vPortStartFirstSTask() is defined in portASM.asm */
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104 extern void vPortStartFirstTask( void );
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106 /*-----------------------------------------------------------*/
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108 /* Saved as part of the task context. Set to pdFALSE if the task does not
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109 require an FPU context. */
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110 unsigned long ulTaskHasFPUContext = 0;
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112 /*-----------------------------------------------------------*/
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116 * See header file for description.
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118 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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120 portSTACK_TYPE *pxOriginalTOS;
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122 pxOriginalTOS = pxTopOfStack;
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124 #if __TI_VFP_SUPPORT__
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126 /* Ensure the stack is correctly aligned on exit. */
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131 /* Setup the initial stack of the task. The stack is set exactly as
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132 expected by the portRESTORE_CONTEXT() macro. */
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134 /* First on the stack is the return address - which is the start of the as
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135 the task has not executed yet. The offset is added to make the return
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136 address appear as it would within an IRQ ISR. */
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137 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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140 *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */
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142 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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145 #ifdef portPRELOAD_TASK_REGISTERS
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147 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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149 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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151 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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153 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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155 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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157 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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159 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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161 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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163 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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165 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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167 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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169 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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174 pxTopOfStack -= portSPACE_BETWEEN_TOS_AND_PARAMETERS;
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178 /* Function parameters are passed in R0. */
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179 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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182 /* Set the status register for system mode, with interrupts enabled. */
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183 *pxTopOfStack = ( portSTACK_TYPE ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );
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185 if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )
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187 /* The task will start in thumb mode. */
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188 *pxTopOfStack |= portTHUMB_MODE_BIT;
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191 #ifdef __TI_VFP_SUPPORT__
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195 /* The last thing on the stack is the tasks ulUsingFPU value, which by
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196 default is set to indicate that the stack frame does not include FPU
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198 *pxTopOfStack = pdFALSE;
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202 return pxTopOfStack;
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204 /*-----------------------------------------------------------*/
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206 static void prvSetupTimerInterrupt(void)
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208 /* Disable timer 0. */
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209 portRTI_GCTRL_REG &= 0xFFFFFFFEUL;
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211 /* Use the internal counter. */
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212 portRTI_TBCTRL_REG = 0x00000000U;
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214 /* COMPSEL0 will use the RTIFRC0 counter. */
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215 portRTI_COMPCTRL_REG = 0x00000000U;
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217 /* Initialise the counter and the prescale counter registers. */
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218 portRTI_CNT0_UC0_REG = 0x00000000U;
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219 portRTI_CNT0_FRC0_REG = 0x00000000U;
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221 /* Set Prescalar for RTI clock. */
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222 portRTI_CNT0_CPUC0_REG = 0x00000001U;
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223 portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
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224 portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
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226 /* Clear interrupts. */
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227 portRTI_INTFLAG_REG = 0x0007000FU;
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228 portRTI_CLEARINTENA_REG = 0x00070F0FU;
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230 /* Enable the compare 0 interrupt. */
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231 portRTI_SETINTENA_REG = 0x00000001U;
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232 portRTI_GCTRL_REG |= 0x00000001U;
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234 /*-----------------------------------------------------------*/
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237 * See header file for description.
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239 portBASE_TYPE xPortStartScheduler(void)
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241 /* Start the timer that generates the tick ISR. */
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242 prvSetupTimerInterrupt();
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244 /* Reset the critical section nesting count read to execute the first task. */
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245 ulCriticalNesting = 0;
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247 /* Start the first task. This is done from portASM.asm as ARM mode must be
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249 vPortStartFirstTask();
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251 /* Should not get here! */
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254 /*-----------------------------------------------------------*/
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257 * See header file for description.
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259 void vPortEndScheduler(void)
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261 /* It is unlikely that the port will require this function as there
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262 is nothing to return to. */
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264 /*-----------------------------------------------------------*/
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266 #if configUSE_PREEMPTION == 0
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268 /* The cooperative scheduler requires a normal IRQ service routine to
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269 * simply increment the system tick. */
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270 __interrupt void vPortNonPreemptiveTick( void )
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272 /* clear clock interrupt flag */
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273 portRTI_INTFLAG_REG = 0x00000001;
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275 /* Increment the tick count - this may make a delaying task ready
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276 to run - but a context switch is not performed. */
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277 xTaskIncrementTick();
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283 **************************************************************************
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284 * The preemptive scheduler ISR is written in assembler and can be found
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285 * in the portASM.asm file. This will only get used if portUSE_PREEMPTION
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286 * is set to 1 in portmacro.h
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287 **************************************************************************
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289 void vPortPreemptiveTick( void );
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292 /*-----------------------------------------------------------*/
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296 * Disable interrupts, and keep a count of the nesting depth.
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298 void vPortEnterCritical( void )
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300 /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
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301 portDISABLE_INTERRUPTS();
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303 /* Now interrupts are disabled ulCriticalNesting can be accessed
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304 directly. Increment ulCriticalNesting to keep a count of how many times
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305 portENTER_CRITICAL() has been called. */
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306 ulCriticalNesting++;
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308 /*-----------------------------------------------------------*/
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311 * Decrement the critical nesting count, and if it has reached zero, re-enable
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314 void vPortExitCritical( void )
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316 if( ulCriticalNesting > 0 )
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318 /* Decrement the nesting count as we are leaving a critical section. */
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319 ulCriticalNesting--;
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321 /* If the nesting level has reached zero then interrupts should be
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323 if( ulCriticalNesting == 0 )
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325 /* Enable interrupts as per portENABLE_INTERRUPTS(). */
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326 portENABLE_INTERRUPTS();
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330 /*-----------------------------------------------------------*/
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332 #if __TI_VFP_SUPPORT__
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334 void vPortTaskUsesFPU( void )
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336 extern void vPortInitialiseFPSCR( void );
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338 /* A task is registering the fact that it needs an FPU context. Set the
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339 FPU flag (saved as part of the task context. */
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340 ulTaskHasFPUContext = pdTRUE;
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342 /* Initialise the floating point status register. */
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343 vPortInitialiseFPSCR();
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346 #endif /* __TI_VFP_SUPPORT__ */
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348 /*-----------------------------------------------------------*/
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