git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/CodeWarrior/HCS12/portmacro.h

   1 /*\r
   2     FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS provides completely free yet professionally developed,    *\r
  10      *    robust, strictly quality controlled, supported, and cross          *\r
  11      *    platform software that has become a de facto standard.             *\r
  12      *                                                                       *\r
  13      *    Help yourself get started quickly and support the FreeRTOS         *\r
  14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  16      *                                                                       *\r
  17      *    Thank you!                                                         *\r
  18      *                                                                       *\r
  19     ***************************************************************************\r
  20 \r
  21     This file is part of the FreeRTOS distribution.\r
  22 \r
  23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  24     the terms of the GNU General Public License (version 2) as published by the\r
  25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  26 \r
  27     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
  28     >>! a combined work that includes FreeRTOS without being obliged to provide\r
  29     >>! the source code for proprietary components outside of the FreeRTOS\r
  30     >>! kernel.\r
  31 \r
  32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  35     link: http://www.freertos.org/a00114.html\r
  36 \r
  37     1 tab == 4 spaces!\r
  38 \r
  39     ***************************************************************************\r
  40      *                                                                       *\r
  41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  42      *    not run, what could be wrong?"                                     *\r
  43      *                                                                       *\r
  44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  45      *                                                                       *\r
  46     ***************************************************************************\r
  47 \r
  48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  49     license and Real Time Engineers Ltd. contact details.\r
  50 \r
  51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  54 \r
  55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  57     licenses offer ticketed support, indemnification and middleware.\r
  58 \r
  59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  60     engineered and independently SIL3 certified version for use in safety and\r
  61     mission critical applications that require provable dependability.\r
  62 \r
  63     1 tab == 4 spaces!\r
  64 */\r
  65 \r
  66 \r
  67 #ifndef PORTMACRO_H\r
  68 #define PORTMACRO_H\r
  69 \r
  70 /*-----------------------------------------------------------\r
  71  * Port specific definitions.\r
  72  *\r
  73  * The settings in this file configure FreeRTOS correctly for the\r
  74  * given hardware and compiler.\r
  75  *\r
  76  * These settings should not be altered.\r
  77  *-----------------------------------------------------------\r
  78  */\r
  79 \r
  80 /* Type definitions. */\r
  81 #define portCHAR                char\r
  82 #define portFLOAT               float\r
  83 #define portDOUBLE              double\r
  84 #define portLONG                long\r
  85 #define portSHORT               short\r
  86 #define portSTACK_TYPE  uint8_t\r
  87 #define portBASE_TYPE   char\r
  88 \r
  89 typedef portSTACK_TYPE StackType_t;\r
  90 typedef signed char BaseType_t;\r
  91 typedef unsigned char UBaseType_t;\r
  92 \r
  93 #if( configUSE_16_BIT_TICKS == 1 )\r
  94         typedef uint16_t TickType_t;\r
  95         #define portMAX_DELAY ( TickType_t ) 0xffff\r
  96 #else\r
  97         typedef uint32_t TickType_t;\r
  98         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
  99 #endif\r
 100 /*-----------------------------------------------------------*/\r
 101 \r
 102 /* Hardware specifics. */\r
 103 #define portBYTE_ALIGNMENT                      1\r
 104 #define portSTACK_GROWTH                        ( -1 )\r
 105 #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 106 #define portYIELD()                                     __asm( "swi" );\r
 107 #define portNOP()                                       __asm( "nop" );\r
 108 /*-----------------------------------------------------------*/\r
 109 \r
 110 /* Critical section handling. */\r
 111 #define portENABLE_INTERRUPTS()                         __asm( "cli" )\r
 112 #define portDISABLE_INTERRUPTS()                        __asm( "sei" )\r
 113 \r
 114 /*\r
 115  * Disable interrupts before incrementing the count of critical section nesting.\r
 116  * The nesting count is maintained so we know when interrupts should be\r
 117  * re-enabled.  Once interrupts are disabled the nesting count can be accessed\r
 118  * directly.  Each task maintains its own nesting count.\r
 119  */\r
 120 #define portENTER_CRITICAL()                                                                    \\r
 121 {                                                                                                                               \\r
 122         extern volatile UBaseType_t uxCriticalNesting;  \\r
 123                                                                                                                                 \\r
 124         portDISABLE_INTERRUPTS();                                                                       \\r
 125         uxCriticalNesting++;                                                                            \\r
 126 }\r
 127 \r
 128 /*\r
 129  * Interrupts are disabled so we can access the nesting count directly.  If the\r
 130  * nesting is found to be 0 (no nesting) then we are leaving the critical\r
 131  * section and interrupts can be re-enabled.\r
 132  */\r
 133 #define  portEXIT_CRITICAL()                                                                    \\r
 134 {                                                                                                                               \\r
 135         extern volatile UBaseType_t uxCriticalNesting;  \\r
 136                                                                                                                                 \\r
 137         uxCriticalNesting--;                                                                            \\r
 138         if( uxCriticalNesting == 0 )                                                            \\r
 139         {                                                                                                                       \\r
 140                 portENABLE_INTERRUPTS();                                                                \\r
 141         }                                                                                                                       \\r
 142 }\r
 143 /*-----------------------------------------------------------*/\r
 144 \r
 145 /* Task utilities. */\r
 146 \r
 147 /*\r
 148  * These macros are very simple as the processor automatically saves and\r
 149  * restores its registers as interrupts are entered and exited.  In\r
 150  * addition to the (automatically stacked) registers we also stack the\r
 151  * critical nesting count.  Each task maintains its own critical nesting\r
 152  * count as it is legitimate for a task to yield from within a critical\r
 153  * section.  If the banked memory model is being used then the PPAGE\r
 154  * register is also stored as part of the tasks context.\r
 155  */\r
 156 \r
 157 #ifdef BANKED_MODEL\r
 158         /*\r
 159          * Load the stack pointer for the task, then pull the critical nesting\r
 160          * count and PPAGE register from the stack.  The remains of the\r
 161          * context are restored by the RTI instruction.\r
 162          */\r
 163         #define portRESTORE_CONTEXT()                                                                   \\r
 164         {                                                                                                                               \\r
 165                 extern volatile void * pxCurrentTCB;                                            \\r
 166                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 167                                                                                                                                         \\r
 168                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 169                 __asm( "lds 0, x" );                                                                            \\r
 170                 __asm( "pula" );                                                                                        \\r
 171                 __asm( "staa uxCriticalNesting" );                                                      \\r
 172                 __asm( "pula" );                                                                                        \\r
 173                 __asm( "staa 0x30" ); /* 0x30 = PPAGE */                                        \\r
 174         }\r
 175 \r
 176         /*\r
 177          * By the time this macro is called the processor has already stacked the\r
 178          * registers.  Simply stack the nesting count and PPAGE value, then save\r
 179          * the task stack pointer.\r
 180          */\r
 181         #define portSAVE_CONTEXT()                                                                              \\r
 182         {                                                                                                                               \\r
 183                 extern volatile void * pxCurrentTCB;                                            \\r
 184                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 185                                                                                                                                         \\r
 186                 __asm( "ldaa 0x30" );  /* 0x30 = PPAGE */                                       \\r
 187                 __asm( "psha" );                                                                                        \\r
 188                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
 189                 __asm( "psha" );                                                                                        \\r
 190                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 191                 __asm( "sts 0, x" );                                                                            \\r
 192         }\r
 193 #else\r
 194 \r
 195         /*\r
 196          * These macros are as per the BANKED versions above, but without saving\r
 197          * and restoring the PPAGE register.\r
 198          */\r
 199 \r
 200         #define portRESTORE_CONTEXT()                                                                   \\r
 201         {                                                                                                                               \\r
 202                 extern volatile void * pxCurrentTCB;                                            \\r
 203                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 204                                                                                                                                         \\r
 205                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 206                 __asm( "lds 0, x" );                                                                            \\r
 207                 __asm( "pula" );                                                                                        \\r
 208                 __asm( "staa uxCriticalNesting" );                                                      \\r
 209         }\r
 210 \r
 211         #define portSAVE_CONTEXT()                                                                              \\r
 212         {                                                                                                                               \\r
 213                 extern volatile void * pxCurrentTCB;                                            \\r
 214                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 215                                                                                                                                         \\r
 216                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
 217                 __asm( "psha" );                                                                                        \\r
 218                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 219                 __asm( "sts 0, x" );                                                                            \\r
 220         }\r
 221 #endif\r
 222 \r
 223 /*\r
 224  * Utility macro to call macros above in correct order in order to perform a\r
 225  * task switch from within a standard ISR.  This macro can only be used if\r
 226  * the ISR does not use any local (stack) variables.  If the ISR uses stack\r
 227  * variables portYIELD() should be used in it's place.\r
 228  */\r
 229 #define portTASK_SWITCH_FROM_ISR()                                                              \\r
 230         portSAVE_CONTEXT();                                                                                     \\r
 231         vTaskSwitchContext();                                                                           \\r
 232         portRESTORE_CONTEXT();\r
 233 \r
 234 \r
 235 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
 236 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 237 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 238 \r
 239 #endif /* PORTMACRO_H */\r
 240 \r