git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/CodeWarrior/HCS12/portmacro.h

   1 /*\r
   2  * FreeRTOS Kernel V10.1.1\r
   3  * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   6  * this software and associated documentation files (the "Software"), to deal in\r
   7  * the Software without restriction, including without limitation the rights to\r
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
   9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  10  * subject to the following conditions:\r
  11  *\r
  12  * The above copyright notice and this permission notice shall be included in all\r
  13  * copies or substantial portions of the Software.\r
  14  *\r
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  21  *\r
  22  * http://www.FreeRTOS.org\r
  23  * http://aws.amazon.com/freertos\r
  24  *\r
  25  * 1 tab == 4 spaces!\r
  26  */\r
  27 \r
  28 \r
  29 #ifndef PORTMACRO_H\r
  30 #define PORTMACRO_H\r
  31 \r
  32 /*-----------------------------------------------------------\r
  33  * Port specific definitions.\r
  34  *\r
  35  * The settings in this file configure FreeRTOS correctly for the\r
  36  * given hardware and compiler.\r
  37  *\r
  38  * These settings should not be altered.\r
  39  *-----------------------------------------------------------\r
  40  */\r
  41 \r
  42 /* Type definitions. */\r
  43 #define portCHAR                char\r
  44 #define portFLOAT               float\r
  45 #define portDOUBLE              double\r
  46 #define portLONG                long\r
  47 #define portSHORT               short\r
  48 #define portSTACK_TYPE  uint8_t\r
  49 #define portBASE_TYPE   char\r
  50 \r
  51 typedef portSTACK_TYPE StackType_t;\r
  52 typedef signed char BaseType_t;\r
  53 typedef unsigned char UBaseType_t;\r
  54 \r
  55 #if( configUSE_16_BIT_TICKS == 1 )\r
  56         typedef uint16_t TickType_t;\r
  57         #define portMAX_DELAY ( TickType_t ) 0xffff\r
  58 #else\r
  59         typedef uint32_t TickType_t;\r
  60         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
  61 #endif\r
  62 /*-----------------------------------------------------------*/\r
  63 \r
  64 /* Hardware specifics. */\r
  65 #define portBYTE_ALIGNMENT                      1\r
  66 #define portSTACK_GROWTH                        ( -1 )\r
  67 #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
  68 #define portYIELD()                                     __asm( "swi" );\r
  69 #define portNOP()                                       __asm( "nop" );\r
  70 /*-----------------------------------------------------------*/\r
  71 \r
  72 /* Critical section handling. */\r
  73 #define portENABLE_INTERRUPTS()                         __asm( "cli" )\r
  74 #define portDISABLE_INTERRUPTS()                        __asm( "sei" )\r
  75 \r
  76 /*\r
  77  * Disable interrupts before incrementing the count of critical section nesting.\r
  78  * The nesting count is maintained so we know when interrupts should be\r
  79  * re-enabled.  Once interrupts are disabled the nesting count can be accessed\r
  80  * directly.  Each task maintains its own nesting count.\r
  81  */\r
  82 #define portENTER_CRITICAL()                                                                    \\r
  83 {                                                                                                                               \\r
  84         extern volatile UBaseType_t uxCriticalNesting;  \\r
  85                                                                                                                                 \\r
  86         portDISABLE_INTERRUPTS();                                                                       \\r
  87         uxCriticalNesting++;                                                                            \\r
  88 }\r
  89 \r
  90 /*\r
  91  * Interrupts are disabled so we can access the nesting count directly.  If the\r
  92  * nesting is found to be 0 (no nesting) then we are leaving the critical\r
  93  * section and interrupts can be re-enabled.\r
  94  */\r
  95 #define  portEXIT_CRITICAL()                                                                    \\r
  96 {                                                                                                                               \\r
  97         extern volatile UBaseType_t uxCriticalNesting;  \\r
  98                                                                                                                                 \\r
  99         uxCriticalNesting--;                                                                            \\r
 100         if( uxCriticalNesting == 0 )                                                            \\r
 101         {                                                                                                                       \\r
 102                 portENABLE_INTERRUPTS();                                                                \\r
 103         }                                                                                                                       \\r
 104 }\r
 105 /*-----------------------------------------------------------*/\r
 106 \r
 107 /* Task utilities. */\r
 108 \r
 109 /*\r
 110  * These macros are very simple as the processor automatically saves and\r
 111  * restores its registers as interrupts are entered and exited.  In\r
 112  * addition to the (automatically stacked) registers we also stack the\r
 113  * critical nesting count.  Each task maintains its own critical nesting\r
 114  * count as it is legitimate for a task to yield from within a critical\r
 115  * section.  If the banked memory model is being used then the PPAGE\r
 116  * register is also stored as part of the tasks context.\r
 117  */\r
 118 \r
 119 #ifdef BANKED_MODEL\r
 120         /*\r
 121          * Load the stack pointer for the task, then pull the critical nesting\r
 122          * count and PPAGE register from the stack.  The remains of the\r
 123          * context are restored by the RTI instruction.\r
 124          */\r
 125         #define portRESTORE_CONTEXT()                                                                   \\r
 126         {                                                                                                                               \\r
 127                 extern volatile void * pxCurrentTCB;                                            \\r
 128                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 129                                                                                                                                         \\r
 130                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 131                 __asm( "lds 0, x" );                                                                            \\r
 132                 __asm( "pula" );                                                                                        \\r
 133                 __asm( "staa uxCriticalNesting" );                                                      \\r
 134                 __asm( "pula" );                                                                                        \\r
 135                 __asm( "staa 0x30" ); /* 0x30 = PPAGE */                                        \\r
 136         }\r
 137 \r
 138         /*\r
 139          * By the time this macro is called the processor has already stacked the\r
 140          * registers.  Simply stack the nesting count and PPAGE value, then save\r
 141          * the task stack pointer.\r
 142          */\r
 143         #define portSAVE_CONTEXT()                                                                              \\r
 144         {                                                                                                                               \\r
 145                 extern volatile void * pxCurrentTCB;                                            \\r
 146                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 147                                                                                                                                         \\r
 148                 __asm( "ldaa 0x30" );  /* 0x30 = PPAGE */                                       \\r
 149                 __asm( "psha" );                                                                                        \\r
 150                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
 151                 __asm( "psha" );                                                                                        \\r
 152                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 153                 __asm( "sts 0, x" );                                                                            \\r
 154         }\r
 155 #else\r
 156 \r
 157         /*\r
 158          * These macros are as per the BANKED versions above, but without saving\r
 159          * and restoring the PPAGE register.\r
 160          */\r
 161 \r
 162         #define portRESTORE_CONTEXT()                                                                   \\r
 163         {                                                                                                                               \\r
 164                 extern volatile void * pxCurrentTCB;                                            \\r
 165                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 166                                                                                                                                         \\r
 167                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 168                 __asm( "lds 0, x" );                                                                            \\r
 169                 __asm( "pula" );                                                                                        \\r
 170                 __asm( "staa uxCriticalNesting" );                                                      \\r
 171         }\r
 172 \r
 173         #define portSAVE_CONTEXT()                                                                              \\r
 174         {                                                                                                                               \\r
 175                 extern volatile void * pxCurrentTCB;                                            \\r
 176                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 177                                                                                                                                         \\r
 178                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
 179                 __asm( "psha" );                                                                                        \\r
 180                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 181                 __asm( "sts 0, x" );                                                                            \\r
 182         }\r
 183 #endif\r
 184 \r
 185 /*\r
 186  * Utility macro to call macros above in correct order in order to perform a\r
 187  * task switch from within a standard ISR.  This macro can only be used if\r
 188  * the ISR does not use any local (stack) variables.  If the ISR uses stack\r
 189  * variables portYIELD() should be used in it's place.\r
 190  */\r
 191 #define portTASK_SWITCH_FROM_ISR()                                                              \\r
 192         portSAVE_CONTEXT();                                                                                     \\r
 193         vTaskSwitchContext();                                                                           \\r
 194         portRESTORE_CONTEXT();\r
 195 \r
 196 \r
 197 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
 198 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 199 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 200 \r
 201 #endif /* PORTMACRO_H */\r
 202 \r