git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/CodeWarrior/HCS12/portmacro.h

   1 /*\r
   2     FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  12 \r
  13     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  14     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  15     >>!   obliged to provide the source code for proprietary components     !<<\r
  16     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  17 \r
  18     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  19     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  20     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  21     link: http://www.freertos.org/a00114.html\r
  22 \r
  23     1 tab == 4 spaces!\r
  24 \r
  25     ***************************************************************************\r
  26      *                                                                       *\r
  27      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  28      *    not run, what could be wrong?".  Have you defined configASSERT()?  *\r
  29      *                                                                       *\r
  30      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  31      *                                                                       *\r
  32     ***************************************************************************\r
  33 \r
  34     ***************************************************************************\r
  35      *                                                                       *\r
  36      *    FreeRTOS provides completely free yet professionally developed,    *\r
  37      *    robust, strictly quality controlled, supported, and cross          *\r
  38      *    platform software that is more than just the market leader, it     *\r
  39      *    is the industry's de facto standard.                               *\r
  40      *                                                                       *\r
  41      *    Help yourself get started quickly while simultaneously helping     *\r
  42      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
  43      *    tutorial book, reference manual, or both:                          *\r
  44      *    http://www.FreeRTOS.org/Documentation                              *\r
  45      *                                                                       *\r
  46     ***************************************************************************\r
  47 \r
  48     ***************************************************************************\r
  49      *                                                                       *\r
  50      *   Investing in training allows your team to be as productive as       *\r
  51      *   possible as early as possible, lowering your overall development    *\r
  52      *   cost, and enabling you to bring a more robust product to market     *\r
  53      *   earlier than would otherwise be possible.  Richard Barry is both    *\r
  54      *   the architect and key author of FreeRTOS, and so also the world's   *\r
  55      *   leading authority on what is the world's most popular real time     *\r
  56      *   kernel for deeply embedded MCU designs.  Obtaining your training    *\r
  57      *   from Richard ensures your team will gain directly from his in-depth *\r
  58      *   product knowledge and years of usage experience.  Contact Real Time *\r
  59      *   Engineers Ltd to enquire about the FreeRTOS Masterclass, presented  *\r
  60      *   by Richard Barry:  http://www.FreeRTOS.org/contact\r
  61      *                                                                       *\r
  62     ***************************************************************************\r
  63 \r
  64     ***************************************************************************\r
  65      *                                                                       *\r
  66      *    You are receiving this top quality software for free.  Please play *\r
  67      *    fair and reciprocate by reporting any suspected issues and         *\r
  68      *    participating in the community forum:                              *\r
  69      *    http://www.FreeRTOS.org/support                                    *\r
  70      *                                                                       *\r
  71      *    Thank you!                                                         *\r
  72      *                                                                       *\r
  73     ***************************************************************************\r
  74 \r
  75     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  76     license and Real Time Engineers Ltd. contact details.\r
  77 \r
  78     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  79     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  80     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  81 \r
  82     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
  83     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
  84 \r
  85     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  86     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  87     licenses offer ticketed support, indemnification and commercial middleware.\r
  88 \r
  89     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  90     engineered and independently SIL3 certified version for use in safety and\r
  91     mission critical applications that require provable dependability.\r
  92 \r
  93     1 tab == 4 spaces!\r
  94 */\r
  95 \r
  96 \r
  97 #ifndef PORTMACRO_H\r
  98 #define PORTMACRO_H\r
  99 \r
 100 /*-----------------------------------------------------------\r
 101  * Port specific definitions.\r
 102  *\r
 103  * The settings in this file configure FreeRTOS correctly for the\r
 104  * given hardware and compiler.\r
 105  *\r
 106  * These settings should not be altered.\r
 107  *-----------------------------------------------------------\r
 108  */\r
 109 \r
 110 /* Type definitions. */\r
 111 #define portCHAR                char\r
 112 #define portFLOAT               float\r
 113 #define portDOUBLE              double\r
 114 #define portLONG                long\r
 115 #define portSHORT               short\r
 116 #define portSTACK_TYPE  uint8_t\r
 117 #define portBASE_TYPE   char\r
 118 \r
 119 typedef portSTACK_TYPE StackType_t;\r
 120 typedef signed char BaseType_t;\r
 121 typedef unsigned char UBaseType_t;\r
 122 \r
 123 #if( configUSE_16_BIT_TICKS == 1 )\r
 124         typedef uint16_t TickType_t;\r
 125         #define portMAX_DELAY ( TickType_t ) 0xffff\r
 126 #else\r
 127         typedef uint32_t TickType_t;\r
 128         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 129 #endif\r
 130 /*-----------------------------------------------------------*/\r
 131 \r
 132 /* Hardware specifics. */\r
 133 #define portBYTE_ALIGNMENT                      1\r
 134 #define portSTACK_GROWTH                        ( -1 )\r
 135 #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 136 #define portYIELD()                                     __asm( "swi" );\r
 137 #define portNOP()                                       __asm( "nop" );\r
 138 /*-----------------------------------------------------------*/\r
 139 \r
 140 /* Critical section handling. */\r
 141 #define portENABLE_INTERRUPTS()                         __asm( "cli" )\r
 142 #define portDISABLE_INTERRUPTS()                        __asm( "sei" )\r
 143 \r
 144 /*\r
 145  * Disable interrupts before incrementing the count of critical section nesting.\r
 146  * The nesting count is maintained so we know when interrupts should be\r
 147  * re-enabled.  Once interrupts are disabled the nesting count can be accessed\r
 148  * directly.  Each task maintains its own nesting count.\r
 149  */\r
 150 #define portENTER_CRITICAL()                                                                    \\r
 151 {                                                                                                                               \\r
 152         extern volatile UBaseType_t uxCriticalNesting;  \\r
 153                                                                                                                                 \\r
 154         portDISABLE_INTERRUPTS();                                                                       \\r
 155         uxCriticalNesting++;                                                                            \\r
 156 }\r
 157 \r
 158 /*\r
 159  * Interrupts are disabled so we can access the nesting count directly.  If the\r
 160  * nesting is found to be 0 (no nesting) then we are leaving the critical\r
 161  * section and interrupts can be re-enabled.\r
 162  */\r
 163 #define  portEXIT_CRITICAL()                                                                    \\r
 164 {                                                                                                                               \\r
 165         extern volatile UBaseType_t uxCriticalNesting;  \\r
 166                                                                                                                                 \\r
 167         uxCriticalNesting--;                                                                            \\r
 168         if( uxCriticalNesting == 0 )                                                            \\r
 169         {                                                                                                                       \\r
 170                 portENABLE_INTERRUPTS();                                                                \\r
 171         }                                                                                                                       \\r
 172 }\r
 173 /*-----------------------------------------------------------*/\r
 174 \r
 175 /* Task utilities. */\r
 176 \r
 177 /*\r
 178  * These macros are very simple as the processor automatically saves and\r
 179  * restores its registers as interrupts are entered and exited.  In\r
 180  * addition to the (automatically stacked) registers we also stack the\r
 181  * critical nesting count.  Each task maintains its own critical nesting\r
 182  * count as it is legitimate for a task to yield from within a critical\r
 183  * section.  If the banked memory model is being used then the PPAGE\r
 184  * register is also stored as part of the tasks context.\r
 185  */\r
 186 \r
 187 #ifdef BANKED_MODEL\r
 188         /*\r
 189          * Load the stack pointer for the task, then pull the critical nesting\r
 190          * count and PPAGE register from the stack.  The remains of the\r
 191          * context are restored by the RTI instruction.\r
 192          */\r
 193         #define portRESTORE_CONTEXT()                                                                   \\r
 194         {                                                                                                                               \\r
 195                 extern volatile void * pxCurrentTCB;                                            \\r
 196                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 197                                                                                                                                         \\r
 198                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 199                 __asm( "lds 0, x" );                                                                            \\r
 200                 __asm( "pula" );                                                                                        \\r
 201                 __asm( "staa uxCriticalNesting" );                                                      \\r
 202                 __asm( "pula" );                                                                                        \\r
 203                 __asm( "staa 0x30" ); /* 0x30 = PPAGE */                                        \\r
 204         }\r
 205 \r
 206         /*\r
 207          * By the time this macro is called the processor has already stacked the\r
 208          * registers.  Simply stack the nesting count and PPAGE value, then save\r
 209          * the task stack pointer.\r
 210          */\r
 211         #define portSAVE_CONTEXT()                                                                              \\r
 212         {                                                                                                                               \\r
 213                 extern volatile void * pxCurrentTCB;                                            \\r
 214                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 215                                                                                                                                         \\r
 216                 __asm( "ldaa 0x30" );  /* 0x30 = PPAGE */                                       \\r
 217                 __asm( "psha" );                                                                                        \\r
 218                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
 219                 __asm( "psha" );                                                                                        \\r
 220                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 221                 __asm( "sts 0, x" );                                                                            \\r
 222         }\r
 223 #else\r
 224 \r
 225         /*\r
 226          * These macros are as per the BANKED versions above, but without saving\r
 227          * and restoring the PPAGE register.\r
 228          */\r
 229 \r
 230         #define portRESTORE_CONTEXT()                                                                   \\r
 231         {                                                                                                                               \\r
 232                 extern volatile void * pxCurrentTCB;                                            \\r
 233                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 234                                                                                                                                         \\r
 235                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 236                 __asm( "lds 0, x" );                                                                            \\r
 237                 __asm( "pula" );                                                                                        \\r
 238                 __asm( "staa uxCriticalNesting" );                                                      \\r
 239         }\r
 240 \r
 241         #define portSAVE_CONTEXT()                                                                              \\r
 242         {                                                                                                                               \\r
 243                 extern volatile void * pxCurrentTCB;                                            \\r
 244                 extern volatile UBaseType_t uxCriticalNesting;  \\r
 245                                                                                                                                         \\r
 246                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
 247                 __asm( "psha" );                                                                                        \\r
 248                 __asm( "ldx pxCurrentTCB" );                                                            \\r
 249                 __asm( "sts 0, x" );                                                                            \\r
 250         }\r
 251 #endif\r
 252 \r
 253 /*\r
 254  * Utility macro to call macros above in correct order in order to perform a\r
 255  * task switch from within a standard ISR.  This macro can only be used if\r
 256  * the ISR does not use any local (stack) variables.  If the ISR uses stack\r
 257  * variables portYIELD() should be used in it's place.\r
 258  */\r
 259 #define portTASK_SWITCH_FROM_ISR()                                                              \\r
 260         portSAVE_CONTEXT();                                                                                     \\r
 261         vTaskSwitchContext();                                                                           \\r
 262         portRESTORE_CONTEXT();\r
 263 \r
 264 \r
 265 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
 266 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 267 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 268 \r
 269 #endif /* PORTMACRO_H */\r
 270 \r