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1 /*\r
2     FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
3         \r
4 \r
5     ***************************************************************************\r
6      *                                                                       *\r
7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
8      *    Complete, revised, and edited pdf reference manuals are also       *\r
9      *    available.                                                         *\r
10      *                                                                       *\r
11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
12      *    ensuring you get running as quickly as possible and with an        *\r
13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
14      *    the FreeRTOS project to continue with its mission of providing     *\r
15      *    professional grade, cross platform, de facto standard solutions    *\r
16      *    for microcontrollers - completely free of charge!                  *\r
17      *                                                                       *\r
18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
19      *                                                                       *\r
20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
21      *                                                                       *\r
22     ***************************************************************************\r
23 \r
24 \r
25     This file is part of the FreeRTOS distribution.\r
26 \r
27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
28     the terms of the GNU General Public License (version 2) as published by the\r
29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
31     distribute a combined work that includes FreeRTOS without being obliged to\r
32     provide the source code for proprietary components outside of the FreeRTOS\r
33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
36     more details. You should have received a copy of the GNU General Public\r
37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
39     by writing to Richard Barry, contact details for whom are available on the\r
40     FreeRTOS WEB site.\r
41 \r
42     1 tab == 4 spaces!\r
43     \r
44     ***************************************************************************\r
45      *                                                                       *\r
46      *    Having a problem?  Start by reading the FAQ "My application does   *\r
47      *    not run, what could be wrong?                                      *\r
48      *                                                                       *\r
49      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
50      *                                                                       *\r
51     ***************************************************************************\r
52 \r
53     \r
54     http://www.FreeRTOS.org - Documentation, training, latest information, \r
55     license and contact details.\r
56     \r
57     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
58     including FreeRTOS+Trace - an indispensable productivity tool.\r
59 \r
60     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
61     the code with commercial support, indemnification, and middleware, under \r
62     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
63     provide a safety engineered and independently SIL3 certified version under \r
64     the SafeRTOS brand: http://www.SafeRTOS.com.\r
65 */\r
66 \r
67 \r
68 #ifndef PORTMACRO_H\r
69 #define PORTMACRO_H\r
70 \r
71 /*-----------------------------------------------------------\r
72  * Port specific definitions.  \r
73  *\r
74  * The settings in this file configure FreeRTOS correctly for the\r
75  * given hardware and compiler.\r
76  *\r
77  * These settings should not be altered.\r
78  *-----------------------------------------------------------\r
79  */\r
80 \r
81 /* Type definitions. */\r
82 #define portCHAR                char\r
83 #define portFLOAT               float\r
84 #define portDOUBLE              double\r
85 #define portLONG                long\r
86 #define portSHORT               short\r
87 #define portSTACK_TYPE  unsigned portCHAR\r
88 #define portBASE_TYPE   char\r
89 \r
90 #if( configUSE_16_BIT_TICKS == 1 )\r
91         typedef unsigned portSHORT portTickType;\r
92         #define portMAX_DELAY ( portTickType ) 0xffff\r
93 #else\r
94         typedef unsigned portLONG portTickType;\r
95         #define portMAX_DELAY ( portTickType ) 0xffffffff\r
96 #endif\r
97 /*-----------------------------------------------------------*/\r
98 \r
99 /* Hardware specifics. */\r
100 #define portBYTE_ALIGNMENT                      1\r
101 #define portSTACK_GROWTH                        ( -1 )\r
102 #define portTICK_RATE_MS                        ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
103 #define portYIELD()                                     __asm( "swi" );\r
104 #define portNOP()                                       __asm( "nop" );\r
105 /*-----------------------------------------------------------*/\r
106 \r
107 /* Critical section handling. */\r
108 #define portENABLE_INTERRUPTS()                         __asm( "cli" )  \r
109 #define portDISABLE_INTERRUPTS()                        __asm( "sei" )\r
110 \r
111 /*\r
112  * Disable interrupts before incrementing the count of critical section nesting.\r
113  * The nesting count is maintained so we know when interrupts should be\r
114  * re-enabled.  Once interrupts are disabled the nesting count can be accessed\r
115  * directly.  Each task maintains its own nesting count.\r
116  */\r
117 #define portENTER_CRITICAL()                                                                    \\r
118 {                                                                                                                               \\r
119         extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
120                                                                                                                                 \\r
121         portDISABLE_INTERRUPTS();                                                                       \\r
122         uxCriticalNesting++;                                                                            \\r
123 }\r
124 \r
125 /*\r
126  * Interrupts are disabled so we can access the nesting count directly.  If the\r
127  * nesting is found to be 0 (no nesting) then we are leaving the critical \r
128  * section and interrupts can be re-enabled.\r
129  */\r
130 #define  portEXIT_CRITICAL()                                                                    \\r
131 {                                                                                                                               \\r
132         extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
133                                                                                                                                 \\r
134         uxCriticalNesting--;                                                                            \\r
135         if( uxCriticalNesting == 0 )                                                            \\r
136         {                                                                                                                       \\r
137                 portENABLE_INTERRUPTS();                                                                \\r
138         }                                                                                                                       \\r
139 }\r
140 /*-----------------------------------------------------------*/\r
141 \r
142 /* Task utilities. */\r
143 \r
144 /* \r
145  * These macros are very simple as the processor automatically saves and \r
146  * restores its registers as interrupts are entered and exited.  In\r
147  * addition to the (automatically stacked) registers we also stack the \r
148  * critical nesting count.  Each task maintains its own critical nesting\r
149  * count as it is legitimate for a task to yield from within a critical\r
150  * section.  If the banked memory model is being used then the PPAGE\r
151  * register is also stored as part of the tasks context.\r
152  */\r
153 \r
154 #ifdef BANKED_MODEL\r
155         /* \r
156          * Load the stack pointer for the task, then pull the critical nesting\r
157          * count and PPAGE register from the stack.  The remains of the \r
158          * context are restored by the RTI instruction.\r
159          */\r
160         #define portRESTORE_CONTEXT()                                                                   \\r
161         {                                                                                                                               \\r
162                 extern volatile void * pxCurrentTCB;                                            \\r
163                 extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
164                                                                                                                                         \\r
165                 __asm( "ldx pxCurrentTCB" );                                                            \\r
166                 __asm( "lds 0, x" );                                                                            \\r
167                 __asm( "pula" );                                                                                        \\r
168                 __asm( "staa uxCriticalNesting" );                                                      \\r
169                 __asm( "pula" );                                                                                        \\r
170                 __asm( "staa 0x30" ); /* 0x30 = PPAGE */                                        \\r
171         }\r
172 \r
173         /* \r
174          * By the time this macro is called the processor has already stacked the\r
175          * registers.  Simply stack the nesting count and PPAGE value, then save \r
176          * the task stack pointer.\r
177          */\r
178         #define portSAVE_CONTEXT()                                                                              \\r
179         {                                                                                                                               \\r
180                 extern volatile void * pxCurrentTCB;                                            \\r
181                 extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
182                                                                                                                                         \\r
183                 __asm( "ldaa 0x30" );  /* 0x30 = PPAGE */                                       \\r
184                 __asm( "psha" );                                                                                        \\r
185                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
186                 __asm( "psha" );                                                                                        \\r
187                 __asm( "ldx pxCurrentTCB" );                                                            \\r
188                 __asm( "sts 0, x" );                                                                            \\r
189         }\r
190 #else\r
191 \r
192         /* \r
193          * These macros are as per the BANKED versions above, but without saving\r
194          * and restoring the PPAGE register.\r
195          */\r
196 \r
197         #define portRESTORE_CONTEXT()                                                                   \\r
198         {                                                                                                                               \\r
199                 extern volatile void * pxCurrentTCB;                                            \\r
200                 extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
201                                                                                                                                         \\r
202                 __asm( "ldx pxCurrentTCB" );                                                            \\r
203                 __asm( "lds 0, x" );                                                                            \\r
204                 __asm( "pula" );                                                                                        \\r
205                 __asm( "staa uxCriticalNesting" );                                                      \\r
206         }\r
207 \r
208         #define portSAVE_CONTEXT()                                                                              \\r
209         {                                                                                                                               \\r
210                 extern volatile void * pxCurrentTCB;                                            \\r
211                 extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
212                                                                                                                                         \\r
213                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
214                 __asm( "psha" );                                                                                        \\r
215                 __asm( "ldx pxCurrentTCB" );                                                            \\r
216                 __asm( "sts 0, x" );                                                                            \\r
217         }\r
218 #endif\r
219 \r
220 /*\r
221  * Utility macro to call macros above in correct order in order to perform a\r
222  * task switch from within a standard ISR.  This macro can only be used if\r
223  * the ISR does not use any local (stack) variables.  If the ISR uses stack\r
224  * variables portYIELD() should be used in it's place.\r
225  */\r
226 #define portTASK_SWITCH_FROM_ISR()                                                              \\r
227         portSAVE_CONTEXT();                                                                                     \\r
228         vTaskSwitchContext();                                                                           \\r
229         portRESTORE_CONTEXT();\r
230 \r
231 \r
232 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
233 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
234 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
235 \r
236 #endif /* PORTMACRO_H */\r
237 \r