2 FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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77 /*-----------------------------------------------------------
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78 * Port specific definitions.
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80 * The settings in this file configure FreeRTOS correctly for the
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81 * given hardware and compiler.
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83 * These settings should not be altered.
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84 *-----------------------------------------------------------
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87 /* Type definitions. */
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88 #define portCHAR char
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89 #define portFLOAT float
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90 #define portDOUBLE double
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91 #define portLONG long
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92 #define portSHORT short
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93 #define portSTACK_TYPE uint32_t
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94 #define portBASE_TYPE portLONG
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96 typedef portSTACK_TYPE StackType_t;
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97 typedef long BaseType_t;
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98 typedef unsigned long UBaseType_t;
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100 #if( configUSE_16_BIT_TICKS == 1 )
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101 typedef uint16_t TickType_t;
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102 #define portMAX_DELAY ( TickType_t ) 0xffff
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104 typedef uint32_t TickType_t;
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105 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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107 /*-----------------------------------------------------------*/
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109 /* Architecture specifics. */
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110 #define portSTACK_GROWTH ( -1 )
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111 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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112 #define portBYTE_ALIGNMENT 8
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113 #define portNOP() __asm volatile ( "NOP" );
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114 /*-----------------------------------------------------------*/
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117 /* Scheduler utilities. */
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120 * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR
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121 * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but
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122 * are included here for efficiency. An attempt to call one from
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123 * THUMB mode code will result in a compile time error.
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126 #define portRESTORE_CONTEXT() \
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128 extern volatile void * volatile pxCurrentTCB; \
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129 extern volatile uint32_t ulCriticalNesting; \
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131 /* Set the LR to the task stack. */ \
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133 "LDR R0, =pxCurrentTCB \n\t" \
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134 "LDR R0, [R0] \n\t" \
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135 "LDR LR, [R0] \n\t" \
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137 /* The critical nesting depth is the first item on the stack. */ \
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138 /* Load it into the ulCriticalNesting variable. */ \
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139 "LDR R0, =ulCriticalNesting \n\t" \
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140 "LDMFD LR!, {R1} \n\t" \
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141 "STR R1, [R0] \n\t" \
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143 /* Get the SPSR from the stack. */ \
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144 "LDMFD LR!, {R0} \n\t" \
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145 "MSR SPSR, R0 \n\t" \
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147 /* Restore all system mode registers for the task. */ \
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148 "LDMFD LR, {R0-R14}^ \n\t" \
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151 /* Restore the return address. */ \
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152 "LDR LR, [LR, #+60] \n\t" \
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154 /* And return - correcting the offset in the LR to obtain the */ \
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155 /* correct address. */ \
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156 "SUBS PC, LR, #4 \n\t" \
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158 ( void ) ulCriticalNesting; \
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159 ( void ) pxCurrentTCB; \
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161 /*-----------------------------------------------------------*/
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163 #define portSAVE_CONTEXT() \
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165 extern volatile void * volatile pxCurrentTCB; \
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166 extern volatile uint32_t ulCriticalNesting; \
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168 /* Push R0 as we are going to use the register. */ \
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170 "STMDB SP!, {R0} \n\t" \
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172 /* Set R0 to point to the task stack pointer. */ \
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173 "STMDB SP,{SP}^ \n\t" \
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175 "SUB SP, SP, #4 \n\t" \
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176 "LDMIA SP!,{R0} \n\t" \
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178 /* Push the return address onto the stack. */ \
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179 "STMDB R0!, {LR} \n\t" \
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181 /* Now we have saved LR we can use it instead of R0. */ \
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182 "MOV LR, R0 \n\t" \
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184 /* Pop R0 so we can save it onto the system mode stack. */ \
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185 "LDMIA SP!, {R0} \n\t" \
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187 /* Push all the system mode registers onto the task stack. */ \
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188 "STMDB LR,{R0-LR}^ \n\t" \
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190 "SUB LR, LR, #60 \n\t" \
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192 /* Push the SPSR onto the task stack. */ \
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193 "MRS R0, SPSR \n\t" \
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194 "STMDB LR!, {R0} \n\t" \
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196 "LDR R0, =ulCriticalNesting \n\t" \
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197 "LDR R0, [R0] \n\t" \
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198 "STMDB LR!, {R0} \n\t" \
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200 /* Store the new top of stack for the task. */ \
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201 "LDR R0, =pxCurrentTCB \n\t" \
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202 "LDR R0, [R0] \n\t" \
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203 "STR LR, [R0] \n\t" \
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205 ( void ) ulCriticalNesting; \
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206 ( void ) pxCurrentTCB; \
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209 extern void vTaskSwitchContext( void );
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210 #define portYIELD_FROM_ISR() vTaskSwitchContext()
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211 #define portYIELD() __asm volatile ( "SWI 0" )
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212 /*-----------------------------------------------------------*/
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215 /* Critical section management. */
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218 * The interrupt management utilities can only be called from ARM mode. When
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219 * THUMB_INTERWORK is defined the utilities are defined as functions in
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220 * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
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221 * defined then the utilities are defined as macros here - as per other ports.
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224 #ifdef THUMB_INTERWORK
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226 extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
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227 extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
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229 #define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
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230 #define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
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234 #define portDISABLE_INTERRUPTS() \
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236 "STMDB SP!, {R0} \n\t" /* Push R0. */ \
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237 "MRS R0, CPSR \n\t" /* Get CPSR. */ \
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238 "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
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239 "MSR CPSR, R0 \n\t" /* Write back modified value. */ \
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240 "LDMIA SP!, {R0} " ) /* Pop R0. */
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242 #define portENABLE_INTERRUPTS() \
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244 "STMDB SP!, {R0} \n\t" /* Push R0. */ \
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245 "MRS R0, CPSR \n\t" /* Get CPSR. */ \
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246 "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \
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247 "MSR CPSR, R0 \n\t" /* Write back modified value. */ \
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248 "LDMIA SP!, {R0} " ) /* Pop R0. */
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250 #endif /* THUMB_INTERWORK */
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252 extern void vPortEnterCritical( void );
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253 extern void vPortExitCritical( void );
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255 #define portENTER_CRITICAL() vPortEnterCritical();
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256 #define portEXIT_CRITICAL() vPortExitCritical();
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257 /*-----------------------------------------------------------*/
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259 /* Task function macros as described on the FreeRTOS.org WEB site. */
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260 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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261 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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267 #endif /* PORTMACRO_H */
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projects / freertos / blob