git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM0/port.c

   1 /*\r
   2     FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.\r
   3 \r
   4 \r
   5     ***************************************************************************\r
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  23 \r
  24 \r
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  26 \r
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  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
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  33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
  34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
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  36     more details. You should have received a copy of the GNU General Public\r
  37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
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  39     by writing to Richard Barry, contact details for whom are available on the\r
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  41 \r
  42     1 tab == 4 spaces!\r
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  44     ***************************************************************************\r
  45      *                                                                       *\r
  46      *    Having a problem?  Start by reading the FAQ "My application does   *\r
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  52 \r
  53     \r
  54     http://www.FreeRTOS.org - Documentation, training, latest information, \r
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  59 \r
  60     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
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  65 */\r
  66 \r
  67 /*-----------------------------------------------------------\r
  68  * Implementation of functions defined in portable.h for the ARM CM0 port.\r
  69  *----------------------------------------------------------*/\r
  70 \r
  71 /* Scheduler includes. */\r
  72 #include "FreeRTOS.h"\r
  73 #include "task.h"\r
  74 \r
  75 /* Constants required to manipulate the NVIC. */\r
  76 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned long *) 0xe000e010 )\r
  77 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned long *) 0xe000e014 )\r
  78 #define portNVIC_INT_CTRL                       ( ( volatile unsigned long *) 0xe000ed04 )\r
  79 #define portNVIC_SYSPRI2                        ( ( volatile unsigned long *) 0xe000ed20 )\r
  80 #define portNVIC_SYSTICK_CLK            0x00000004\r
  81 #define portNVIC_SYSTICK_INT            0x00000002\r
  82 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  83 #define portNVIC_PENDSVSET                      0x10000000\r
  84 #define portMIN_INTERRUPT_PRIORITY      ( 255UL )\r
  85 #define portNVIC_PENDSV_PRI                     ( portMIN_INTERRUPT_PRIORITY << 16UL )\r
  86 #define portNVIC_SYSTICK_PRI            ( portMIN_INTERRUPT_PRIORITY << 24UL )\r
  87 \r
  88 /* Constants required to set up the initial stack. */\r
  89 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  90 \r
  91 /* Each task maintains its own interrupt status in the critical nesting\r
  92 variable. */\r
  93 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
  94 \r
  95 /*\r
  96  * Setup the timer to generate the tick interrupts.\r
  97  */\r
  98 static void prvSetupTimerInterrupt( void );\r
  99 \r
 100 /*\r
 101  * Exception handlers.\r
 102  */\r
 103 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
 104 void xPortSysTickHandler( void );\r
 105 void vPortSVCHandler( void ) __attribute__ (( naked ));\r
 106 \r
 107 /*\r
 108  * Start first task is a separate function so it can be tested in isolation.\r
 109  */\r
 110 static void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
 111 \r
 112 /*-----------------------------------------------------------*/\r
 113 \r
 114 /*\r
 115  * See header file for description.\r
 116  */\r
 117 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 118 {\r
 119         /* Simulate the stack frame as it would be created by a context switch\r
 120         interrupt. */\r
 121         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 122         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 123         pxTopOfStack--;\r
 124         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 125         pxTopOfStack -= 6;      /* LR, R12, R3..R1 */\r
 126         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 127         pxTopOfStack -= 8; /* R11..R4. */\r
 128 \r
 129         return pxTopOfStack;\r
 130 }\r
 131 /*-----------------------------------------------------------*/\r
 132 \r
 133 void vPortSVCHandler( void )\r
 134 {\r
 135         __asm volatile (\r
 136                                         "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 137                                         "       ldr r1, [r3]                                    \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
 138                                         "       ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 139                                         "       add r0, r0, #16                                 \n" /* Move to the high registers. */\r
 140                                         "       ldmia r0!, {r4-r7}                              \n" /* Pop the high registers. */\r
 141                                         "       mov r8, r4                                              \n"\r
 142                                         "       mov r9, r5                                              \n"\r
 143                                         "       mov r10, r6                                             \n"\r
 144                                         "       mov r11, r7                                             \n"\r
 145                                         "                                                                       \n"\r
 146                                         "       msr psp, r0                                             \n" /* Remember the new top of stack for the task. */\r
 147                                         "                                                                       \n"\r
 148                                         "       sub r0, r0, #32                                 \n" /* Go back for the low registers that are not automatically restored. */\r
 149                                         "       ldmia r0!, {r4-r7}              \n" /* Pop low registers.  */\r
 150                                         "       mov r1, r14                                             \n" /* OR R14 with 0x0d. */\r
 151                                         "       movs r0, #0x0d                                  \n"\r
 152                                         "       orr r1, r0                                              \n"\r
 153                                         "       bx r1                                                   \n"\r
 154                                         "                                                                       \n"\r
 155                                         "       .align 2                                                \n"\r
 156                                         "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 157                                 );\r
 158 }\r
 159 /*-----------------------------------------------------------*/\r
 160 \r
 161 void vPortStartFirstTask( void )\r
 162 {\r
 163         __asm volatile(\r
 164                                         " movs r0, #0x00        \n" /* Locate the top of stack. */\r
 165                                         " ldr r0, [r0]          \n"\r
 166                                         " msr msp, r0           \n" /* Set the msp back to the start of the stack. */\r
 167                                         " cpsie i                       \n" /* Globally enable interrupts. */\r
 168                                         " svc 0                         \n" /* System call to start first task. */\r
 169                                         " nop                           \n"\r
 170                                 );\r
 171 }\r
 172 /*-----------------------------------------------------------*/\r
 173 \r
 174 /*\r
 175  * See header file for description.\r
 176  */\r
 177 portBASE_TYPE xPortStartScheduler( void )\r
 178 {\r
 179         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 180         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 181         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 182 \r
 183         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 184         here already. */\r
 185         prvSetupTimerInterrupt();\r
 186 \r
 187         /* Initialise the critical nesting count ready for the first task. */\r
 188         uxCriticalNesting = 0;\r
 189 \r
 190         /* Start the first task. */\r
 191         vPortStartFirstTask();\r
 192 \r
 193         /* Should not get here! */\r
 194         return 0;\r
 195 }\r
 196 /*-----------------------------------------------------------*/\r
 197 \r
 198 void vPortEndScheduler( void )\r
 199 {\r
 200   /* It is unlikely that the CM0 port will require this function as there\r
 201     is nothing to return to.  */\r
 202 }\r
 203 /*-----------------------------------------------------------*/\r
 204 \r
 205 void vPortYieldFromISR( void )\r
 206 {\r
 207         /* Set a PendSV to request a context switch. */\r
 208         *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;\r
 209 }\r
 210 /*-----------------------------------------------------------*/\r
 211 \r
 212 void vPortEnterCritical( void )\r
 213 {\r
 214     portDISABLE_INTERRUPTS();\r
 215     uxCriticalNesting++;\r
 216 }\r
 217 /*-----------------------------------------------------------*/\r
 218 \r
 219 void vPortExitCritical( void )\r
 220 {\r
 221     uxCriticalNesting--;\r
 222     if( uxCriticalNesting == 0 )\r
 223     {\r
 224         portENABLE_INTERRUPTS();\r
 225     }\r
 226 }\r
 227 /*-----------------------------------------------------------*/\r
 228 \r
 229 void xPortPendSVHandler( void )\r
 230 {\r
 231         /* This is a naked function. */\r
 232 \r
 233         __asm volatile\r
 234         (\r
 235         "       mrs r0, psp                                                     \n"\r
 236         "                                                                               \n"\r
 237         "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 238         "       ldr     r2, [r3]                                                \n"\r
 239         "                                                                               \n"\r
 240         "       sub r0, r0, #32                                         \n" /* Make space for the remaining low registers. */\r
 241         "       str r0, [r2]                                            \n" /* Save the new top of stack. */\r
 242         "       stmia r0!, {r4-r7}                                      \n" /* Store the low registers that are not saved automatically. */\r
 243         "       mov r4, r8                                                      \n" /* Store the high registers. */\r
 244         "       mov r5, r9                                                      \n"\r
 245         "       mov r6, r10                                                     \n"\r
 246         "       mov r7, r11                                                     \n"\r
 247         "       stmia r0!, {r4-r7}                      \n"\r
 248         "                                                                               \n"\r
 249         "       push {r3, r14}                                          \n"\r
 250         "       cpsid i                                                         \n"\r
 251         "       bl vTaskSwitchContext                           \n"\r
 252         "       cpsie i                                                         \n"\r
 253         "       pop {r2, r3}                                            \n" /* lr goes in r3. r2 now holds tcb pointer. */\r
 254         "                                                                               \n"\r
 255         "       ldr r1, [r2]                                            \n"\r
 256         "       ldr r0, [r1]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 257         "       add r0, r0, #16                                         \n" /* Move to the high registers. */\r
 258         "       ldmia r0!, {r4-r7}                                      \n" /* Pop the high registers. */\r
 259         "       mov r8, r4                                                      \n"\r
 260         "       mov r9, r5                                                      \n"\r
 261         "       mov r10, r6                                                     \n"\r
 262         "       mov r11, r7                                                     \n"\r
 263         "                                                                               \n"\r
 264         "       msr psp, r0                                                     \n" /* Remember the new top of stack for the task. */\r
 265         "                                                                               \n"\r
 266         "       sub r0, r0, #32                                         \n" /* Go back for the low registers that are not automatically restored. */\r
 267         "       ldmia r0!, {r4-r7}                      \n" /* Pop low registers.  */\r
 268         "                                                                               \n"\r
 269         "       bx r3                                                           \n"\r
 270         "                                                                               \n"\r
 271         "       .align 2                                                        \n"\r
 272         "pxCurrentTCBConst: .word pxCurrentTCB    "\r
 273         );\r
 274 }\r
 275 /*-----------------------------------------------------------*/\r
 276 \r
 277 void xPortSysTickHandler( void )\r
 278 {\r
 279 unsigned long ulDummy;\r
 280 \r
 281         /* If using preemption, also force a context switch. */\r
 282         #if configUSE_PREEMPTION == 1\r
 283                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 284         #endif\r
 285 \r
 286         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 287         {\r
 288                 vTaskIncrementTick();\r
 289         }\r
 290         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 291 }\r
 292 /*-----------------------------------------------------------*/\r
 293 \r
 294 /*\r
 295  * Setup the systick timer to generate the tick interrupts at the required\r
 296  * frequency.\r
 297  */\r
 298 void prvSetupTimerInterrupt( void )\r
 299 {\r
 300         /* Configure SysTick to interrupt at the requested rate. */\r
 301         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 302         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 303 }\r
 304 /*-----------------------------------------------------------*/\r
 305 \r