git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM0/port.c

   1 /*\r
   2     FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
  12 \r
  13     ***************************************************************************\r
  14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  16     >>!   obliged to provide the source code for proprietary components     !<<\r
  17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  18     ***************************************************************************\r
  19 \r
  20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  23     link: http://www.freertos.org/a00114.html\r
  24 \r
  25     ***************************************************************************\r
  26      *                                                                       *\r
  27      *    FreeRTOS provides completely free yet professionally developed,    *\r
  28      *    robust, strictly quality controlled, supported, and cross          *\r
  29      *    platform software that is more than just the market leader, it     *\r
  30      *    is the industry's de facto standard.                               *\r
  31      *                                                                       *\r
  32      *    Help yourself get started quickly while simultaneously helping     *\r
  33      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
  34      *    tutorial book, reference manual, or both:                          *\r
  35      *    http://www.FreeRTOS.org/Documentation                              *\r
  36      *                                                                       *\r
  37     ***************************************************************************\r
  38 \r
  39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
  40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
  41     defined configASSERT()?\r
  42 \r
  43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
  44     embedded software for free we request you assist our global community by\r
  45     participating in the support forum.\r
  46 \r
  47     http://www.FreeRTOS.org/training - Investing in training allows your team to\r
  48     be as productive as possible as early as possible.  Now you can receive\r
  49     FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
  50     Ltd, and the world's leading authority on the world's leading RTOS.\r
  51 \r
  52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  55 \r
  56     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
  57     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
  58 \r
  59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
  60     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  61     licenses offer ticketed support, indemnification and commercial middleware.\r
  62 \r
  63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  64     engineered and independently SIL3 certified version for use in safety and\r
  65     mission critical applications that require provable dependability.\r
  66 \r
  67     1 tab == 4 spaces!\r
  68 */\r
  69 \r
  70 /*-----------------------------------------------------------\r
  71  * Implementation of functions defined in portable.h for the ARM CM0 port.\r
  72  *----------------------------------------------------------*/\r
  73 \r
  74 /* Scheduler includes. */\r
  75 #include "FreeRTOS.h"\r
  76 #include "task.h"\r
  77 \r
  78 /* Constants required to manipulate the NVIC. */\r
  79 #define portNVIC_SYSTICK_CTRL                   ( ( volatile uint32_t * ) 0xe000e010 )\r
  80 #define portNVIC_SYSTICK_LOAD                   ( ( volatile uint32_t * ) 0xe000e014 )\r
  81 #define portNVIC_SYSTICK_CURRENT_VALUE  ( ( volatile uint32_t * ) 0xe000e018 )\r
  82 #define portNVIC_INT_CTRL                       ( ( volatile uint32_t *) 0xe000ed04 )\r
  83 #define portNVIC_SYSPRI2                        ( ( volatile uint32_t *) 0xe000ed20 )\r
  84 #define portNVIC_SYSTICK_CLK            0x00000004\r
  85 #define portNVIC_SYSTICK_INT            0x00000002\r
  86 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  87 #define portNVIC_PENDSVSET                      0x10000000\r
  88 #define portMIN_INTERRUPT_PRIORITY      ( 255UL )\r
  89 #define portNVIC_PENDSV_PRI                     ( portMIN_INTERRUPT_PRIORITY << 16UL )\r
  90 #define portNVIC_SYSTICK_PRI            ( portMIN_INTERRUPT_PRIORITY << 24UL )\r
  91 \r
  92 /* Constants required to set up the initial stack. */\r
  93 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  94 \r
  95 /* Let the user override the pre-loading of the initial LR with the address of\r
  96 prvTaskExitError() in case it messes up unwinding of the stack in the\r
  97 debugger. */\r
  98 #ifdef configTASK_RETURN_ADDRESS\r
  99         #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS\r
 100 #else\r
 101         #define portTASK_RETURN_ADDRESS prvTaskExitError\r
 102 #endif\r
 103 \r
 104 /* Each task maintains its own interrupt status in the critical nesting\r
 105 variable. */\r
 106 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
 107 \r
 108 /*\r
 109  * Setup the timer to generate the tick interrupts.\r
 110  */\r
 111 static void prvSetupTimerInterrupt( void );\r
 112 \r
 113 /*\r
 114  * Exception handlers.\r
 115  */\r
 116 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
 117 void xPortSysTickHandler( void );\r
 118 void vPortSVCHandler( void );\r
 119 \r
 120 /*\r
 121  * Start first task is a separate function so it can be tested in isolation.\r
 122  */\r
 123 static void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
 124 \r
 125 /*\r
 126  * Used to catch tasks that attempt to return from their implementing function.\r
 127  */\r
 128 static void prvTaskExitError( void );\r
 129 \r
 130 /*-----------------------------------------------------------*/\r
 131 \r
 132 /*\r
 133  * See header file for description.\r
 134  */\r
 135 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
 136 {\r
 137         /* Simulate the stack frame as it would be created by a context switch\r
 138         interrupt. */\r
 139         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 140         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 141         pxTopOfStack--;\r
 142         *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
 143         pxTopOfStack--;\r
 144         *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;        /* LR */\r
 145         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 146         *pxTopOfStack = ( StackType_t ) pvParameters;   /* R0 */\r
 147         pxTopOfStack -= 8; /* R11..R4. */\r
 148 \r
 149         return pxTopOfStack;\r
 150 }\r
 151 /*-----------------------------------------------------------*/\r
 152 \r
 153 static void prvTaskExitError( void )\r
 154 {\r
 155         /* A function that implements a task must not exit or attempt to return to\r
 156         its caller as there is nothing to return to.  If a task wants to exit it\r
 157         should instead call vTaskDelete( NULL ).\r
 158 \r
 159         Artificially force an assert() to be triggered if configASSERT() is\r
 160         defined, then stop here so application writers can catch the error. */\r
 161         configASSERT( uxCriticalNesting == ~0UL );\r
 162         portDISABLE_INTERRUPTS();\r
 163         for( ;; );\r
 164 }\r
 165 /*-----------------------------------------------------------*/\r
 166 \r
 167 void vPortSVCHandler( void )\r
 168 {\r
 169         /* This function is no longer used, but retained for backward\r
 170         compatibility. */\r
 171 }\r
 172 /*-----------------------------------------------------------*/\r
 173 \r
 174 void vPortStartFirstTask( void )\r
 175 {\r
 176         /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector\r
 177         table offset register that can be used to locate the initial stack value.\r
 178         Not all M0 parts have the application vector table at address 0. */\r
 179         __asm volatile(\r
 180         "       ldr     r2, pxCurrentTCBConst2  \n" /* Obtain location of pxCurrentTCB. */\r
 181         "       ldr r3, [r2]                            \n"\r
 182         "       ldr r0, [r3]                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 183         "       add r0, #32                                     \n" /* Discard everything up to r0. */\r
 184         "       msr psp, r0                                     \n" /* This is now the new top of stack to use in the task. */\r
 185         "       movs r0, #2                                     \n" /* Switch to the psp stack. */\r
 186         "       msr CONTROL, r0                         \n"\r
 187         "       isb                                                     \n"\r
 188         "       pop {r0-r5}                                     \n" /* Pop the registers that are saved automatically. */\r
 189         "       mov lr, r5                                      \n" /* lr is now in r5. */\r
 190         "       pop {r3}                                        \n" /* Return address is now in r3. */\r
 191         "       pop {r2}                                        \n" /* Pop and discard XPSR. */\r
 192         "       cpsie i                                         \n" /* The first task has its context and interrupts can be enabled. */\r
 193         "       bx r3                                           \n" /* Finally, jump to the user defined task code. */\r
 194         "                                                               \n"\r
 195         "       .align 4                                        \n"\r
 196         "pxCurrentTCBConst2: .word pxCurrentTCB   "\r
 197                                   );\r
 198 }\r
 199 /*-----------------------------------------------------------*/\r
 200 \r
 201 /*\r
 202  * See header file for description.\r
 203  */\r
 204 BaseType_t xPortStartScheduler( void )\r
 205 {\r
 206         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 207         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 208         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 209 \r
 210         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 211         here already. */\r
 212         prvSetupTimerInterrupt();\r
 213 \r
 214         /* Initialise the critical nesting count ready for the first task. */\r
 215         uxCriticalNesting = 0;\r
 216 \r
 217         /* Start the first task. */\r
 218         vPortStartFirstTask();\r
 219 \r
 220         /* Should never get here as the tasks will now be executing!  Call the task\r
 221         exit error function to prevent compiler warnings about a static function\r
 222         not being called in the case that the application writer overrides this\r
 223         functionality by defining configTASK_RETURN_ADDRESS. */\r
 224         prvTaskExitError();\r
 225 \r
 226         /* Should not get here! */\r
 227         return 0;\r
 228 }\r
 229 /*-----------------------------------------------------------*/\r
 230 \r
 231 void vPortEndScheduler( void )\r
 232 {\r
 233         /* Not implemented in ports where there is nothing to return to.\r
 234         Artificially force an assert. */\r
 235         configASSERT( uxCriticalNesting == 1000UL );\r
 236 }\r
 237 /*-----------------------------------------------------------*/\r
 238 \r
 239 void vPortYield( void )\r
 240 {\r
 241         /* Set a PendSV to request a context switch. */\r
 242         *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;\r
 243 \r
 244         /* Barriers are normally not required but do ensure the code is completely\r
 245         within the specified behaviour for the architecture. */\r
 246         __asm volatile( "dsb" );\r
 247         __asm volatile( "isb" );\r
 248 }\r
 249 /*-----------------------------------------------------------*/\r
 250 \r
 251 void vPortEnterCritical( void )\r
 252 {\r
 253     portDISABLE_INTERRUPTS();\r
 254     uxCriticalNesting++;\r
 255         __asm volatile( "dsb" );\r
 256         __asm volatile( "isb" );\r
 257 }\r
 258 /*-----------------------------------------------------------*/\r
 259 \r
 260 void vPortExitCritical( void )\r
 261 {\r
 262         configASSERT( uxCriticalNesting );\r
 263     uxCriticalNesting--;\r
 264     if( uxCriticalNesting == 0 )\r
 265     {\r
 266         portENABLE_INTERRUPTS();\r
 267     }\r
 268 }\r
 269 /*-----------------------------------------------------------*/\r
 270 \r
 271 uint32_t ulSetInterruptMaskFromISR( void )\r
 272 {\r
 273         __asm volatile(\r
 274                                         " mrs r0, PRIMASK       \n"\r
 275                                         " cpsid i                       \n"\r
 276                                         " bx lr                           "\r
 277                                   );\r
 278 \r
 279         /* To avoid compiler warnings.  This line will never be reached. */\r
 280         return 0;\r
 281 }\r
 282 /*-----------------------------------------------------------*/\r
 283 \r
 284 void vClearInterruptMaskFromISR( uint32_t ulMask )\r
 285 {\r
 286         __asm volatile(\r
 287                                         " msr PRIMASK, r0       \n"\r
 288                                         " bx lr                           "\r
 289                                   );\r
 290 \r
 291         /* Just to avoid compiler warning. */\r
 292         ( void ) ulMask;\r
 293 }\r
 294 /*-----------------------------------------------------------*/\r
 295 \r
 296 void xPortPendSVHandler( void )\r
 297 {\r
 298         /* This is a naked function. */\r
 299 \r
 300         __asm volatile\r
 301         (\r
 302         "       mrs r0, psp                                                     \n"\r
 303         "                                                                               \n"\r
 304         "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 305         "       ldr     r2, [r3]                                                \n"\r
 306         "                                                                               \n"\r
 307         "       sub r0, r0, #32                                         \n" /* Make space for the remaining low registers. */\r
 308         "       str r0, [r2]                                            \n" /* Save the new top of stack. */\r
 309         "       stmia r0!, {r4-r7}                                      \n" /* Store the low registers that are not saved automatically. */\r
 310         "       mov r4, r8                                                      \n" /* Store the high registers. */\r
 311         "       mov r5, r9                                                      \n"\r
 312         "       mov r6, r10                                                     \n"\r
 313         "       mov r7, r11                                                     \n"\r
 314         "       stmia r0!, {r4-r7}                                      \n"\r
 315         "                                                                               \n"\r
 316         "       push {r3, r14}                                          \n"\r
 317         "       cpsid i                                                         \n"\r
 318         "       bl vTaskSwitchContext                           \n"\r
 319         "       cpsie i                                                         \n"\r
 320         "       pop {r2, r3}                                            \n" /* lr goes in r3. r2 now holds tcb pointer. */\r
 321         "                                                                               \n"\r
 322         "       ldr r1, [r2]                                            \n"\r
 323         "       ldr r0, [r1]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 324         "       add r0, r0, #16                                         \n" /* Move to the high registers. */\r
 325         "       ldmia r0!, {r4-r7}                                      \n" /* Pop the high registers. */\r
 326         "       mov r8, r4                                                      \n"\r
 327         "       mov r9, r5                                                      \n"\r
 328         "       mov r10, r6                                                     \n"\r
 329         "       mov r11, r7                                                     \n"\r
 330         "                                                                               \n"\r
 331         "       msr psp, r0                                                     \n" /* Remember the new top of stack for the task. */\r
 332         "                                                                               \n"\r
 333         "       sub r0, r0, #32                                         \n" /* Go back for the low registers that are not automatically restored. */\r
 334         "       ldmia r0!, {r4-r7}                                      \n" /* Pop low registers.  */\r
 335         "                                                                               \n"\r
 336         "       bx r3                                                           \n"\r
 337         "                                                                               \n"\r
 338         "       .align 4                                                        \n"\r
 339         "pxCurrentTCBConst: .word pxCurrentTCB    "\r
 340         );\r
 341 }\r
 342 /*-----------------------------------------------------------*/\r
 343 \r
 344 void xPortSysTickHandler( void )\r
 345 {\r
 346 uint32_t ulPreviousMask;\r
 347 \r
 348         ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
 349         {\r
 350                 /* Increment the RTOS tick. */\r
 351                 if( xTaskIncrementTick() != pdFALSE )\r
 352                 {\r
 353                         /* Pend a context switch. */\r
 354                         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 355                 }\r
 356         }\r
 357         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );\r
 358 }\r
 359 /*-----------------------------------------------------------*/\r
 360 \r
 361 /*\r
 362  * Setup the systick timer to generate the tick interrupts at the required\r
 363  * frequency.\r
 364  */\r
 365 void prvSetupTimerInterrupt( void )\r
 366 {\r
 367         /* Stop and reset the SysTick. */\r
 368         *(portNVIC_SYSTICK_CTRL) = 0UL;\r
 369         *(portNVIC_SYSTICK_CURRENT_VALUE) = 0UL;\r
 370 \r
 371         /* Configure SysTick to interrupt at the requested rate. */\r
 372         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 373         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 374 }\r
 375 /*-----------------------------------------------------------*/\r
 376 \r