git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM0/port.c

   1 /*\r
   2  * FreeRTOS Kernel V10.2.1\r
   3  * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   6  * this software and associated documentation files (the "Software"), to deal in\r
   7  * the Software without restriction, including without limitation the rights to\r
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
   9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  10  * subject to the following conditions:\r
  11  *\r
  12  * The above copyright notice and this permission notice shall be included in all\r
  13  * copies or substantial portions of the Software.\r
  14  *\r
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  21  *\r
  22  * http://www.FreeRTOS.org\r
  23  * http://aws.amazon.com/freertos\r
  24  *\r
  25  * 1 tab == 4 spaces!\r
  26  */\r
  27 \r
  28 /*-----------------------------------------------------------\r
  29  * Implementation of functions defined in portable.h for the ARM CM0 port.\r
  30  *----------------------------------------------------------*/\r
  31 \r
  32 /* Scheduler includes. */\r
  33 #include "FreeRTOS.h"\r
  34 #include "task.h"\r
  35 \r
  36 /* Constants required to manipulate the NVIC. */\r
  37 #define portNVIC_SYSTICK_CTRL                   ( ( volatile uint32_t * ) 0xe000e010 )\r
  38 #define portNVIC_SYSTICK_LOAD                   ( ( volatile uint32_t * ) 0xe000e014 )\r
  39 #define portNVIC_SYSTICK_CURRENT_VALUE  ( ( volatile uint32_t * ) 0xe000e018 )\r
  40 #define portNVIC_INT_CTRL                               ( ( volatile uint32_t *) 0xe000ed04 )\r
  41 #define portNVIC_SYSPRI2                                ( ( volatile uint32_t *) 0xe000ed20 )\r
  42 #define portNVIC_SYSTICK_CLK                    0x00000004\r
  43 #define portNVIC_SYSTICK_INT                    0x00000002\r
  44 #define portNVIC_SYSTICK_ENABLE                 0x00000001\r
  45 #define portNVIC_PENDSVSET                              0x10000000\r
  46 #define portMIN_INTERRUPT_PRIORITY              ( 255UL )\r
  47 #define portNVIC_PENDSV_PRI                             ( portMIN_INTERRUPT_PRIORITY << 16UL )\r
  48 #define portNVIC_SYSTICK_PRI                    ( portMIN_INTERRUPT_PRIORITY << 24UL )\r
  49 \r
  50 /* Constants required to set up the initial stack. */\r
  51 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  52 \r
  53 /* Let the user override the pre-loading of the initial LR with the address of\r
  54 prvTaskExitError() in case it messes up unwinding of the stack in the\r
  55 debugger. */\r
  56 #ifdef configTASK_RETURN_ADDRESS\r
  57         #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS\r
  58 #else\r
  59         #define portTASK_RETURN_ADDRESS prvTaskExitError\r
  60 #endif\r
  61 \r
  62 /*\r
  63  * Setup the timer to generate the tick interrupts.\r
  64  */\r
  65 static void prvSetupTimerInterrupt( void );\r
  66 \r
  67 /*\r
  68  * Exception handlers.\r
  69  */\r
  70 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
  71 void xPortSysTickHandler( void );\r
  72 void vPortSVCHandler( void );\r
  73 \r
  74 /*\r
  75  * Start first task is a separate function so it can be tested in isolation.\r
  76  */\r
  77 static void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
  78 \r
  79 /*\r
  80  * Used to catch tasks that attempt to return from their implementing function.\r
  81  */\r
  82 static void prvTaskExitError( void );\r
  83 \r
  84 /*-----------------------------------------------------------*/\r
  85 \r
  86 /* Each task maintains its own interrupt status in the critical nesting\r
  87 variable. */\r
  88 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
  89 \r
  90 /*-----------------------------------------------------------*/\r
  91 \r
  92 /*\r
  93  * See header file for description.\r
  94  */\r
  95 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
  96 {\r
  97         /* Simulate the stack frame as it would be created by a context switch\r
  98         interrupt. */\r
  99         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 100         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 101         pxTopOfStack--;\r
 102         *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
 103         pxTopOfStack--;\r
 104         *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;        /* LR */\r
 105         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 106         *pxTopOfStack = ( StackType_t ) pvParameters;   /* R0 */\r
 107         pxTopOfStack -= 8; /* R11..R4. */\r
 108 \r
 109         return pxTopOfStack;\r
 110 }\r
 111 /*-----------------------------------------------------------*/\r
 112 \r
 113 static void prvTaskExitError( void )\r
 114 {\r
 115 volatile uint32_t ulDummy = 0UL;\r
 116 \r
 117         /* A function that implements a task must not exit or attempt to return to\r
 118         its caller as there is nothing to return to.  If a task wants to exit it\r
 119         should instead call vTaskDelete( NULL ).\r
 120 \r
 121         Artificially force an assert() to be triggered if configASSERT() is\r
 122         defined, then stop here so application writers can catch the error. */\r
 123         configASSERT( uxCriticalNesting == ~0UL );\r
 124         portDISABLE_INTERRUPTS();\r
 125         while( ulDummy == 0 )\r
 126         {\r
 127                 /* This file calls prvTaskExitError() after the scheduler has been\r
 128                 started to remove a compiler warning about the function being defined\r
 129                 but never called.  ulDummy is used purely to quieten other warnings\r
 130                 about code appearing after this function is called - making ulDummy\r
 131                 volatile makes the compiler think the function could return and\r
 132                 therefore not output an 'unreachable code' warning for code that appears\r
 133                 after it. */\r
 134         }\r
 135 }\r
 136 /*-----------------------------------------------------------*/\r
 137 \r
 138 void vPortSVCHandler( void )\r
 139 {\r
 140         /* This function is no longer used, but retained for backward\r
 141         compatibility. */\r
 142 }\r
 143 /*-----------------------------------------------------------*/\r
 144 \r
 145 void vPortStartFirstTask( void )\r
 146 {\r
 147         /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector\r
 148         table offset register that can be used to locate the initial stack value.\r
 149         Not all M0 parts have the application vector table at address 0. */\r
 150         __asm volatile(\r
 151         "       .syntax unified                         \n"\r
 152         "       ldr  r2, pxCurrentTCBConst2     \n" /* Obtain location of pxCurrentTCB. */\r
 153         "       ldr  r3, [r2]                           \n"\r
 154         "       ldr  r0, [r3]                           \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 155         "       adds r0, #32                                    \n" /* Discard everything up to r0. */\r
 156         "       msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */\r
 157         "       movs r0, #2                                     \n" /* Switch to the psp stack. */\r
 158         "       msr  CONTROL, r0                                \n"\r
 159         "       isb                                                     \n"\r
 160         "       pop  {r0-r5}                                    \n" /* Pop the registers that are saved automatically. */\r
 161         "       mov  lr, r5                                     \n" /* lr is now in r5. */\r
 162         "       pop  {r3}                                       \n" /* Return address is now in r3. */\r
 163         "       pop  {r2}                                       \n" /* Pop and discard XPSR. */\r
 164         "       cpsie i                                         \n" /* The first task has its context and interrupts can be enabled. */\r
 165         "       bx   r3                                         \n" /* Finally, jump to the user defined task code. */\r
 166         "                                                               \n"\r
 167         "       .align 4                                        \n"\r
 168         "pxCurrentTCBConst2: .word pxCurrentTCB   "\r
 169                                   );\r
 170 }\r
 171 /*-----------------------------------------------------------*/\r
 172 \r
 173 /*\r
 174  * See header file for description.\r
 175  */\r
 176 BaseType_t xPortStartScheduler( void )\r
 177 {\r
 178         /* Make PendSV, CallSV and SysTick the same priority as the kernel. */\r
 179         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 180         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 181 \r
 182         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 183         here already. */\r
 184         prvSetupTimerInterrupt();\r
 185 \r
 186         /* Initialise the critical nesting count ready for the first task. */\r
 187         uxCriticalNesting = 0;\r
 188 \r
 189         /* Start the first task. */\r
 190         vPortStartFirstTask();\r
 191 \r
 192         /* Should never get here as the tasks will now be executing!  Call the task\r
 193         exit error function to prevent compiler warnings about a static function\r
 194         not being called in the case that the application writer overrides this\r
 195         functionality by defining configTASK_RETURN_ADDRESS.  Call\r
 196         vTaskSwitchContext() so link time optimisation does not remove the\r
 197         symbol. */\r
 198         vTaskSwitchContext();\r
 199         prvTaskExitError();\r
 200 \r
 201         /* Should not get here! */\r
 202         return 0;\r
 203 }\r
 204 /*-----------------------------------------------------------*/\r
 205 \r
 206 void vPortEndScheduler( void )\r
 207 {\r
 208         /* Not implemented in ports where there is nothing to return to.\r
 209         Artificially force an assert. */\r
 210         configASSERT( uxCriticalNesting == 1000UL );\r
 211 }\r
 212 /*-----------------------------------------------------------*/\r
 213 \r
 214 void vPortYield( void )\r
 215 {\r
 216         /* Set a PendSV to request a context switch. */\r
 217         *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;\r
 218 \r
 219         /* Barriers are normally not required but do ensure the code is completely\r
 220         within the specified behaviour for the architecture. */\r
 221         __asm volatile( "dsb" ::: "memory" );\r
 222         __asm volatile( "isb" );\r
 223 }\r
 224 /*-----------------------------------------------------------*/\r
 225 \r
 226 void vPortEnterCritical( void )\r
 227 {\r
 228         portDISABLE_INTERRUPTS();\r
 229         uxCriticalNesting++;\r
 230         __asm volatile( "dsb" ::: "memory" );\r
 231         __asm volatile( "isb" );\r
 232 }\r
 233 /*-----------------------------------------------------------*/\r
 234 \r
 235 void vPortExitCritical( void )\r
 236 {\r
 237         configASSERT( uxCriticalNesting );\r
 238         uxCriticalNesting--;\r
 239         if( uxCriticalNesting == 0 )\r
 240         {\r
 241                 portENABLE_INTERRUPTS();\r
 242         }\r
 243 }\r
 244 /*-----------------------------------------------------------*/\r
 245 \r
 246 uint32_t ulSetInterruptMaskFromISR( void )\r
 247 {\r
 248         __asm volatile(\r
 249                                         " mrs r0, PRIMASK       \n"\r
 250                                         " cpsid i                       \n"\r
 251                                         " bx lr                           "\r
 252                                         ::: "memory"\r
 253                                   );\r
 254 }\r
 255 /*-----------------------------------------------------------*/\r
 256 \r
 257 void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask )\r
 258 {\r
 259         __asm volatile(\r
 260                                         " msr PRIMASK, r0       \n"\r
 261                                         " bx lr                           "\r
 262                                         ::: "memory"\r
 263                                   );\r
 264 }\r
 265 /*-----------------------------------------------------------*/\r
 266 \r
 267 void xPortPendSVHandler( void )\r
 268 {\r
 269         /* This is a naked function. */\r
 270 \r
 271         __asm volatile\r
 272         (\r
 273         "       .syntax unified                                         \n"\r
 274         "       mrs r0, psp                                                     \n"\r
 275         "                                                                               \n"\r
 276         "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 277         "       ldr     r2, [r3]                                                \n"\r
 278         "                                                                               \n"\r
 279         "       subs r0, r0, #32                                        \n" /* Make space for the remaining low registers. */\r
 280         "       str r0, [r2]                                            \n" /* Save the new top of stack. */\r
 281         "       stmia r0!, {r4-r7}                                      \n" /* Store the low registers that are not saved automatically. */\r
 282         "       mov r4, r8                                                      \n" /* Store the high registers. */\r
 283         "       mov r5, r9                                                      \n"\r
 284         "       mov r6, r10                                                     \n"\r
 285         "       mov r7, r11                                                     \n"\r
 286         "       stmia r0!, {r4-r7}                                      \n"\r
 287         "                                                                               \n"\r
 288         "       push {r3, r14}                                          \n"\r
 289         "       cpsid i                                                         \n"\r
 290         "       bl vTaskSwitchContext                           \n"\r
 291         "       cpsie i                                                         \n"\r
 292         "       pop {r2, r3}                                            \n" /* lr goes in r3. r2 now holds tcb pointer. */\r
 293         "                                                                               \n"\r
 294         "       ldr r1, [r2]                                            \n"\r
 295         "       ldr r0, [r1]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 296         "       adds r0, r0, #16                                        \n" /* Move to the high registers. */\r
 297         "       ldmia r0!, {r4-r7}                                      \n" /* Pop the high registers. */\r
 298         "       mov r8, r4                                                      \n"\r
 299         "       mov r9, r5                                                      \n"\r
 300         "       mov r10, r6                                                     \n"\r
 301         "       mov r11, r7                                                     \n"\r
 302         "                                                                               \n"\r
 303         "       msr psp, r0                                                     \n" /* Remember the new top of stack for the task. */\r
 304         "                                                                               \n"\r
 305         "       subs r0, r0, #32                                        \n" /* Go back for the low registers that are not automatically restored. */\r
 306         "       ldmia r0!, {r4-r7}                                      \n" /* Pop low registers.  */\r
 307         "                                                                               \n"\r
 308         "       bx r3                                                           \n"\r
 309         "                                                                               \n"\r
 310         "       .align 4                                                        \n"\r
 311         "pxCurrentTCBConst: .word pxCurrentTCB    "\r
 312         );\r
 313 }\r
 314 /*-----------------------------------------------------------*/\r
 315 \r
 316 void xPortSysTickHandler( void )\r
 317 {\r
 318 uint32_t ulPreviousMask;\r
 319 \r
 320         ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
 321         {\r
 322                 /* Increment the RTOS tick. */\r
 323                 if( xTaskIncrementTick() != pdFALSE )\r
 324                 {\r
 325                         /* Pend a context switch. */\r
 326                         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 327                 }\r
 328         }\r
 329         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );\r
 330 }\r
 331 /*-----------------------------------------------------------*/\r
 332 \r
 333 /*\r
 334  * Setup the systick timer to generate the tick interrupts at the required\r
 335  * frequency.\r
 336  */\r
 337 void prvSetupTimerInterrupt( void )\r
 338 {\r
 339         /* Stop and reset the SysTick. */\r
 340         *(portNVIC_SYSTICK_CTRL) = 0UL;\r
 341         *(portNVIC_SYSTICK_CURRENT_VALUE) = 0UL;\r
 342 \r
 343         /* Configure SysTick to interrupt at the requested rate. */\r
 344         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 345         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 346 }\r
 347 /*-----------------------------------------------------------*/\r
 348 \r