2 FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the ARM CM0 port.
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72 *----------------------------------------------------------*/
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74 /* Scheduler includes. */
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75 #include "FreeRTOS.h"
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78 /* Constants required to manipulate the NVIC. */
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79 #define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
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80 #define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
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81 #define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
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82 #define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )
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83 #define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )
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84 #define portNVIC_SYSTICK_CLK 0x00000004
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85 #define portNVIC_SYSTICK_INT 0x00000002
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86 #define portNVIC_SYSTICK_ENABLE 0x00000001
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87 #define portNVIC_PENDSVSET 0x10000000
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88 #define portMIN_INTERRUPT_PRIORITY ( 255UL )
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89 #define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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90 #define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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92 /* Constants required to set up the initial stack. */
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93 #define portINITIAL_XPSR ( 0x01000000 )
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95 /* Let the user override the pre-loading of the initial LR with the address of
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96 prvTaskExitError() in case it messes up unwinding of the stack in the
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98 #ifdef configTASK_RETURN_ADDRESS
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99 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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101 #define portTASK_RETURN_ADDRESS prvTaskExitError
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105 * Setup the timer to generate the tick interrupts.
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107 static void prvSetupTimerInterrupt( void );
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110 * Exception handlers.
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112 void xPortPendSVHandler( void ) __attribute__ (( naked ));
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113 void xPortSysTickHandler( void );
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114 void vPortSVCHandler( void );
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117 * Start first task is a separate function so it can be tested in isolation.
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119 static void vPortStartFirstTask( void ) __attribute__ (( naked ));
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122 * Used to catch tasks that attempt to return from their implementing function.
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124 static void prvTaskExitError( void );
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126 /*-----------------------------------------------------------*/
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128 /* Each task maintains its own interrupt status in the critical nesting
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130 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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132 /*-----------------------------------------------------------*/
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135 * See header file for description.
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137 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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139 /* Simulate the stack frame as it would be created by a context switch
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141 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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142 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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144 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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146 *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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147 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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148 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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149 pxTopOfStack -= 8; /* R11..R4. */
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151 return pxTopOfStack;
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153 /*-----------------------------------------------------------*/
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155 static void prvTaskExitError( void )
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157 /* A function that implements a task must not exit or attempt to return to
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158 its caller as there is nothing to return to. If a task wants to exit it
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159 should instead call vTaskDelete( NULL ).
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161 Artificially force an assert() to be triggered if configASSERT() is
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162 defined, then stop here so application writers can catch the error. */
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163 configASSERT( uxCriticalNesting == ~0UL );
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164 portDISABLE_INTERRUPTS();
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167 /*-----------------------------------------------------------*/
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169 void vPortSVCHandler( void )
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171 /* This function is no longer used, but retained for backward
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174 /*-----------------------------------------------------------*/
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176 void vPortStartFirstTask( void )
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178 /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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179 table offset register that can be used to locate the initial stack value.
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180 Not all M0 parts have the application vector table at address 0. */
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182 " ldr r2, pxCurrentTCBConst2 \n" /* Obtain location of pxCurrentTCB. */
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184 " ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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185 " add r0, #32 \n" /* Discard everything up to r0. */
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186 " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
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187 " movs r0, #2 \n" /* Switch to the psp stack. */
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188 " msr CONTROL, r0 \n"
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190 " pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
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191 " mov lr, r5 \n" /* lr is now in r5. */
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192 " pop {r3} \n" /* Return address is now in r3. */
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193 " pop {r2} \n" /* Pop and discard XPSR. */
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194 " cpsie i \n" /* The first task has its context and interrupts can be enabled. */
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195 " bx r3 \n" /* Finally, jump to the user defined task code. */
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198 "pxCurrentTCBConst2: .word pxCurrentTCB "
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201 /*-----------------------------------------------------------*/
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204 * See header file for description.
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206 BaseType_t xPortStartScheduler( void )
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208 /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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209 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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210 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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212 /* Start the timer that generates the tick ISR. Interrupts are disabled
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214 prvSetupTimerInterrupt();
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216 /* Initialise the critical nesting count ready for the first task. */
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217 uxCriticalNesting = 0;
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219 /* Start the first task. */
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220 vPortStartFirstTask();
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222 /* Should never get here as the tasks will now be executing! Call the task
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223 exit error function to prevent compiler warnings about a static function
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224 not being called in the case that the application writer overrides this
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225 functionality by defining configTASK_RETURN_ADDRESS. Call
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226 vTaskSwitchContext() so link time optimisation does not remove the
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228 prvTaskExitError();
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229 vTaskSwitchContext();
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231 /* Should not get here! */
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234 /*-----------------------------------------------------------*/
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236 void vPortEndScheduler( void )
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238 /* Not implemented in ports where there is nothing to return to.
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239 Artificially force an assert. */
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240 configASSERT( uxCriticalNesting == 1000UL );
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242 /*-----------------------------------------------------------*/
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244 void vPortYield( void )
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246 /* Set a PendSV to request a context switch. */
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247 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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249 /* Barriers are normally not required but do ensure the code is completely
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250 within the specified behaviour for the architecture. */
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251 __asm volatile( "dsb" ::: "memory" );
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252 __asm volatile( "isb" );
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254 /*-----------------------------------------------------------*/
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256 void vPortEnterCritical( void )
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258 portDISABLE_INTERRUPTS();
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259 uxCriticalNesting++;
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260 __asm volatile( "dsb" ::: "memory" );
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261 __asm volatile( "isb" );
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263 /*-----------------------------------------------------------*/
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265 void vPortExitCritical( void )
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267 configASSERT( uxCriticalNesting );
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268 uxCriticalNesting--;
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269 if( uxCriticalNesting == 0 )
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271 portENABLE_INTERRUPTS();
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274 /*-----------------------------------------------------------*/
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276 uint32_t ulSetInterruptMaskFromISR( void )
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279 " mrs r0, PRIMASK \n"
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285 /* To avoid compiler warnings. This line will never be reached. */
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288 /*-----------------------------------------------------------*/
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290 void vClearInterruptMaskFromISR( uint32_t ulMask )
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293 " msr PRIMASK, r0 \n"
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298 /* Just to avoid compiler warning. */
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301 /*-----------------------------------------------------------*/
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303 void xPortPendSVHandler( void )
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305 /* This is a naked function. */
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311 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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314 " sub r0, r0, #32 \n" /* Make space for the remaining low registers. */
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315 " str r0, [r2] \n" /* Save the new top of stack. */
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316 " stmia r0!, {r4-r7} \n" /* Store the low registers that are not saved automatically. */
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317 " mov r4, r8 \n" /* Store the high registers. */
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321 " stmia r0!, {r4-r7} \n"
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323 " push {r3, r14} \n"
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325 " bl vTaskSwitchContext \n"
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327 " pop {r2, r3} \n" /* lr goes in r3. r2 now holds tcb pointer. */
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330 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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331 " add r0, r0, #16 \n" /* Move to the high registers. */
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332 " ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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338 " msr psp, r0 \n" /* Remember the new top of stack for the task. */
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340 " sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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341 " ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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346 "pxCurrentTCBConst: .word pxCurrentTCB "
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349 /*-----------------------------------------------------------*/
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351 void xPortSysTickHandler( void )
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353 uint32_t ulPreviousMask;
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355 ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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357 /* Increment the RTOS tick. */
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358 if( xTaskIncrementTick() != pdFALSE )
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360 /* Pend a context switch. */
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361 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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364 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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366 /*-----------------------------------------------------------*/
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369 * Setup the systick timer to generate the tick interrupts at the required
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372 void prvSetupTimerInterrupt( void )
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374 /* Stop and reset the SysTick. */
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375 *(portNVIC_SYSTICK_CTRL) = 0UL;
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376 *(portNVIC_SYSTICK_CURRENT_VALUE) = 0UL;
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378 /* Configure SysTick to interrupt at the requested rate. */
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379 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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380 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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382 /*-----------------------------------------------------------*/
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