2 * FreeRTOS Kernel V10.3.0
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3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the ARM CM3 port.
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30 *----------------------------------------------------------*/
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32 /* Scheduler includes. */
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33 #include "FreeRTOS.h"
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36 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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37 defined. The value should also ensure backward compatibility.
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38 FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
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39 #ifndef configKERNEL_INTERRUPT_PRIORITY
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40 #define configKERNEL_INTERRUPT_PRIORITY 255
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43 #ifndef configSYSTICK_CLOCK_HZ
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44 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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45 /* Ensure the SysTick is clocked at the same frequency as the core. */
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46 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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48 /* The way the SysTick is clocked is not modified in case it is not the same
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50 #define portNVIC_SYSTICK_CLK_BIT ( 0 )
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53 /* Constants required to manipulate the core. Registers first... */
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54 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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55 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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56 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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57 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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58 /* ...then bits in the registers. */
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59 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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60 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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61 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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62 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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63 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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65 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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66 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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68 /* Constants required to check the validity of an interrupt priority. */
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69 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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70 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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71 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
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72 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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73 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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74 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
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75 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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76 #define portPRIGROUP_SHIFT ( 8UL )
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78 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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79 #define portVECTACTIVE_MASK ( 0xFFUL )
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81 /* Constants required to set up the initial stack. */
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82 #define portINITIAL_XPSR ( 0x01000000UL )
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84 /* The systick is a 24-bit counter. */
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85 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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87 /* A fiddle factor to estimate the number of SysTick counts that would have
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88 occurred while the SysTick counter is stopped during tickless idle
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90 #define portMISSED_COUNTS_FACTOR ( 45UL )
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92 /* For strict compliance with the Cortex-M spec the task start address should
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93 have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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94 #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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96 /* Let the user override the pre-loading of the initial LR with the address of
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97 prvTaskExitError() in case it messes up unwinding of the stack in the
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99 #ifdef configTASK_RETURN_ADDRESS
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100 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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102 #define portTASK_RETURN_ADDRESS prvTaskExitError
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106 * Setup the timer to generate the tick interrupts. The implementation in this
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107 * file is weak to allow application writers to change the timer used to
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108 * generate the tick interrupt.
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110 void vPortSetupTimerInterrupt( void );
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113 * Exception handlers.
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115 void xPortPendSVHandler( void ) __attribute__ (( naked ));
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116 void xPortSysTickHandler( void );
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117 void vPortSVCHandler( void ) __attribute__ (( naked ));
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120 * Start first task is a separate function so it can be tested in isolation.
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122 static void prvPortStartFirstTask( void ) __attribute__ (( naked ));
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125 * Used to catch tasks that attempt to return from their implementing function.
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127 static void prvTaskExitError( void );
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129 /*-----------------------------------------------------------*/
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131 /* Each task maintains its own interrupt status in the critical nesting
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133 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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136 * The number of SysTick increments that make up one tick period.
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138 #if( configUSE_TICKLESS_IDLE == 1 )
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139 static uint32_t ulTimerCountsForOneTick = 0;
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140 #endif /* configUSE_TICKLESS_IDLE */
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143 * The maximum number of tick periods that can be suppressed is limited by the
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144 * 24 bit resolution of the SysTick timer.
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146 #if( configUSE_TICKLESS_IDLE == 1 )
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147 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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148 #endif /* configUSE_TICKLESS_IDLE */
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151 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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152 * power functionality only.
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154 #if( configUSE_TICKLESS_IDLE == 1 )
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155 static uint32_t ulStoppedTimerCompensation = 0;
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156 #endif /* configUSE_TICKLESS_IDLE */
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159 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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160 * FreeRTOS API functions are not called from interrupts that have been assigned
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161 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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163 #if( configASSERT_DEFINED == 1 )
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164 static uint8_t ucMaxSysCallPriority = 0;
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165 static uint32_t ulMaxPRIGROUPValue = 0;
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166 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
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167 #endif /* configASSERT_DEFINED */
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169 /*-----------------------------------------------------------*/
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172 * See header file for description.
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174 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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176 /* Simulate the stack frame as it would be created by a context switch
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178 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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179 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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181 *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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183 *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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184 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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185 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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186 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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188 return pxTopOfStack;
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190 /*-----------------------------------------------------------*/
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192 static void prvTaskExitError( void )
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194 volatile uint32_t ulDummy = 0UL;
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196 /* A function that implements a task must not exit or attempt to return to
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197 its caller as there is nothing to return to. If a task wants to exit it
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198 should instead call vTaskDelete( NULL ).
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200 Artificially force an assert() to be triggered if configASSERT() is
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201 defined, then stop here so application writers can catch the error. */
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202 configASSERT( uxCriticalNesting == ~0UL );
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203 portDISABLE_INTERRUPTS();
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204 while( ulDummy == 0 )
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206 /* This file calls prvTaskExitError() after the scheduler has been
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207 started to remove a compiler warning about the function being defined
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208 but never called. ulDummy is used purely to quieten other warnings
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209 about code appearing after this function is called - making ulDummy
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210 volatile makes the compiler think the function could return and
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211 therefore not output an 'unreachable code' warning for code that appears
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215 /*-----------------------------------------------------------*/
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217 void vPortSVCHandler( void )
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220 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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221 " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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222 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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223 " ldmia r0!, {r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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224 " msr psp, r0 \n" /* Restore the task stack pointer. */
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227 " msr basepri, r0 \n"
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228 " orr r14, #0xd \n"
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232 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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235 /*-----------------------------------------------------------*/
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237 static void prvPortStartFirstTask( void )
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240 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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243 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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244 " cpsie i \n" /* Globally enable interrupts. */
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248 " svc 0 \n" /* System call to start first task. */
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252 /*-----------------------------------------------------------*/
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255 * See header file for description.
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257 BaseType_t xPortStartScheduler( void )
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259 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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260 See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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261 configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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263 #if( configASSERT_DEFINED == 1 )
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265 volatile uint32_t ulOriginalPriority;
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266 volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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267 volatile uint8_t ucMaxPriorityValue;
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269 /* Determine the maximum priority from which ISR safe FreeRTOS API
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270 functions can be called. ISR safe functions are those that end in
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271 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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272 ensure interrupt entry is as fast and simple as possible.
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274 Save the interrupt priority value that is about to be clobbered. */
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275 ulOriginalPriority = *pucFirstUserPriorityRegister;
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277 /* Determine the number of priority bits available. First write to all
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279 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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281 /* Read the value back to see how many bits stuck. */
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282 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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284 /* Use the same mask on the maximum system call priority. */
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285 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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287 /* Calculate the maximum acceptable priority group value for the number
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288 of bits read back. */
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289 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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290 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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292 ulMaxPRIGROUPValue--;
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293 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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296 #ifdef __NVIC_PRIO_BITS
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298 /* Check the CMSIS configuration that defines the number of
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299 priority bits matches the number of priority bits actually queried
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300 from the hardware. */
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301 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
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305 #ifdef configPRIO_BITS
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307 /* Check the FreeRTOS configuration that defines the number of
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308 priority bits matches the number of priority bits actually queried
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309 from the hardware. */
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310 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
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314 /* Shift the priority group value back to its position within the AIRCR
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316 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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317 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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319 /* Restore the clobbered interrupt priority register to its original
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321 *pucFirstUserPriorityRegister = ulOriginalPriority;
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323 #endif /* conifgASSERT_DEFINED */
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325 /* Make PendSV and SysTick the lowest priority interrupts. */
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326 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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327 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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329 /* Start the timer that generates the tick ISR. Interrupts are disabled
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331 vPortSetupTimerInterrupt();
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333 /* Initialise the critical nesting count ready for the first task. */
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334 uxCriticalNesting = 0;
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336 /* Start the first task. */
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337 prvPortStartFirstTask();
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339 /* Should never get here as the tasks will now be executing! Call the task
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340 exit error function to prevent compiler warnings about a static function
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341 not being called in the case that the application writer overrides this
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342 functionality by defining configTASK_RETURN_ADDRESS. Call
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343 vTaskSwitchContext() so link time optimisation does not remove the
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345 vTaskSwitchContext();
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346 prvTaskExitError();
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348 /* Should not get here! */
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351 /*-----------------------------------------------------------*/
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353 void vPortEndScheduler( void )
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355 /* Not implemented in ports where there is nothing to return to.
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356 Artificially force an assert. */
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357 configASSERT( uxCriticalNesting == 1000UL );
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359 /*-----------------------------------------------------------*/
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361 void vPortEnterCritical( void )
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363 portDISABLE_INTERRUPTS();
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364 uxCriticalNesting++;
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366 /* This is not the interrupt safe version of the enter critical function so
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367 assert() if it is being called from an interrupt context. Only API
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368 functions that end in "FromISR" can be used in an interrupt. Only assert if
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369 the critical nesting count is 1 to protect against recursive calls if the
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370 assert function also uses a critical section. */
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371 if( uxCriticalNesting == 1 )
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373 configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
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376 /*-----------------------------------------------------------*/
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378 void vPortExitCritical( void )
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380 configASSERT( uxCriticalNesting );
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381 uxCriticalNesting--;
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382 if( uxCriticalNesting == 0 )
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384 portENABLE_INTERRUPTS();
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387 /*-----------------------------------------------------------*/
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389 void xPortPendSVHandler( void )
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391 /* This is a naked function. */
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398 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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401 " stmdb r0!, {r4-r11} \n" /* Save the remaining registers. */
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402 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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404 " stmdb sp!, {r3, r14} \n"
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406 " msr basepri, r0 \n"
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407 " bl vTaskSwitchContext \n"
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409 " msr basepri, r0 \n"
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410 " ldmia sp!, {r3, r14} \n"
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411 " \n" /* Restore the context, including the critical nesting count. */
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413 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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414 " ldmia r0!, {r4-r11} \n" /* Pop the registers. */
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420 "pxCurrentTCBConst: .word pxCurrentTCB \n"
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421 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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424 /*-----------------------------------------------------------*/
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426 void xPortSysTickHandler( void )
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428 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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429 executes all interrupts must be unmasked. There is therefore no need to
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430 save and then restore the interrupt mask value as its value is already
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432 portDISABLE_INTERRUPTS();
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434 /* Increment the RTOS tick. */
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435 if( xTaskIncrementTick() != pdFALSE )
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437 /* A context switch is required. Context switching is performed in
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438 the PendSV interrupt. Pend the PendSV interrupt. */
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439 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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442 portENABLE_INTERRUPTS();
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444 /*-----------------------------------------------------------*/
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446 #if( configUSE_TICKLESS_IDLE == 1 )
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448 __attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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450 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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451 TickType_t xModifiableIdleTime;
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453 /* Make sure the SysTick reload value does not overflow the counter. */
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454 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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456 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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459 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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460 is accounted for as best it can be, but using the tickless mode will
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461 inevitably result in some tiny drift of the time maintained by the
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462 kernel with respect to calendar time. */
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463 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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465 /* Calculate the reload value required to wait xExpectedIdleTime
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466 tick periods. -1 is used because this code will execute part way
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467 through one of the tick periods. */
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468 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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469 if( ulReloadValue > ulStoppedTimerCompensation )
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471 ulReloadValue -= ulStoppedTimerCompensation;
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474 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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475 method as that will mask interrupts that should exit sleep mode. */
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476 __asm volatile( "cpsid i" ::: "memory" );
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477 __asm volatile( "dsb" );
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478 __asm volatile( "isb" );
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480 /* If a context switch is pending or a task is waiting for the scheduler
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481 to be unsuspended then abandon the low power entry. */
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482 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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484 /* Restart from whatever is left in the count register to complete
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485 this tick period. */
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486 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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488 /* Restart SysTick. */
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489 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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491 /* Reset the reload register to the value required for normal tick
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493 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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495 /* Re-enable interrupts - see comments above the cpsid instruction()
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497 __asm volatile( "cpsie i" ::: "memory" );
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501 /* Set the new reload value. */
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502 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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504 /* Clear the SysTick count flag and set the count value back to
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506 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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508 /* Restart SysTick. */
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509 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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511 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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512 set its parameter to 0 to indicate that its implementation contains
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513 its own wait for interrupt or wait for event instruction, and so wfi
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514 should not be executed again. However, the original expected idle
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515 time variable must remain unmodified, so a copy is taken. */
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516 xModifiableIdleTime = xExpectedIdleTime;
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517 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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518 if( xModifiableIdleTime > 0 )
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520 __asm volatile( "dsb" ::: "memory" );
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521 __asm volatile( "wfi" );
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522 __asm volatile( "isb" );
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524 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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526 /* Re-enable interrupts to allow the interrupt that brought the MCU
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527 out of sleep mode to execute immediately. see comments above
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528 __disable_interrupt() call above. */
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529 __asm volatile( "cpsie i" ::: "memory" );
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530 __asm volatile( "dsb" );
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531 __asm volatile( "isb" );
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533 /* Disable interrupts again because the clock is about to be stopped
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534 and interrupts that execute while the clock is stopped will increase
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535 any slippage between the time maintained by the RTOS and calendar
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537 __asm volatile( "cpsid i" ::: "memory" );
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538 __asm volatile( "dsb" );
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539 __asm volatile( "isb" );
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541 /* Disable the SysTick clock without reading the
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542 portNVIC_SYSTICK_CTRL_REG register to ensure the
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543 portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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544 the time the SysTick is stopped for is accounted for as best it can
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545 be, but using the tickless mode will inevitably result in some tiny
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546 drift of the time maintained by the kernel with respect to calendar
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548 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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550 /* Determine if the SysTick clock has already counted to zero and
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551 been set back to the current reload value (the reload back being
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552 correct for the entire expected idle time) or if the SysTick is yet
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553 to count to zero (in which case an interrupt other than the SysTick
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554 must have brought the system out of sleep mode). */
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555 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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557 uint32_t ulCalculatedLoadValue;
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559 /* The tick interrupt is already pending, and the SysTick count
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560 reloaded with ulReloadValue. Reset the
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561 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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563 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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565 /* Don't allow a tiny value, or values that have somehow
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566 underflowed because the post sleep hook did something
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567 that took too long. */
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568 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
570 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
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573 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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575 /* As the pending tick will be processed as soon as this
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576 function exits, the tick value maintained by the tick is stepped
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577 forward by one less than the time spent waiting. */
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578 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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582 /* Something other than the tick interrupt ended the sleep.
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583 Work out how long the sleep lasted rounded to complete tick
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584 periods (not the ulReload value which accounted for part
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586 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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588 /* How many complete tick periods passed while the processor
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590 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
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592 /* The reload value is set to whatever fraction of a single tick
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594 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
597 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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598 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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600 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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601 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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602 vTaskStepTick( ulCompleteTickPeriods );
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603 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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605 /* Exit with interrupts enabled. */
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606 __asm volatile( "cpsie i" ::: "memory" );
\r
610 #endif /* configUSE_TICKLESS_IDLE */
\r
611 /*-----------------------------------------------------------*/
\r
614 * Setup the systick timer to generate the tick interrupts at the required
\r
617 __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
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619 /* Calculate the constants required to configure the tick interrupt. */
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620 #if( configUSE_TICKLESS_IDLE == 1 )
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622 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
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623 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
624 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
626 #endif /* configUSE_TICKLESS_IDLE */
\r
628 /* Stop and clear the SysTick. */
\r
629 portNVIC_SYSTICK_CTRL_REG = 0UL;
\r
630 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
632 /* Configure SysTick to interrupt at the requested rate. */
\r
633 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
634 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
636 /*-----------------------------------------------------------*/
\r
638 #if( configASSERT_DEFINED == 1 )
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640 void vPortValidateInterruptPriority( void )
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642 uint32_t ulCurrentInterrupt;
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643 uint8_t ucCurrentPriority;
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645 /* Obtain the number of the currently executing interrupt. */
\r
646 __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
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648 /* Is the interrupt number a user defined interrupt? */
\r
649 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
651 /* Look up the interrupt's priority. */
\r
652 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
654 /* The following assertion will fail if a service routine (ISR) for
\r
655 an interrupt that has been assigned a priority above
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656 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
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657 function. ISR safe FreeRTOS API functions must *only* be called
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658 from interrupts that have been assigned a priority at or below
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659 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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661 Numerically low interrupt priority numbers represent logically high
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662 interrupt priorities, therefore the priority of the interrupt must
\r
663 be set to a value equal to or numerically *higher* than
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664 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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666 Interrupts that use the FreeRTOS API must not be left at their
\r
667 default priority of zero as that is the highest possible priority,
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668 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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669 and therefore also guaranteed to be invalid.
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671 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
672 interrupt entry is as fast and simple as possible.
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674 The following links provide detailed information:
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675 http://www.freertos.org/RTOS-Cortex-M3-M4.html
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676 http://www.freertos.org/FAQHelp.html */
\r
677 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
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680 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
681 that define each interrupt's priority to be split between bits that
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682 define the interrupt's pre-emption priority bits and bits that define
\r
683 the interrupt's sub-priority. For simplicity all bits must be defined
\r
684 to be pre-emption priority bits. The following assertion will fail if
\r
685 this is not the case (if some bits represent a sub-priority).
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687 If the application only uses CMSIS libraries for interrupt
\r
688 configuration then the correct setting can be achieved on all Cortex-M
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689 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
690 scheduler. Note however that some vendor specific peripheral libraries
\r
691 assume a non-zero priority group setting, in which cases using a value
\r
692 of zero will result in unpredictable behaviour. */
\r
693 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
696 #endif /* configASSERT_DEFINED */
\r