git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V9.0.0rc1 - Copyright (C) 2016 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
  12 \r
  13     ***************************************************************************\r
  14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  16     >>!   obliged to provide the source code for proprietary components     !<<\r
  17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  18     ***************************************************************************\r
  19 \r
  20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  23     link: http://www.freertos.org/a00114.html\r
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  36      *                                                                       *\r
  37     ***************************************************************************\r
  38 \r
  39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
  40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
  41     defined configASSERT()?\r
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  63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  64     engineered and independently SIL3 certified version for use in safety and\r
  65     mission critical applications that require provable dependability.\r
  66 \r
  67     1 tab == 4 spaces!\r
  68 */\r
  69 \r
  70 /*-----------------------------------------------------------\r
  71  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  72  *----------------------------------------------------------*/\r
  73 \r
  74 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  75 all the API functions to use the MPU wrappers.  That should only be done when\r
  76 task.h is included from an application file. */\r
  77 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  78 \r
  79 /* Scheduler includes. */\r
  80 #include "FreeRTOS.h"\r
  81 #include "task.h"\r
  82 #include "queue.h"\r
  83 \r
  84 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  85 \r
  86 /* Constants required to access and manipulate the NVIC. */\r
  87 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile uint32_t * ) 0xe000e010 )\r
  88 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile uint32_t * ) 0xe000e014 )\r
  89 #define portNVIC_SYSPRI2                                                ( ( volatile uint32_t * ) 0xe000ed20 )\r
  90 #define portNVIC_SYSPRI1                                                ( ( volatile uint32_t * ) 0xe000ed1c )\r
  91 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile uint32_t * ) 0xe000ed24 )\r
  92 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  93 \r
  94 /* Constants required to access and manipulate the MPU. */\r
  95 #define portMPU_TYPE                                                    ( ( volatile uint32_t * ) 0xe000ed90 )\r
  96 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile uint32_t * ) 0xe000ed9C )\r
  97 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile uint32_t * ) 0xe000edA0 )\r
  98 #define portMPU_CTRL                                                    ( ( volatile uint32_t * ) 0xe000ed94 )\r
  99 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
 100 #define portMPU_ENABLE                                                  ( 0x01UL )\r
 101 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
 102 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
 103 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
 104 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
 105 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
 106 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
 107 \r
 108 /* Constants required to access and manipulate the SysTick. */\r
 109 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
 110 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
 111 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
 112 #define portNVIC_PENDSV_PRI                                             ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 113 #define portNVIC_SYSTICK_PRI                                    ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 114 #define portNVIC_SVC_PRI                                                ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 115 \r
 116 /* Constants required to set up the initial stack. */\r
 117 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
 118 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
 119 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
 120 \r
 121 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 122 #define portOFFSET_TO_PC                                                ( 6 )\r
 123 \r
 124 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 125 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )\r
 126 \r
 127 /* Each task maintains its own interrupt status in the critical nesting\r
 128 variable.  Note this is not saved as part of the task context as context\r
 129 switches can only occur when uxCriticalNesting is zero. */\r
 130 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
 131 \r
 132 /*\r
 133  * Setup the timer to generate the tick interrupts.\r
 134  */\r
 135 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 136 \r
 137 /*\r
 138  * Configure a number of standard MPU regions that are used by all tasks.\r
 139  */\r
 140 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 141 \r
 142 /*\r
 143  * Return the smallest MPU region size that a given number of bytes will fit\r
 144  * into.  The region size is returned as the value that should be programmed\r
 145  * into the region attribute register for that region.\r
 146  */\r
 147 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 148 \r
 149 /*\r
 150  * Checks to see if being called from the context of an unprivileged task, and\r
 151  * if so raises the privilege level and returns false - otherwise does nothing\r
 152  * other than return true.\r
 153  */\r
 154 static BaseType_t prvRaisePrivilege( void ) __attribute__(( naked ));\r
 155 \r
 156 /*\r
 157  * Standard FreeRTOS exception handlers.\r
 158  */\r
 159 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 160 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 161 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 162 \r
 163 /*\r
 164  * Starts the scheduler by restoring the context of the first task to run.\r
 165  */\r
 166 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 167 \r
 168 /*\r
 169  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 170  * and a C wrapper for simplicity of coding and maintenance.\r
 171  */\r
 172 static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 173 \r
 174 /*\r
 175  * Prototypes for all the MPU wrappers.\r
 176  */\r
 177 BaseType_t MPU_xTaskGenericCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions );\r
 178 void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions );\r
 179 void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete );\r
 180 void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement );\r
 181 void MPU_vTaskDelay( TickType_t xTicksToDelay );\r
 182 UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask );\r
 183 void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority );\r
 184 eTaskState MPU_eTaskGetState( TaskHandle_t pxTask );\r
 185 void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend );\r
 186 void MPU_vTaskResume( TaskHandle_t pxTaskToResume );\r
 187 void MPU_vTaskSuspendAll( void );\r
 188 BaseType_t MPU_xTaskResumeAll( void );\r
 189 TickType_t MPU_xTaskGetTickCount( void );\r
 190 UBaseType_t MPU_uxTaskGetNumberOfTasks( void );\r
 191 void MPU_vTaskList( char *pcWriteBuffer );\r
 192 void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer );\r
 193 void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue );\r
 194 TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask );\r
 195 BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );\r
 196 UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask );\r
 197 TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void );\r
 198 BaseType_t MPU_xTaskGetSchedulerState( void );\r
 199 TaskHandle_t MPU_xTaskGetIdleTaskHandle( void );\r
 200 UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime );\r
 201 QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType );\r
 202 BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );\r
 203 BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue );\r
 204 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue );\r
 205 BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );\r
 206 QueueHandle_t MPU_xQueueCreateMutex( void );\r
 207 QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount );\r
 208 BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime );\r
 209 BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex );\r
 210 void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName );\r
 211 void MPU_vQueueDelete( QueueHandle_t xQueue );\r
 212 void *MPU_pvPortMalloc( size_t xSize );\r
 213 void MPU_vPortFree( void *pv );\r
 214 void MPU_vPortInitialiseBlocks( void );\r
 215 size_t MPU_xPortGetFreeHeapSize( void );\r
 216 QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength );\r
 217 QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks );\r
 218 BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );\r
 219 BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );\r
 220 BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer );\r
 221 void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore );\r
 222 \r
 223 /*-----------------------------------------------------------*/\r
 224 \r
 225 /*\r
 226  * See header file for description.\r
 227  */\r
 228 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )\r
 229 {\r
 230         /* Simulate the stack frame as it would be created by a context switch\r
 231         interrupt. */\r
 232         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 233         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 234         pxTopOfStack--;\r
 235         *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
 236         pxTopOfStack--;\r
 237         *pxTopOfStack = 0;      /* LR */\r
 238         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 239         *pxTopOfStack = ( StackType_t ) pvParameters;   /* R0 */\r
 240         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 241 \r
 242         if( xRunPrivileged == pdTRUE )\r
 243         {\r
 244                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 245         }\r
 246         else\r
 247         {\r
 248                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 249         }\r
 250 \r
 251         return pxTopOfStack;\r
 252 }\r
 253 /*-----------------------------------------------------------*/\r
 254 \r
 255 void vPortSVCHandler( void )\r
 256 {\r
 257         /* Assumes psp was in use. */\r
 258         __asm volatile\r
 259         (\r
 260                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 261                         "       tst lr, #4                                              \n"\r
 262                         "       ite eq                                                  \n"\r
 263                         "       mrseq r0, msp                                   \n"\r
 264                         "       mrsne r0, psp                                   \n"\r
 265                 #else\r
 266                         "       mrs r0, psp                                             \n"\r
 267                 #endif\r
 268                         "       b %0                                                    \n"\r
 269                         ::"i"(prvSVCHandler):"r0"\r
 270         );\r
 271 }\r
 272 /*-----------------------------------------------------------*/\r
 273 \r
 274 static void prvSVCHandler(      uint32_t *pulParam )\r
 275 {\r
 276 uint8_t ucSVCNumber;\r
 277 \r
 278         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 279         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 280         ucSVCNumber = ( ( uint8_t * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 281         switch( ucSVCNumber )\r
 282         {\r
 283                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 284                                                                                         prvRestoreContextOfFirstTask();\r
 285                                                                                         break;\r
 286 \r
 287                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 288                                                                                         /* Barriers are normally not required\r
 289                                                                                         but do ensure the code is completely\r
 290                                                                                         within the specified behaviour for the\r
 291                                                                                         architecture. */\r
 292                                                                                         __asm volatile( "dsb" );\r
 293                                                                                         __asm volatile( "isb" );\r
 294 \r
 295                                                                                         break;\r
 296 \r
 297                 case portSVC_RAISE_PRIVILEGE    :       __asm volatile\r
 298                                                                                         (\r
 299                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 300                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 301                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 302                                                                                                 :::"r1"\r
 303                                                                                         );\r
 304                                                                                         break;\r
 305 \r
 306                 default                                                 :       /* Unknown SVC call. */\r
 307                                                                                         break;\r
 308         }\r
 309 }\r
 310 /*-----------------------------------------------------------*/\r
 311 \r
 312 static void prvRestoreContextOfFirstTask( void )\r
 313 {\r
 314         __asm volatile\r
 315         (\r
 316                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 317                 "       ldr r0, [r0]                                    \n"\r
 318                 "       ldr r0, [r0]                                    \n"\r
 319                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 320                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 321                 "       ldr r1, [r3]                                    \n"\r
 322                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 323                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 324                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 325                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 326                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 327                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 328                 "       msr control, r3                                 \n"\r
 329                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 330                 "       mov r0, #0                                              \n"\r
 331                 "       msr     basepri, r0                                     \n"\r
 332                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 333                 "       bx r14                                                  \n"\r
 334                 "                                                                       \n"\r
 335                 "       .align 4                                                \n"\r
 336                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 337         );\r
 338 }\r
 339 /*-----------------------------------------------------------*/\r
 340 \r
 341 /*\r
 342  * See header file for description.\r
 343  */\r
 344 BaseType_t xPortStartScheduler( void )\r
 345 {\r
 346         /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See\r
 347         http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
 348         configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );\r
 349 \r
 350         /* Make PendSV and SysTick the same priority as the kernel. */\r
 351         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 352         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 353 \r
 354         /* Configure the regions in the MPU that are common to all tasks. */\r
 355         prvSetupMPU();\r
 356 \r
 357         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 358         here already. */\r
 359         prvSetupTimerInterrupt();\r
 360 \r
 361         /* Initialise the critical nesting count ready for the first task. */\r
 362         uxCriticalNesting = 0;\r
 363 \r
 364         /* Start the first task. */\r
 365         __asm volatile( "       svc %0                  \n"\r
 366                                         :: "i" (portSVC_START_SCHEDULER) );\r
 367 \r
 368         /* Should not get here! */\r
 369         return 0;\r
 370 }\r
 371 /*-----------------------------------------------------------*/\r
 372 \r
 373 void vPortEndScheduler( void )\r
 374 {\r
 375         /* Not implemented in ports where there is nothing to return to.\r
 376         Artificially force an assert. */\r
 377         configASSERT( uxCriticalNesting == 1000UL );\r
 378 }\r
 379 /*-----------------------------------------------------------*/\r
 380 \r
 381 void vPortEnterCritical( void )\r
 382 {\r
 383 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 384 \r
 385         portDISABLE_INTERRUPTS();\r
 386         uxCriticalNesting++;\r
 387 \r
 388         portRESET_PRIVILEGE( xRunningPrivileged );\r
 389 }\r
 390 /*-----------------------------------------------------------*/\r
 391 \r
 392 void vPortExitCritical( void )\r
 393 {\r
 394 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 395 \r
 396         configASSERT( uxCriticalNesting );\r
 397         uxCriticalNesting--;\r
 398         if( uxCriticalNesting == 0 )\r
 399         {\r
 400                 portENABLE_INTERRUPTS();\r
 401         }\r
 402         portRESET_PRIVILEGE( xRunningPrivileged );\r
 403 }\r
 404 /*-----------------------------------------------------------*/\r
 405 \r
 406 void xPortPendSVHandler( void )\r
 407 {\r
 408         /* This is a naked function. */\r
 409 \r
 410         __asm volatile\r
 411         (\r
 412                 "       mrs r0, psp                                                     \n"\r
 413                 "                                                                               \n"\r
 414                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 415                 "       ldr     r2, [r3]                                                \n"\r
 416                 "                                                                               \n"\r
 417                 "       mrs r1, control                                         \n"\r
 418                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 419                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 420                 "                                                                               \n"\r
 421                 "       stmdb sp!, {r3, r14}                            \n"\r
 422                 "       mov r0, %0                                                      \n"\r
 423                 "       msr basepri, r0                                         \n"\r
 424                 "       bl vTaskSwitchContext                           \n"\r
 425                 "       mov r0, #0                                                      \n"\r
 426                 "       msr basepri, r0                                         \n"\r
 427                 "       ldmia sp!, {r3, r14}                            \n"\r
 428                 "                                                                               \n"     /* Restore the context. */\r
 429                 "       ldr r1, [r3]                                            \n"\r
 430                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 431                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 432                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 433                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 434                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 435                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 436                 "       msr control, r3                                         \n"\r
 437                 "                                                                               \n"\r
 438                 "       msr psp, r0                                                     \n"\r
 439                 "       bx r14                                                          \n"\r
 440                 "                                                                               \n"\r
 441                 "       .align 4                                                        \n"\r
 442                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 443                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 444         );\r
 445 }\r
 446 /*-----------------------------------------------------------*/\r
 447 \r
 448 void xPortSysTickHandler( void )\r
 449 {\r
 450 uint32_t ulDummy;\r
 451 \r
 452         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 453         {\r
 454                 /* Increment the RTOS tick. */\r
 455                 if( xTaskIncrementTick() != pdFALSE )\r
 456                 {\r
 457                         /* Pend a context switch. */\r
 458                         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 459                 }\r
 460         }\r
 461         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 462 }\r
 463 /*-----------------------------------------------------------*/\r
 464 \r
 465 /*\r
 466  * Setup the systick timer to generate the tick interrupts at the required\r
 467  * frequency.\r
 468  */\r
 469 static void prvSetupTimerInterrupt( void )\r
 470 {\r
 471         /* Configure SysTick to interrupt at the requested rate. */\r
 472         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 473         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 474 }\r
 475 /*-----------------------------------------------------------*/\r
 476 \r
 477 static void prvSetupMPU( void )\r
 478 {\r
 479 extern uint32_t __privileged_functions_end__[];\r
 480 extern uint32_t __FLASH_segment_start__[];\r
 481 extern uint32_t __FLASH_segment_end__[];\r
 482 extern uint32_t __privileged_data_start__[];\r
 483 extern uint32_t __privileged_data_end__[];\r
 484 \r
 485         /* Check the expected MPU is present. */\r
 486         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 487         {\r
 488                 /* First setup the entire flash for unprivileged read only access. */\r
 489         *portMPU_REGION_BASE_ADDRESS =  ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */\r
 490                                                                                 ( portMPU_REGION_VALID ) |\r
 491                                                                                 ( portUNPRIVILEGED_FLASH_REGION );\r
 492 \r
 493                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 494                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 495                                                                                 ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |\r
 496                                                                                 ( portMPU_REGION_ENABLE );\r
 497 \r
 498                 /* Setup the first 16K for privileged only access (even though less\r
 499                 than 10K is actually being used).  This is where the kernel code is\r
 500                 placed. */\r
 501         *portMPU_REGION_BASE_ADDRESS =  ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */\r
 502                                                                                 ( portMPU_REGION_VALID ) |\r
 503                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 504 \r
 505                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 506                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 507                                                                                 ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |\r
 508                                                                                 ( portMPU_REGION_ENABLE );\r
 509 \r
 510                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 511                 is placed. */\r
 512                 *portMPU_REGION_BASE_ADDRESS =  ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */\r
 513                                                                                 ( portMPU_REGION_VALID ) |\r
 514                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 515 \r
 516                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 517                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 518                                                                                 prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |\r
 519                                                                                 ( portMPU_REGION_ENABLE );\r
 520 \r
 521                 /* By default allow everything to access the general peripherals.  The\r
 522                 system peripherals and registers are protected. */\r
 523                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 524                                                                                 ( portMPU_REGION_VALID ) |\r
 525                                                                                 ( portGENERAL_PERIPHERALS_REGION );\r
 526 \r
 527                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 528                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 529                                                                                 ( portMPU_REGION_ENABLE );\r
 530 \r
 531                 /* Enable the memory fault exception. */\r
 532                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 533 \r
 534                 /* Enable the MPU with the background region configured. */\r
 535                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 536         }\r
 537 }\r
 538 /*-----------------------------------------------------------*/\r
 539 \r
 540 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )\r
 541 {\r
 542 uint32_t ulRegionSize, ulReturnValue = 4;\r
 543 \r
 544         /* 32 is the smallest region size, 31 is the largest valid value for\r
 545         ulReturnValue. */\r
 546         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 547         {\r
 548                 if( ulActualSizeInBytes <= ulRegionSize )\r
 549                 {\r
 550                         break;\r
 551                 }\r
 552                 else\r
 553                 {\r
 554                         ulReturnValue++;\r
 555                 }\r
 556         }\r
 557 \r
 558         /* Shift the code by one before returning so it can be written directly\r
 559         into the the correct bit position of the attribute register. */\r
 560         return ( ulReturnValue << 1UL );\r
 561 }\r
 562 /*-----------------------------------------------------------*/\r
 563 \r
 564 static BaseType_t prvRaisePrivilege( void )\r
 565 {\r
 566         __asm volatile\r
 567         (\r
 568                 "       mrs r0, control                                         \n"\r
 569                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 570                 "       itte ne                                                         \n"\r
 571                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 572                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 573                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 574                 "       bx lr                                                           \n"\r
 575                 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
 576         );\r
 577 \r
 578         return 0;\r
 579 }\r
 580 /*-----------------------------------------------------------*/\r
 581 \r
 582 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint16_t usStackDepth )\r
 583 {\r
 584 extern uint32_t __SRAM_segment_start__[];\r
 585 extern uint32_t __SRAM_segment_end__[];\r
 586 extern uint32_t __privileged_data_start__[];\r
 587 extern uint32_t __privileged_data_end__[];\r
 588 int32_t lIndex;\r
 589 uint32_t ul;\r
 590 \r
 591         if( xRegions == NULL )\r
 592         {\r
 593                 /* No MPU regions are specified so allow access to all RAM. */\r
 594         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 595                                 ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */\r
 596                                 ( portMPU_REGION_VALID ) |\r
 597                                 ( portSTACK_REGION );\r
 598 \r
 599                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 600                                 ( portMPU_REGION_READ_WRITE ) |\r
 601                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 602                                 ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |\r
 603                                 ( portMPU_REGION_ENABLE );\r
 604 \r
 605                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 606                 just removed the privileged only parameters. */\r
 607                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =\r
 608                                 ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */\r
 609                                 ( portMPU_REGION_VALID ) |\r
 610                                 ( portSTACK_REGION + 1 );\r
 611 \r
 612                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =\r
 613                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 614                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 615                                 prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |\r
 616                                 ( portMPU_REGION_ENABLE );\r
 617 \r
 618                 /* Invalidate all other regions. */\r
 619                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 620                 {\r
 621                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 622                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 623                 }\r
 624         }\r
 625         else\r
 626         {\r
 627                 /* This function is called automatically when the task is created - in\r
 628                 which case the stack region parameters will be valid.  At all other\r
 629                 times the stack parameters will not be valid and it is assumed that the\r
 630                 stack region has already been configured. */\r
 631                 if( usStackDepth > 0 )\r
 632                 {\r
 633                         /* Define the region that allows access to the stack. */\r
 634                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 635                                         ( ( uint32_t ) pxBottomOfStack ) |\r
 636                                         ( portMPU_REGION_VALID ) |\r
 637                                         ( portSTACK_REGION ); /* Region number. */\r
 638 \r
 639                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 640                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 641                                         ( prvGetMPURegionSizeSetting( ( uint32_t ) usStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |\r
 642                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 643                                         ( portMPU_REGION_ENABLE );\r
 644                 }\r
 645 \r
 646                 lIndex = 0;\r
 647 \r
 648                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 649                 {\r
 650                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 651                         {\r
 652                                 /* Translate the generic region definition contained in\r
 653                                 xRegions into the CM3 specific MPU settings that are then\r
 654                                 stored in xMPUSettings. */\r
 655                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =\r
 656                                                 ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |\r
 657                                                 ( portMPU_REGION_VALID ) |\r
 658                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 659 \r
 660                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute =\r
 661                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |\r
 662                                                 ( xRegions[ lIndex ].ulParameters ) |\r
 663                                                 ( portMPU_REGION_ENABLE );\r
 664                         }\r
 665                         else\r
 666                         {\r
 667                                 /* Invalidate the region. */\r
 668                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 669                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 670                         }\r
 671 \r
 672                         lIndex++;\r
 673                 }\r
 674         }\r
 675 }\r
 676 /*-----------------------------------------------------------*/\r
 677 \r
 678 BaseType_t MPU_xTaskGenericCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions )\r
 679 {\r
 680 BaseType_t xReturn;\r
 681 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 682 \r
 683         xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
 684         portRESET_PRIVILEGE( xRunningPrivileged );\r
 685         return xReturn;\r
 686 }\r
 687 /*-----------------------------------------------------------*/\r
 688 \r
 689 void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions )\r
 690 {\r
 691 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 692 \r
 693         vTaskAllocateMPURegions( xTask, xRegions );\r
 694         portRESET_PRIVILEGE( xRunningPrivileged );\r
 695 }\r
 696 /*-----------------------------------------------------------*/\r
 697 \r
 698 #if ( INCLUDE_vTaskDelete == 1 )\r
 699         void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete )\r
 700         {\r
 701     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 702 \r
 703                 vTaskDelete( pxTaskToDelete );\r
 704         portRESET_PRIVILEGE( xRunningPrivileged );\r
 705         }\r
 706 #endif\r
 707 /*-----------------------------------------------------------*/\r
 708 \r
 709 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 710         void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement )\r
 711         {\r
 712     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 713 \r
 714                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 715         portRESET_PRIVILEGE( xRunningPrivileged );\r
 716         }\r
 717 #endif\r
 718 /*-----------------------------------------------------------*/\r
 719 \r
 720 #if ( INCLUDE_vTaskDelay == 1 )\r
 721         void MPU_vTaskDelay( TickType_t xTicksToDelay )\r
 722         {\r
 723     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 724 \r
 725                 vTaskDelay( xTicksToDelay );\r
 726         portRESET_PRIVILEGE( xRunningPrivileged );\r
 727         }\r
 728 #endif\r
 729 /*-----------------------------------------------------------*/\r
 730 \r
 731 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 732         UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask )\r
 733         {\r
 734         UBaseType_t uxReturn;\r
 735     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 736 \r
 737                 uxReturn = uxTaskPriorityGet( pxTask );\r
 738         portRESET_PRIVILEGE( xRunningPrivileged );\r
 739                 return uxReturn;\r
 740         }\r
 741 #endif\r
 742 /*-----------------------------------------------------------*/\r
 743 \r
 744 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 745         void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority )\r
 746         {\r
 747     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 748 \r
 749                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 750         portRESET_PRIVILEGE( xRunningPrivileged );\r
 751         }\r
 752 #endif\r
 753 /*-----------------------------------------------------------*/\r
 754 \r
 755 #if ( INCLUDE_eTaskGetState == 1 )\r
 756         eTaskState MPU_eTaskGetState( TaskHandle_t pxTask )\r
 757         {\r
 758     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 759         eTaskState eReturn;\r
 760 \r
 761                 eReturn = eTaskGetState( pxTask );\r
 762         portRESET_PRIVILEGE( xRunningPrivileged );\r
 763                 return eReturn;\r
 764         }\r
 765 #endif\r
 766 /*-----------------------------------------------------------*/\r
 767 \r
 768 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
 769         TaskHandle_t MPU_xTaskGetIdleTaskHandle( void )\r
 770         {\r
 771         TaskHandle_t xReturn;\r
 772     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 773 \r
 774                 xReturn = xTaskGetIdleTaskHandle();\r
 775         portRESET_PRIVILEGE( xRunningPrivileged );\r
 776                 return eReturn;\r
 777         }\r
 778 #endif\r
 779 /*-----------------------------------------------------------*/\r
 780 \r
 781 #if ( INCLUDE_vTaskSuspend == 1 )\r
 782         void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend )\r
 783         {\r
 784     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 785 \r
 786                 vTaskSuspend( pxTaskToSuspend );\r
 787         portRESET_PRIVILEGE( xRunningPrivileged );\r
 788         }\r
 789 #endif\r
 790 /*-----------------------------------------------------------*/\r
 791 \r
 792 #if ( INCLUDE_vTaskSuspend == 1 )\r
 793         void MPU_vTaskResume( TaskHandle_t pxTaskToResume )\r
 794         {\r
 795     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 796 \r
 797                 vTaskResume( pxTaskToResume );\r
 798         portRESET_PRIVILEGE( xRunningPrivileged );\r
 799         }\r
 800 #endif\r
 801 /*-----------------------------------------------------------*/\r
 802 \r
 803 void MPU_vTaskSuspendAll( void )\r
 804 {\r
 805 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 806 \r
 807         vTaskSuspendAll();\r
 808     portRESET_PRIVILEGE( xRunningPrivileged );\r
 809 }\r
 810 /*-----------------------------------------------------------*/\r
 811 \r
 812 BaseType_t MPU_xTaskResumeAll( void )\r
 813 {\r
 814 BaseType_t xReturn;\r
 815 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 816 \r
 817         xReturn = xTaskResumeAll();\r
 818     portRESET_PRIVILEGE( xRunningPrivileged );\r
 819     return xReturn;\r
 820 }\r
 821 /*-----------------------------------------------------------*/\r
 822 \r
 823 TickType_t MPU_xTaskGetTickCount( void )\r
 824 {\r
 825 TickType_t xReturn;\r
 826 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 827 \r
 828         xReturn = xTaskGetTickCount();\r
 829     portRESET_PRIVILEGE( xRunningPrivileged );\r
 830         return xReturn;\r
 831 }\r
 832 /*-----------------------------------------------------------*/\r
 833 \r
 834 UBaseType_t MPU_uxTaskGetNumberOfTasks( void )\r
 835 {\r
 836 UBaseType_t uxReturn;\r
 837 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 838 \r
 839         uxReturn = uxTaskGetNumberOfTasks();\r
 840     portRESET_PRIVILEGE( xRunningPrivileged );\r
 841         return uxReturn;\r
 842 }\r
 843 /*-----------------------------------------------------------*/\r
 844 \r
 845 #if ( configUSE_TRACE_FACILITY == 1 )\r
 846         void MPU_vTaskList( char *pcWriteBuffer )\r
 847         {\r
 848         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 849 \r
 850                 vTaskList( pcWriteBuffer );\r
 851                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 852         }\r
 853 #endif\r
 854 /*-----------------------------------------------------------*/\r
 855 \r
 856 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 857         void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer )\r
 858         {\r
 859     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 860 \r
 861                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 862         portRESET_PRIVILEGE( xRunningPrivileged );\r
 863         }\r
 864 #endif\r
 865 /*-----------------------------------------------------------*/\r
 866 \r
 867 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 868         void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue )\r
 869         {\r
 870     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 871 \r
 872                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 873         portRESET_PRIVILEGE( xRunningPrivileged );\r
 874         }\r
 875 #endif\r
 876 /*-----------------------------------------------------------*/\r
 877 \r
 878 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 879         TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask )\r
 880         {\r
 881         TaskHookFunction_t xReturn;\r
 882     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 883 \r
 884                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 885         portRESET_PRIVILEGE( xRunningPrivileged );\r
 886                 return xReturn;\r
 887         }\r
 888 #endif\r
 889 /*-----------------------------------------------------------*/\r
 890 \r
 891 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 892         BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )\r
 893         {\r
 894         BaseType_t xReturn;\r
 895     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 896 \r
 897                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 898         portRESET_PRIVILEGE( xRunningPrivileged );\r
 899                 return xReturn;\r
 900         }\r
 901 #endif\r
 902 /*-----------------------------------------------------------*/\r
 903 \r
 904 #if ( configUSE_TRACE_FACILITY == 1 )\r
 905         UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime )\r
 906         {\r
 907         UBaseType_t uxReturn;\r
 908         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 909 \r
 910                 uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );\r
 911                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 912                 return uxReturn;\r
 913         }\r
 914 #endif\r
 915 /*-----------------------------------------------------------*/\r
 916 \r
 917 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 918         UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask )\r
 919         {\r
 920         UBaseType_t uxReturn;\r
 921     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 922 \r
 923                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 924         portRESET_PRIVILEGE( xRunningPrivileged );\r
 925                 return uxReturn;\r
 926         }\r
 927 #endif\r
 928 /*-----------------------------------------------------------*/\r
 929 \r
 930 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 931         TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void )\r
 932         {\r
 933         TaskHandle_t xReturn;\r
 934     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 935 \r
 936                 xReturn = xTaskGetCurrentTaskHandle();\r
 937         portRESET_PRIVILEGE( xRunningPrivileged );\r
 938                 return xReturn;\r
 939         }\r
 940 #endif\r
 941 /*-----------------------------------------------------------*/\r
 942 \r
 943 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
 944         BaseType_t MPU_xTaskGetSchedulerState( void )\r
 945         {\r
 946         BaseType_t xReturn;\r
 947     BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 948 \r
 949                 xReturn = xTaskGetSchedulerState();\r
 950         portRESET_PRIVILEGE( xRunningPrivileged );\r
 951                 return xReturn;\r
 952         }\r
 953 #endif\r
 954 /*-----------------------------------------------------------*/\r
 955 \r
 956 QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType )\r
 957 {\r
 958 QueueHandle_t xReturn;\r
 959 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 960 \r
 961         xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );\r
 962         portRESET_PRIVILEGE( xRunningPrivileged );\r
 963         return xReturn;\r
 964 }\r
 965 /*-----------------------------------------------------------*/\r
 966 \r
 967 BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue )\r
 968 {\r
 969 BaseType_t xReturn;\r
 970 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 971 \r
 972         xReturn = xQueueGenericReset( pxQueue, xNewQueue );\r
 973         portRESET_PRIVILEGE( xRunningPrivileged );\r
 974         return xReturn;\r
 975 }\r
 976 /*-----------------------------------------------------------*/\r
 977 \r
 978 BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )\r
 979 {\r
 980 BaseType_t xReturn;\r
 981 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 982 \r
 983         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 984         portRESET_PRIVILEGE( xRunningPrivileged );\r
 985         return xReturn;\r
 986 }\r
 987 /*-----------------------------------------------------------*/\r
 988 \r
 989 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue )\r
 990 {\r
 991 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 992 UBaseType_t uxReturn;\r
 993 \r
 994         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
 995         portRESET_PRIVILEGE( xRunningPrivileged );\r
 996         return uxReturn;\r
 997 }\r
 998 /*-----------------------------------------------------------*/\r
 999 \r
1000 BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )\r
1001 {\r
1002 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1003 BaseType_t xReturn;\r
1004 \r
1005         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1006         portRESET_PRIVILEGE( xRunningPrivileged );\r
1007         return xReturn;\r
1008 }\r
1009 /*-----------------------------------------------------------*/\r
1010 \r
1011 BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer )\r
1012 {\r
1013 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1014 BaseType_t xReturn;\r
1015 \r
1016         xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );\r
1017         portRESET_PRIVILEGE( xRunningPrivileged );\r
1018         return xReturn;\r
1019 }\r
1020 /*-----------------------------------------------------------*/\r
1021 \r
1022 void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore )\r
1023 {\r
1024 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1025 void * xReturn;\r
1026 \r
1027         xReturn = ( void * ) xQueueGetMutexHolder( xSemaphore );\r
1028         portRESET_PRIVILEGE( xRunningPrivileged );\r
1029         return xReturn;\r
1030 }\r
1031 /*-----------------------------------------------------------*/\r
1032 \r
1033 #if ( configUSE_MUTEXES == 1 )\r
1034         QueueHandle_t MPU_xQueueCreateMutex( void )\r
1035         {\r
1036     QueueHandle_t xReturn;\r
1037         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1038 \r
1039                 xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );\r
1040                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1041                 return xReturn;\r
1042         }\r
1043 #endif\r
1044 /*-----------------------------------------------------------*/\r
1045 \r
1046 #if configUSE_COUNTING_SEMAPHORES == 1\r
1047         QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount )\r
1048         {\r
1049     QueueHandle_t xReturn;\r
1050         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1051 \r
1052                 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
1053                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1054                 return xReturn;\r
1055         }\r
1056 #endif\r
1057 /*-----------------------------------------------------------*/\r
1058 \r
1059 #if ( configUSE_MUTEXES == 1 )\r
1060         BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime )\r
1061         {\r
1062         BaseType_t xReturn;\r
1063         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1064 \r
1065                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
1066                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1067                 return xReturn;\r
1068         }\r
1069 #endif\r
1070 /*-----------------------------------------------------------*/\r
1071 \r
1072 #if ( configUSE_MUTEXES == 1 )\r
1073         BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex )\r
1074         {\r
1075         BaseType_t xReturn;\r
1076         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1077 \r
1078                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
1079                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1080                 return xReturn;\r
1081         }\r
1082 #endif\r
1083 /*-----------------------------------------------------------*/\r
1084 \r
1085 #if ( configUSE_QUEUE_SETS == 1 )\r
1086         QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength )\r
1087         {\r
1088         QueueSetHandle_t xReturn;\r
1089         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1090 \r
1091                 xReturn = xQueueCreateSet( uxEventQueueLength );\r
1092                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1093                 return xReturn;\r
1094         }\r
1095 #endif\r
1096 /*-----------------------------------------------------------*/\r
1097 \r
1098 #if ( configUSE_QUEUE_SETS == 1 )\r
1099         QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks )\r
1100         {\r
1101         QueueSetMemberHandle_t xReturn;\r
1102         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1103 \r
1104                 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );\r
1105                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1106                 return xReturn;\r
1107         }\r
1108 #endif\r
1109 /*-----------------------------------------------------------*/\r
1110 \r
1111 #if ( configUSE_QUEUE_SETS == 1 )\r
1112         BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )\r
1113         {\r
1114         BaseType_t xReturn;\r
1115         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1116 \r
1117                 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );\r
1118                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1119                 return xReturn;\r
1120         }\r
1121 #endif\r
1122 /*-----------------------------------------------------------*/\r
1123 \r
1124 #if ( configUSE_QUEUE_SETS == 1 )\r
1125         BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )\r
1126         {\r
1127         BaseType_t xReturn;\r
1128         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1129 \r
1130                 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );\r
1131                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1132                 return xReturn;\r
1133         }\r
1134 #endif\r
1135 /*-----------------------------------------------------------*/\r
1136 \r
1137 #if configQUEUE_REGISTRY_SIZE > 0\r
1138         void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName )\r
1139         {\r
1140         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1141 \r
1142                 vQueueAddToRegistry( xQueue, pcName );\r
1143 \r
1144                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1145         }\r
1146 #endif\r
1147 /*-----------------------------------------------------------*/\r
1148 \r
1149 void MPU_vQueueDelete( QueueHandle_t xQueue )\r
1150 {\r
1151 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1152 \r
1153         vQueueDelete( xQueue );\r
1154 \r
1155         portRESET_PRIVILEGE( xRunningPrivileged );\r
1156 }\r
1157 /*-----------------------------------------------------------*/\r
1158 \r
1159 void *MPU_pvPortMalloc( size_t xSize )\r
1160 {\r
1161 void *pvReturn;\r
1162 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1163 \r
1164         pvReturn = pvPortMalloc( xSize );\r
1165 \r
1166         portRESET_PRIVILEGE( xRunningPrivileged );\r
1167 \r
1168         return pvReturn;\r
1169 }\r
1170 /*-----------------------------------------------------------*/\r
1171 \r
1172 void MPU_vPortFree( void *pv )\r
1173 {\r
1174 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1175 \r
1176         vPortFree( pv );\r
1177 \r
1178         portRESET_PRIVILEGE( xRunningPrivileged );\r
1179 }\r
1180 /*-----------------------------------------------------------*/\r
1181 \r
1182 void MPU_vPortInitialiseBlocks( void )\r
1183 {\r
1184 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1185 \r
1186         vPortInitialiseBlocks();\r
1187 \r
1188         portRESET_PRIVILEGE( xRunningPrivileged );\r
1189 }\r
1190 /*-----------------------------------------------------------*/\r
1191 \r
1192 size_t MPU_xPortGetFreeHeapSize( void )\r
1193 {\r
1194 size_t xReturn;\r
1195 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1196 \r
1197         xReturn = xPortGetFreeHeapSize();\r
1198 \r
1199         portRESET_PRIVILEGE( xRunningPrivileged );\r
1200 \r
1201         return xReturn;\r
1202 }\r
1203 \r
1204 /* Functions that the application writer wants to execute in privileged mode\r
1205 can be defined in application_defined_privileged_functions.h.  The functions\r
1206 must take the same format as those above whereby the privilege state on exit\r
1207 equals the privilege state on entry.  For example:\r
1208 \r
1209 void MPU_FunctionName( [parameters ] )\r
1210 {\r
1211 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1212 \r
1213         FunctionName( [parameters ] );\r
1214 \r
1215         portRESET_PRIVILEGE( xRunningPrivileged );\r
1216 }\r
1217 */\r
1218 \r
1219 #if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1\r
1220         #include "application_defined_privileged_functions.h"\r
1221 #endif\r
1222 \r