git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V7.5.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   5 \r
   6     ***************************************************************************\r
   7      *                                                                       *\r
   8      *    FreeRTOS provides completely free yet professionally developed,    *\r
   9      *    robust, strictly quality controlled, supported, and cross          *\r
  10      *    platform software that has become a de facto standard.             *\r
  11      *                                                                       *\r
  12      *    Help yourself get started quickly and support the FreeRTOS         *\r
  13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  15      *                                                                       *\r
  16      *    Thank you!                                                         *\r
  17      *                                                                       *\r
  18     ***************************************************************************\r
  19 \r
  20     This file is part of the FreeRTOS distribution.\r
  21 \r
  22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  23     the terms of the GNU General Public License (version 2) as published by the\r
  24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  25 \r
  26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
  27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
  28     >>! the source code for proprietary components outside of the FreeRTOS\r
  29     >>! kernel.\r
  30 \r
  31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  34     link: http://www.freertos.org/a00114.html\r
  35 \r
  36     1 tab == 4 spaces!\r
  37 \r
  38     ***************************************************************************\r
  39      *                                                                       *\r
  40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  41      *    not run, what could be wrong?"                                     *\r
  42      *                                                                       *\r
  43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  44      *                                                                       *\r
  45     ***************************************************************************\r
  46 \r
  47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  48     license and Real Time Engineers Ltd. contact details.\r
  49 \r
  50     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  51     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  52     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  53 \r
  54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  55     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  56     licenses offer ticketed support, indemnification and middleware.\r
  57 \r
  58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  59     engineered and independently SIL3 certified version for use in safety and\r
  60     mission critical applications that require provable dependability.\r
  61 \r
  62     1 tab == 4 spaces!\r
  63 */\r
  64 \r
  65 /*-----------------------------------------------------------\r
  66  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  67  *----------------------------------------------------------*/\r
  68 \r
  69 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  70 all the API functions to use the MPU wrappers.  That should only be done when\r
  71 task.h is included from an application file. */\r
  72 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  73 \r
  74 /* Scheduler includes. */\r
  75 #include "FreeRTOS.h"\r
  76 #include "task.h"\r
  77 #include "queue.h"\r
  78 \r
  79 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  80 \r
  81 /* Constants required to access and manipulate the NVIC. */\r
  82 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile unsigned long * ) 0xe000e010 )\r
  83 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile unsigned long * ) 0xe000e014 )\r
  84 #define portNVIC_SYSPRI2                                                ( ( volatile unsigned long * ) 0xe000ed20 )\r
  85 #define portNVIC_SYSPRI1                                                ( ( volatile unsigned long * ) 0xe000ed1c )\r
  86 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile unsigned long * ) 0xe000ed24 )\r
  87 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  88 \r
  89 /* Constants required to access and manipulate the MPU. */\r
  90 #define portMPU_TYPE                                                    ( ( volatile unsigned long * ) 0xe000ed90 )\r
  91 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile unsigned long * ) 0xe000ed9C )\r
  92 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile unsigned long * ) 0xe000edA0 )\r
  93 #define portMPU_CTRL                                                    ( ( volatile unsigned long * ) 0xe000ed94 )\r
  94 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
  95 #define portMPU_ENABLE                                                  ( 0x01UL )\r
  96 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
  97 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
  98 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
  99 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
 100 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
 101 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
 102 \r
 103 /* Constants required to access and manipulate the SysTick. */\r
 104 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
 105 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
 106 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
 107 #define portNVIC_PENDSV_PRI                                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 108 #define portNVIC_SYSTICK_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 109 #define portNVIC_SVC_PRI                                                ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 110 \r
 111 /* Constants required to set up the initial stack. */\r
 112 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
 113 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
 114 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
 115 \r
 116 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 117 #define portOFFSET_TO_PC                                                ( 6 )\r
 118 \r
 119 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 120 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )\r
 121 \r
 122 /* Each task maintains its own interrupt status in the critical nesting\r
 123 variable.  Note this is not saved as part of the task context as context\r
 124 switches can only occur when uxCriticalNesting is zero. */\r
 125 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 126 \r
 127 /*\r
 128  * Setup the timer to generate the tick interrupts.\r
 129  */\r
 130 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 131 \r
 132 /*\r
 133  * Configure a number of standard MPU regions that are used by all tasks.\r
 134  */\r
 135 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 136 \r
 137 /*\r
 138  * Return the smallest MPU region size that a given number of bytes will fit\r
 139  * into.  The region size is returned as the value that should be programmed\r
 140  * into the region attribute register for that region.\r
 141  */\r
 142 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 143 \r
 144 /*\r
 145  * Checks to see if being called from the context of an unprivileged task, and\r
 146  * if so raises the privilege level and returns false - otherwise does nothing\r
 147  * other than return true.\r
 148  */\r
 149 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
 150 \r
 151 /*\r
 152  * Standard FreeRTOS exception handlers.\r
 153  */\r
 154 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 155 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 156 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 157 \r
 158 /*\r
 159  * Starts the scheduler by restoring the context of the first task to run.\r
 160  */\r
 161 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 162 \r
 163 /*\r
 164  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 165  * and a C wrapper for simplicity of coding and maintenance.\r
 166  */\r
 167 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 168 \r
 169 /*\r
 170  * Prototypes for all the MPU wrappers.\r
 171  */\r
 172 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );\r
 173 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );\r
 174 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );\r
 175 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );\r
 176 void MPU_vTaskDelay( portTickType xTicksToDelay );\r
 177 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );\r
 178 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );\r
 179 eTaskState MPU_eTaskGetState( xTaskHandle pxTask );\r
 180 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );\r
 181 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );\r
 182 void MPU_vTaskResume( xTaskHandle pxTaskToResume );\r
 183 void MPU_vTaskSuspendAll( void );\r
 184 signed portBASE_TYPE MPU_xTaskResumeAll( void );\r
 185 portTickType MPU_xTaskGetTickCount( void );\r
 186 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );\r
 187 void MPU_vTaskList( signed char *pcWriteBuffer );\r
 188 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer );\r
 189 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );\r
 190 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );\r
 191 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );\r
 192 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );\r
 193 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );\r
 194 portBASE_TYPE MPU_xTaskGetSchedulerState( void );\r
 195 xTaskHandle MPU_xTaskGetIdleTaskHandle( void );\r
 196 unsigned portBASE_TYPE MPU_uxTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime );\r
 197 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );\r
 198 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 199 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue );\r
 200 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
 201 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 202 xQueueHandle MPU_xQueueCreateMutex( void );\r
 203 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );\r
 204 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );\r
 205 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );\r
 206 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 207 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 208 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName );\r
 209 void MPU_vQueueDelete( xQueueHandle xQueue );\r
 210 void *MPU_pvPortMalloc( size_t xSize );\r
 211 void MPU_vPortFree( void *pv );\r
 212 void MPU_vPortInitialiseBlocks( void );\r
 213 size_t MPU_xPortGetFreeHeapSize( void );\r
 214 xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength );\r
 215 xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks );\r
 216 portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
 217 portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
 218 signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle xQueue, void * const pvBuffer );\r
 219 \r
 220 /*-----------------------------------------------------------*/\r
 221 \r
 222 /*\r
 223  * See header file for description.\r
 224  */\r
 225 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
 226 {\r
 227         /* Simulate the stack frame as it would be created by a context switch\r
 228         interrupt. */\r
 229         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 230         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 231         pxTopOfStack--;\r
 232         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 233         pxTopOfStack--;\r
 234         *pxTopOfStack = 0;      /* LR */\r
 235         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 236         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 237         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 238 \r
 239         if( xRunPrivileged == pdTRUE )\r
 240         {\r
 241                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 242         }\r
 243         else\r
 244         {\r
 245                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 246         }\r
 247 \r
 248         return pxTopOfStack;\r
 249 }\r
 250 /*-----------------------------------------------------------*/\r
 251 \r
 252 void vPortSVCHandler( void )\r
 253 {\r
 254         /* Assumes psp was in use. */\r
 255         __asm volatile\r
 256         (\r
 257                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 258                         "       tst lr, #4                                              \n"\r
 259                         "       ite eq                                                  \n"\r
 260                         "       mrseq r0, msp                                   \n"\r
 261                         "       mrsne r0, psp                                   \n"\r
 262                 #else\r
 263                         "       mrs r0, psp                                             \n"\r
 264                 #endif\r
 265                         "       b %0                                                    \n"\r
 266                         ::"i"(prvSVCHandler):"r0"\r
 267         );\r
 268 }\r
 269 /*-----------------------------------------------------------*/\r
 270 \r
 271 static void prvSVCHandler(      unsigned long *pulParam )\r
 272 {\r
 273 unsigned char ucSVCNumber;\r
 274 \r
 275         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 276         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 277         ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 278         switch( ucSVCNumber )\r
 279         {\r
 280                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 281                                                                                         prvRestoreContextOfFirstTask();\r
 282                                                                                         break;\r
 283 \r
 284                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 285                                                                                         /* Barriers are normally not required\r
 286                                                                                         but do ensure the code is completely\r
 287                                                                                         within the specified behaviour for the\r
 288                                                                                         architecture. */\r
 289                                                                                         __asm volatile( "dsb" );\r
 290                                                                                         __asm volatile( "isb" );\r
 291 \r
 292                                                                                         break;\r
 293 \r
 294                 case portSVC_RAISE_PRIVILEGE    :       __asm volatile\r
 295                                                                                         (\r
 296                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 297                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 298                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 299                                                                                                 :::"r1"\r
 300                                                                                         );\r
 301                                                                                         break;\r
 302 \r
 303                 default                                                 :       /* Unknown SVC call. */\r
 304                                                                                         break;\r
 305         }\r
 306 }\r
 307 /*-----------------------------------------------------------*/\r
 308 \r
 309 static void prvRestoreContextOfFirstTask( void )\r
 310 {\r
 311         __asm volatile\r
 312         (\r
 313                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 314                 "       ldr r0, [r0]                                    \n"\r
 315                 "       ldr r0, [r0]                                    \n"\r
 316                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 317                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 318                 "       ldr r1, [r3]                                    \n"\r
 319                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 320                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 321                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 322                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 323                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 324                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 325                 "       msr control, r3                                 \n"\r
 326                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 327                 "       mov r0, #0                                              \n"\r
 328                 "       msr     basepri, r0                                     \n"\r
 329                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 330                 "       bx r14                                                  \n"\r
 331                 "                                                                       \n"\r
 332                 "       .align 2                                                \n"\r
 333                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 334         );\r
 335 }\r
 336 /*-----------------------------------------------------------*/\r
 337 \r
 338 /*\r
 339  * See header file for description.\r
 340  */\r
 341 portBASE_TYPE xPortStartScheduler( void )\r
 342 {\r
 343         /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See\r
 344         http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
 345         configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );\r
 346 \r
 347         /* Make PendSV and SysTick the same priority as the kernel. */\r
 348         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 349         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 350 \r
 351         /* Configure the regions in the MPU that are common to all tasks. */\r
 352         prvSetupMPU();\r
 353 \r
 354         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 355         here already. */\r
 356         prvSetupTimerInterrupt();\r
 357 \r
 358         /* Initialise the critical nesting count ready for the first task. */\r
 359         uxCriticalNesting = 0;\r
 360 \r
 361         /* Start the first task. */\r
 362         __asm volatile( "       svc %0                  \n"\r
 363                                         :: "i" (portSVC_START_SCHEDULER) );\r
 364 \r
 365         /* Should not get here! */\r
 366         return 0;\r
 367 }\r
 368 /*-----------------------------------------------------------*/\r
 369 \r
 370 void vPortEndScheduler( void )\r
 371 {\r
 372         /* It is unlikely that the CM3 port will require this function as there\r
 373         is nothing to return to.  */\r
 374 }\r
 375 /*-----------------------------------------------------------*/\r
 376 \r
 377 void vPortEnterCritical( void )\r
 378 {\r
 379 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 380 \r
 381         portDISABLE_INTERRUPTS();\r
 382         uxCriticalNesting++;\r
 383 \r
 384         portRESET_PRIVILEGE( xRunningPrivileged );\r
 385 }\r
 386 /*-----------------------------------------------------------*/\r
 387 \r
 388 void vPortExitCritical( void )\r
 389 {\r
 390 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 391 \r
 392         uxCriticalNesting--;\r
 393         if( uxCriticalNesting == 0 )\r
 394         {\r
 395                 portENABLE_INTERRUPTS();\r
 396         }\r
 397         portRESET_PRIVILEGE( xRunningPrivileged );\r
 398 }\r
 399 /*-----------------------------------------------------------*/\r
 400 \r
 401 void xPortPendSVHandler( void )\r
 402 {\r
 403         /* This is a naked function. */\r
 404 \r
 405         __asm volatile\r
 406         (\r
 407                 "       mrs r0, psp                                                     \n"\r
 408                 "                                                                               \n"\r
 409                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 410                 "       ldr     r2, [r3]                                                \n"\r
 411                 "                                                                               \n"\r
 412                 "       mrs r1, control                                         \n"\r
 413                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 414                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 415                 "                                                                               \n"\r
 416                 "       stmdb sp!, {r3, r14}                            \n"\r
 417                 "       mov r0, %0                                                      \n"\r
 418                 "       msr basepri, r0                                         \n"\r
 419                 "       bl vTaskSwitchContext                           \n"\r
 420                 "       mov r0, #0                                                      \n"\r
 421                 "       msr basepri, r0                                         \n"\r
 422                 "       ldmia sp!, {r3, r14}                            \n"\r
 423                 "                                                                               \n"     /* Restore the context. */\r
 424                 "       ldr r1, [r3]                                            \n"\r
 425                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 426                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 427                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 428                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 429                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 430                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 431                 "       msr control, r3                                         \n"\r
 432                 "                                                                               \n"\r
 433                 "       msr psp, r0                                                     \n"\r
 434                 "       bx r14                                                          \n"\r
 435                 "                                                                               \n"\r
 436                 "       .align 2                                                        \n"\r
 437                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 438                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 439         );\r
 440 }\r
 441 /*-----------------------------------------------------------*/\r
 442 \r
 443 void xPortSysTickHandler( void )\r
 444 {\r
 445 unsigned long ulDummy;\r
 446 \r
 447         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 448         {\r
 449                 /* Increment the RTOS tick. */\r
 450                 if( xTaskIncrementTick() != pdFALSE )\r
 451                 {\r
 452                         /* Pend a context switch. */\r
 453                         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 454                 }\r
 455         }\r
 456         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 457 }\r
 458 /*-----------------------------------------------------------*/\r
 459 \r
 460 /*\r
 461  * Setup the systick timer to generate the tick interrupts at the required\r
 462  * frequency.\r
 463  */\r
 464 static void prvSetupTimerInterrupt( void )\r
 465 {\r
 466         /* Configure SysTick to interrupt at the requested rate. */\r
 467         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 468         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 469 }\r
 470 /*-----------------------------------------------------------*/\r
 471 \r
 472 static void prvSetupMPU( void )\r
 473 {\r
 474 extern unsigned long __privileged_functions_end__[];\r
 475 extern unsigned long __FLASH_segment_start__[];\r
 476 extern unsigned long __FLASH_segment_end__[];\r
 477 extern unsigned long __privileged_data_start__[];\r
 478 extern unsigned long __privileged_data_end__[];\r
 479 \r
 480         /* Check the expected MPU is present. */\r
 481         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 482         {\r
 483                 /* First setup the entire flash for unprivileged read only access. */\r
 484         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 485                                                                                 ( portMPU_REGION_VALID ) |\r
 486                                                                                 ( portUNPRIVILEGED_FLASH_REGION );\r
 487 \r
 488                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 489                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 490                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 491                                                                                 ( portMPU_REGION_ENABLE );\r
 492 \r
 493                 /* Setup the first 16K for privileged only access (even though less\r
 494                 than 10K is actually being used).  This is where the kernel code is\r
 495                 placed. */\r
 496         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 497                                                                                 ( portMPU_REGION_VALID ) |\r
 498                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 499 \r
 500                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 501                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 502                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 503                                                                                 ( portMPU_REGION_ENABLE );\r
 504 \r
 505                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 506                 is placed. */\r
 507                 *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 508                                                                                 ( portMPU_REGION_VALID ) |\r
 509                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 510 \r
 511                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 512                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 513                                                                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 514                                                                                 ( portMPU_REGION_ENABLE );\r
 515 \r
 516                 /* By default allow everything to access the general peripherals.  The\r
 517                 system peripherals and registers are protected. */\r
 518                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 519                                                                                 ( portMPU_REGION_VALID ) |\r
 520                                                                                 ( portGENERAL_PERIPHERALS_REGION );\r
 521 \r
 522                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 523                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 524                                                                                 ( portMPU_REGION_ENABLE );\r
 525 \r
 526                 /* Enable the memory fault exception. */\r
 527                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 528 \r
 529                 /* Enable the MPU with the background region configured. */\r
 530                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 531         }\r
 532 }\r
 533 /*-----------------------------------------------------------*/\r
 534 \r
 535 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
 536 {\r
 537 unsigned long ulRegionSize, ulReturnValue = 4;\r
 538 \r
 539         /* 32 is the smallest region size, 31 is the largest valid value for\r
 540         ulReturnValue. */\r
 541         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 542         {\r
 543                 if( ulActualSizeInBytes <= ulRegionSize )\r
 544                 {\r
 545                         break;\r
 546                 }\r
 547                 else\r
 548                 {\r
 549                         ulReturnValue++;\r
 550                 }\r
 551         }\r
 552 \r
 553         /* Shift the code by one before returning so it can be written directly\r
 554         into the the correct bit position of the attribute register. */\r
 555         return ( ulReturnValue << 1UL );\r
 556 }\r
 557 /*-----------------------------------------------------------*/\r
 558 \r
 559 static portBASE_TYPE prvRaisePrivilege( void )\r
 560 {\r
 561         __asm volatile\r
 562         (\r
 563                 "       mrs r0, control                                         \n"\r
 564                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 565                 "       itte ne                                                         \n"\r
 566                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 567                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 568                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 569                 "       bx lr                                                           \n"\r
 570                 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
 571         );\r
 572 \r
 573         return 0;\r
 574 }\r
 575 /*-----------------------------------------------------------*/\r
 576 \r
 577 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )\r
 578 {\r
 579 extern unsigned long __SRAM_segment_start__[];\r
 580 extern unsigned long __SRAM_segment_end__[];\r
 581 extern unsigned long __privileged_data_start__[];\r
 582 extern unsigned long __privileged_data_end__[];\r
 583 long lIndex;\r
 584 unsigned long ul;\r
 585 \r
 586         if( xRegions == NULL )\r
 587         {\r
 588                 /* No MPU regions are specified so allow access to all RAM. */\r
 589         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 590                                 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
 591                                 ( portMPU_REGION_VALID ) |\r
 592                                 ( portSTACK_REGION );\r
 593 \r
 594                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 595                                 ( portMPU_REGION_READ_WRITE ) |\r
 596                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 597                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
 598                                 ( portMPU_REGION_ENABLE );\r
 599 \r
 600                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 601                 just removed the privileged only parameters. */\r
 602                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =\r
 603                                 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 604                                 ( portMPU_REGION_VALID ) |\r
 605                                 ( portSTACK_REGION + 1 );\r
 606 \r
 607                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =\r
 608                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 609                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 610                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 611                                 ( portMPU_REGION_ENABLE );\r
 612 \r
 613                 /* Invalidate all other regions. */\r
 614                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 615                 {\r
 616                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 617                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 618                 }\r
 619         }\r
 620         else\r
 621         {\r
 622                 /* This function is called automatically when the task is created - in\r
 623                 which case the stack region parameters will be valid.  At all other\r
 624                 times the stack parameters will not be valid and it is assumed that the\r
 625                 stack region has already been configured. */\r
 626                 if( usStackDepth > 0 )\r
 627                 {\r
 628                         /* Define the region that allows access to the stack. */\r
 629                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 630                                         ( ( unsigned long ) pxBottomOfStack ) |\r
 631                                         ( portMPU_REGION_VALID ) |\r
 632                                         ( portSTACK_REGION ); /* Region number. */\r
 633 \r
 634                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 635                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 636                                         ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |\r
 637                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 638                                         ( portMPU_REGION_ENABLE );\r
 639                 }\r
 640 \r
 641                 lIndex = 0;\r
 642 \r
 643                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 644                 {\r
 645                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 646                         {\r
 647                                 /* Translate the generic region definition contained in\r
 648                                 xRegions into the CM3 specific MPU settings that are then\r
 649                                 stored in xMPUSettings. */\r
 650                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =\r
 651                                                 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |\r
 652                                                 ( portMPU_REGION_VALID ) |\r
 653                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 654 \r
 655                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute =\r
 656                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |\r
 657                                                 ( xRegions[ lIndex ].ulParameters ) |\r
 658                                                 ( portMPU_REGION_ENABLE );\r
 659                         }\r
 660                         else\r
 661                         {\r
 662                                 /* Invalidate the region. */\r
 663                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 664                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 665                         }\r
 666 \r
 667                         lIndex++;\r
 668                 }\r
 669         }\r
 670 }\r
 671 /*-----------------------------------------------------------*/\r
 672 \r
 673 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
 674 {\r
 675 signed portBASE_TYPE xReturn;\r
 676 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 677 \r
 678         xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
 679         portRESET_PRIVILEGE( xRunningPrivileged );\r
 680         return xReturn;\r
 681 }\r
 682 /*-----------------------------------------------------------*/\r
 683 \r
 684 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
 685 {\r
 686 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 687 \r
 688         vTaskAllocateMPURegions( xTask, xRegions );\r
 689         portRESET_PRIVILEGE( xRunningPrivileged );\r
 690 }\r
 691 /*-----------------------------------------------------------*/\r
 692 \r
 693 #if ( INCLUDE_vTaskDelete == 1 )\r
 694         void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
 695         {\r
 696     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 697 \r
 698                 vTaskDelete( pxTaskToDelete );\r
 699         portRESET_PRIVILEGE( xRunningPrivileged );\r
 700         }\r
 701 #endif\r
 702 /*-----------------------------------------------------------*/\r
 703 \r
 704 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 705         void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
 706         {\r
 707     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 708 \r
 709                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 710         portRESET_PRIVILEGE( xRunningPrivileged );\r
 711         }\r
 712 #endif\r
 713 /*-----------------------------------------------------------*/\r
 714 \r
 715 #if ( INCLUDE_vTaskDelay == 1 )\r
 716         void MPU_vTaskDelay( portTickType xTicksToDelay )\r
 717         {\r
 718     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 719 \r
 720                 vTaskDelay( xTicksToDelay );\r
 721         portRESET_PRIVILEGE( xRunningPrivileged );\r
 722         }\r
 723 #endif\r
 724 /*-----------------------------------------------------------*/\r
 725 \r
 726 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 727         unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
 728         {\r
 729         unsigned portBASE_TYPE uxReturn;\r
 730     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 731 \r
 732                 uxReturn = uxTaskPriorityGet( pxTask );\r
 733         portRESET_PRIVILEGE( xRunningPrivileged );\r
 734                 return uxReturn;\r
 735         }\r
 736 #endif\r
 737 /*-----------------------------------------------------------*/\r
 738 \r
 739 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 740         void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
 741         {\r
 742     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 743 \r
 744                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 745         portRESET_PRIVILEGE( xRunningPrivileged );\r
 746         }\r
 747 #endif\r
 748 /*-----------------------------------------------------------*/\r
 749 \r
 750 #if ( INCLUDE_eTaskGetState == 1 )\r
 751         eTaskState MPU_eTaskGetState( xTaskHandle pxTask )\r
 752         {\r
 753     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 754         eTaskState eReturn;\r
 755 \r
 756                 eReturn = eTaskGetState( pxTask );\r
 757         portRESET_PRIVILEGE( xRunningPrivileged );\r
 758                 return eReturn;\r
 759         }\r
 760 #endif\r
 761 /*-----------------------------------------------------------*/\r
 762 \r
 763 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
 764         xTaskHandle MPU_xTaskGetIdleTaskHandle( void )\r
 765         {\r
 766         xTaskHandle xReturn;\r
 767     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 768 \r
 769                 xReturn = xTaskGetIdleTaskHandle();\r
 770         portRESET_PRIVILEGE( xRunningPrivileged );\r
 771                 return eReturn;\r
 772         }\r
 773 #endif\r
 774 /*-----------------------------------------------------------*/\r
 775 \r
 776 #if ( INCLUDE_vTaskSuspend == 1 )\r
 777         void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
 778         {\r
 779     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 780 \r
 781                 vTaskSuspend( pxTaskToSuspend );\r
 782         portRESET_PRIVILEGE( xRunningPrivileged );\r
 783         }\r
 784 #endif\r
 785 /*-----------------------------------------------------------*/\r
 786 \r
 787 #if ( INCLUDE_vTaskSuspend == 1 )\r
 788         signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
 789         {\r
 790         signed portBASE_TYPE xReturn;\r
 791     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 792 \r
 793                 xReturn = xTaskIsTaskSuspended( xTask );\r
 794         portRESET_PRIVILEGE( xRunningPrivileged );\r
 795                 return xReturn;\r
 796         }\r
 797 #endif\r
 798 /*-----------------------------------------------------------*/\r
 799 \r
 800 #if ( INCLUDE_vTaskSuspend == 1 )\r
 801         void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
 802         {\r
 803     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 804 \r
 805                 vTaskResume( pxTaskToResume );\r
 806         portRESET_PRIVILEGE( xRunningPrivileged );\r
 807         }\r
 808 #endif\r
 809 /*-----------------------------------------------------------*/\r
 810 \r
 811 void MPU_vTaskSuspendAll( void )\r
 812 {\r
 813 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 814 \r
 815         vTaskSuspendAll();\r
 816     portRESET_PRIVILEGE( xRunningPrivileged );\r
 817 }\r
 818 /*-----------------------------------------------------------*/\r
 819 \r
 820 signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
 821 {\r
 822 signed portBASE_TYPE xReturn;\r
 823 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 824 \r
 825         xReturn = xTaskResumeAll();\r
 826     portRESET_PRIVILEGE( xRunningPrivileged );\r
 827     return xReturn;\r
 828 }\r
 829 /*-----------------------------------------------------------*/\r
 830 \r
 831 portTickType MPU_xTaskGetTickCount( void )\r
 832 {\r
 833 portTickType xReturn;\r
 834 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 835 \r
 836         xReturn = xTaskGetTickCount();\r
 837     portRESET_PRIVILEGE( xRunningPrivileged );\r
 838         return xReturn;\r
 839 }\r
 840 /*-----------------------------------------------------------*/\r
 841 \r
 842 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
 843 {\r
 844 unsigned portBASE_TYPE uxReturn;\r
 845 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 846 \r
 847         uxReturn = uxTaskGetNumberOfTasks();\r
 848     portRESET_PRIVILEGE( xRunningPrivileged );\r
 849         return uxReturn;\r
 850 }\r
 851 /*-----------------------------------------------------------*/\r
 852 \r
 853 #if ( configUSE_TRACE_FACILITY == 1 )\r
 854         void MPU_vTaskList( signed char *pcWriteBuffer )\r
 855         {\r
 856         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 857 \r
 858                 vTaskList( pcWriteBuffer );\r
 859                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 860         }\r
 861 #endif\r
 862 /*-----------------------------------------------------------*/\r
 863 \r
 864 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 865         void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
 866         {\r
 867     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 868 \r
 869                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 870         portRESET_PRIVILEGE( xRunningPrivileged );\r
 871         }\r
 872 #endif\r
 873 /*-----------------------------------------------------------*/\r
 874 \r
 875 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 876         void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
 877         {\r
 878     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 879 \r
 880                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 881         portRESET_PRIVILEGE( xRunningPrivileged );\r
 882         }\r
 883 #endif\r
 884 /*-----------------------------------------------------------*/\r
 885 \r
 886 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 887         pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
 888         {\r
 889         pdTASK_HOOK_CODE xReturn;\r
 890     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 891 \r
 892                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 893         portRESET_PRIVILEGE( xRunningPrivileged );\r
 894                 return xReturn;\r
 895         }\r
 896 #endif\r
 897 /*-----------------------------------------------------------*/\r
 898 \r
 899 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 900         portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
 901         {\r
 902         portBASE_TYPE xReturn;\r
 903     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 904 \r
 905                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 906         portRESET_PRIVILEGE( xRunningPrivileged );\r
 907                 return xReturn;\r
 908         }\r
 909 #endif\r
 910 /*-----------------------------------------------------------*/\r
 911 \r
 912 #if ( configUSE_TRACE_FACILITY == 1 )\r
 913         unsigned portBASE_TYPE MPU_uxTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime )\r
 914         {\r
 915         unsigned portBASE_TYPE uxReturn;\r
 916         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 917 \r
 918                 uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );\r
 919                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 920                 return xReturn;\r
 921         }\r
 922 #endif\r
 923 /*-----------------------------------------------------------*/\r
 924 \r
 925 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 926         unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
 927         {\r
 928         unsigned portBASE_TYPE uxReturn;\r
 929     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 930 \r
 931                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 932         portRESET_PRIVILEGE( xRunningPrivileged );\r
 933                 return uxReturn;\r
 934         }\r
 935 #endif\r
 936 /*-----------------------------------------------------------*/\r
 937 \r
 938 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 939         xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
 940         {\r
 941         xTaskHandle xReturn;\r
 942     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 943 \r
 944                 xReturn = xTaskGetCurrentTaskHandle();\r
 945         portRESET_PRIVILEGE( xRunningPrivileged );\r
 946                 return xReturn;\r
 947         }\r
 948 #endif\r
 949 /*-----------------------------------------------------------*/\r
 950 \r
 951 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
 952         portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
 953         {\r
 954         portBASE_TYPE xReturn;\r
 955     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 956 \r
 957                 xReturn = xTaskGetSchedulerState();\r
 958         portRESET_PRIVILEGE( xRunningPrivileged );\r
 959                 return xReturn;\r
 960         }\r
 961 #endif\r
 962 /*-----------------------------------------------------------*/\r
 963 \r
 964 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )\r
 965 {\r
 966 xQueueHandle xReturn;\r
 967 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 968 \r
 969         xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );\r
 970         portRESET_PRIVILEGE( xRunningPrivileged );\r
 971         return xReturn;\r
 972 }\r
 973 /*-----------------------------------------------------------*/\r
 974 \r
 975 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue )\r
 976 {\r
 977 portBASE_TYPE xReturn;\r
 978 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 979 \r
 980         xReturn = xQueueGenericReset( pxQueue, xNewQueue );\r
 981         portRESET_PRIVILEGE( xRunningPrivileged );\r
 982         return xReturn;\r
 983 }\r
 984 /*-----------------------------------------------------------*/\r
 985 \r
 986 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 987 {\r
 988 signed portBASE_TYPE xReturn;\r
 989 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 990 \r
 991         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 992         portRESET_PRIVILEGE( xRunningPrivileged );\r
 993         return xReturn;\r
 994 }\r
 995 /*-----------------------------------------------------------*/\r
 996 \r
 997 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
 998 {\r
 999 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1000 unsigned portBASE_TYPE uxReturn;\r
1001 \r
1002         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
1003         portRESET_PRIVILEGE( xRunningPrivileged );\r
1004         return uxReturn;\r
1005 }\r
1006 /*-----------------------------------------------------------*/\r
1007 \r
1008 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
1009 {\r
1010 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1011 signed portBASE_TYPE xReturn;\r
1012 \r
1013         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1014         portRESET_PRIVILEGE( xRunningPrivileged );\r
1015         return xReturn;\r
1016 }\r
1017 /*-----------------------------------------------------------*/\r
1018 \r
1019 signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle pxQueue, void * const pvBuffer )\r
1020 {\r
1021 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1022 signed portBASE_TYPE xReturn;\r
1023 \r
1024         xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );\r
1025         portRESET_PRIVILEGE( xRunningPrivileged );\r
1026         return xReturn;\r
1027 }\r
1028 /*-----------------------------------------------------------*/\r
1029 \r
1030 #if ( configUSE_MUTEXES == 1 )\r
1031         xQueueHandle MPU_xQueueCreateMutex( void )\r
1032         {\r
1033     xQueueHandle xReturn;\r
1034         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1035 \r
1036                 xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );\r
1037                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1038                 return xReturn;\r
1039         }\r
1040 #endif\r
1041 /*-----------------------------------------------------------*/\r
1042 \r
1043 #if configUSE_COUNTING_SEMAPHORES == 1\r
1044         xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
1045         {\r
1046     xQueueHandle xReturn;\r
1047         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1048 \r
1049                 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
1050                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1051                 return xReturn;\r
1052         }\r
1053 #endif\r
1054 /*-----------------------------------------------------------*/\r
1055 \r
1056 #if ( configUSE_MUTEXES == 1 )\r
1057         portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
1058         {\r
1059         portBASE_TYPE xReturn;\r
1060         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1061 \r
1062                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
1063                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1064                 return xReturn;\r
1065         }\r
1066 #endif\r
1067 /*-----------------------------------------------------------*/\r
1068 \r
1069 #if ( configUSE_MUTEXES == 1 )\r
1070         portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
1071         {\r
1072         portBASE_TYPE xReturn;\r
1073         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1074 \r
1075                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
1076                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1077                 return xReturn;\r
1078         }\r
1079 #endif\r
1080 /*-----------------------------------------------------------*/\r
1081 \r
1082 #if ( configUSE_QUEUE_SETS == 1 )\r
1083         xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength )\r
1084         {\r
1085         xQueueSetHandle xReturn;\r
1086         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1087 \r
1088                 xReturn = xQueueCreateSet( uxEventQueueLength );\r
1089                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1090                 return xReturn;\r
1091         }\r
1092 #endif\r
1093 /*-----------------------------------------------------------*/\r
1094 \r
1095 #if ( configUSE_QUEUE_SETS == 1 )\r
1096         xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks )\r
1097         {\r
1098         xQueueSetMemberHandle xReturn;\r
1099         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1100 \r
1101                 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );\r
1102                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1103                 return xReturn;\r
1104         }\r
1105 #endif\r
1106 /*-----------------------------------------------------------*/\r
1107 \r
1108 #if ( configUSE_QUEUE_SETS == 1 )\r
1109         portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
1110         {\r
1111         portBASE_TYPE xReturn;\r
1112         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1113 \r
1114                 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );\r
1115                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1116                 return xReturn;\r
1117         }\r
1118 #endif\r
1119 /*-----------------------------------------------------------*/\r
1120 \r
1121 #if ( configUSE_QUEUE_SETS == 1 )\r
1122         portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
1123         {\r
1124         portBASE_TYPE xReturn;\r
1125         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1126 \r
1127                 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );\r
1128                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1129                 return xReturn;\r
1130         }\r
1131 #endif\r
1132 /*-----------------------------------------------------------*/\r
1133 \r
1134 #if configUSE_ALTERNATIVE_API == 1\r
1135         signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
1136         {\r
1137         signed portBASE_TYPE xReturn;\r
1138         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1139 \r
1140                 xReturn =       signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
1141                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1142                 return xReturn;\r
1143         }\r
1144 #endif\r
1145 /*-----------------------------------------------------------*/\r
1146 \r
1147 #if configUSE_ALTERNATIVE_API == 1\r
1148         signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
1149         {\r
1150     signed portBASE_TYPE xReturn;\r
1151         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1152 \r
1153                 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1154                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1155                 return xReturn;\r
1156         }\r
1157 #endif\r
1158 /*-----------------------------------------------------------*/\r
1159 \r
1160 #if configQUEUE_REGISTRY_SIZE > 0\r
1161         void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )\r
1162         {\r
1163         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1164 \r
1165                 vQueueAddToRegistry( xQueue, pcName );\r
1166 \r
1167                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1168         }\r
1169 #endif\r
1170 /*-----------------------------------------------------------*/\r
1171 \r
1172 void MPU_vQueueDelete( xQueueHandle xQueue )\r
1173 {\r
1174 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1175 \r
1176         vQueueDelete( xQueue );\r
1177 \r
1178         portRESET_PRIVILEGE( xRunningPrivileged );\r
1179 }\r
1180 /*-----------------------------------------------------------*/\r
1181 \r
1182 void *MPU_pvPortMalloc( size_t xSize )\r
1183 {\r
1184 void *pvReturn;\r
1185 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1186 \r
1187         pvReturn = pvPortMalloc( xSize );\r
1188 \r
1189         portRESET_PRIVILEGE( xRunningPrivileged );\r
1190 \r
1191         return pvReturn;\r
1192 }\r
1193 /*-----------------------------------------------------------*/\r
1194 \r
1195 void MPU_vPortFree( void *pv )\r
1196 {\r
1197 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1198 \r
1199         vPortFree( pv );\r
1200 \r
1201         portRESET_PRIVILEGE( xRunningPrivileged );\r
1202 }\r
1203 /*-----------------------------------------------------------*/\r
1204 \r
1205 void MPU_vPortInitialiseBlocks( void )\r
1206 {\r
1207 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1208 \r
1209         vPortInitialiseBlocks();\r
1210 \r
1211         portRESET_PRIVILEGE( xRunningPrivileged );\r
1212 }\r
1213 /*-----------------------------------------------------------*/\r
1214 \r
1215 size_t MPU_xPortGetFreeHeapSize( void )\r
1216 {\r
1217 size_t xReturn;\r
1218 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1219 \r
1220         xReturn = xPortGetFreeHeapSize();\r
1221 \r
1222         portRESET_PRIVILEGE( xRunningPrivileged );\r
1223 \r
1224         return xReturn;\r
1225 }\r
1226 \r
1227 /* Functions that the application writer wants to execute in privileged mode\r
1228 can be defined in application_defined_privileged_functions.h.  The functions\r
1229 must take the same format as those above whereby the privilege state on exit\r
1230 equals the privilege state on entry.  For example:\r
1231 \r
1232 void MPU_FunctionName( [parameters ] )\r
1233 {\r
1234 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1235 \r
1236         FunctionName( [parameters ] );\r
1237 \r
1238         portRESET_PRIVILEGE( xRunningPrivileged );\r
1239 }\r
1240 */\r
1241 \r
1242 #if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1\r
1243         #include "application_defined_privileged_functions.h"\r
1244 #endif\r
1245 \r