git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
  12 \r
  13     ***************************************************************************\r
  14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  16     >>!   obliged to provide the source code for proprietary components     !<<\r
  17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  18     ***************************************************************************\r
  19 \r
  20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  23     link: http://www.freertos.org/a00114.html\r
  24 \r
  25     ***************************************************************************\r
  26      *                                                                       *\r
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  33      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
  34      *    tutorial book, reference manual, or both:                          *\r
  35      *    http://www.FreeRTOS.org/Documentation                              *\r
  36      *                                                                       *\r
  37     ***************************************************************************\r
  38 \r
  39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
  40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
  41     defined configASSERT()?\r
  42 \r
  43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
  44     embedded software for free we request you assist our global community by\r
  45     participating in the support forum.\r
  46 \r
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  48     be as productive as possible as early as possible.  Now you can receive\r
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  50     Ltd, and the world's leading authority on the world's leading RTOS.\r
  51 \r
  52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  55 \r
  56     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
  57     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
  58 \r
  59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
  60     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  61     licenses offer ticketed support, indemnification and commercial middleware.\r
  62 \r
  63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  64     engineered and independently SIL3 certified version for use in safety and\r
  65     mission critical applications that require provable dependability.\r
  66 \r
  67     1 tab == 4 spaces!\r
  68 */\r
  69 \r
  70 /*-----------------------------------------------------------\r
  71  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  72  *----------------------------------------------------------*/\r
  73 \r
  74 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  75 all the API functions to use the MPU wrappers.  That should only be done when\r
  76 task.h is included from an application file. */\r
  77 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  78 \r
  79 /* Scheduler includes. */\r
  80 #include "FreeRTOS.h"\r
  81 #include "task.h"\r
  82 #include "queue.h"\r
  83 #include "timers.h"\r
  84 #include "event_groups.h"\r
  85 #include "mpu_prototypes.h"\r
  86 \r
  87 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  88 \r
  89 /* Constants required to access and manipulate the NVIC. */\r
  90 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile uint32_t * ) 0xe000e010 )\r
  91 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile uint32_t * ) 0xe000e014 )\r
  92 #define portNVIC_SYSPRI2                                                ( ( volatile uint32_t * ) 0xe000ed20 )\r
  93 #define portNVIC_SYSPRI1                                                ( ( volatile uint32_t * ) 0xe000ed1c )\r
  94 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile uint32_t * ) 0xe000ed24 )\r
  95 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  96 \r
  97 /* Constants required to access and manipulate the MPU. */\r
  98 #define portMPU_TYPE                                                    ( ( volatile uint32_t * ) 0xe000ed90 )\r
  99 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile uint32_t * ) 0xe000ed9C )\r
 100 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile uint32_t * ) 0xe000edA0 )\r
 101 #define portMPU_CTRL                                                    ( ( volatile uint32_t * ) 0xe000ed94 )\r
 102 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
 103 #define portMPU_ENABLE                                                  ( 0x01UL )\r
 104 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
 105 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
 106 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
 107 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
 108 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
 109 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
 110 \r
 111 /* Constants required to access and manipulate the SysTick. */\r
 112 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
 113 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
 114 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
 115 #define portNVIC_PENDSV_PRI                                             ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 116 #define portNVIC_SYSTICK_PRI                                    ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 117 #define portNVIC_SVC_PRI                                                ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 118 \r
 119 /* Constants required to set up the initial stack. */\r
 120 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
 121 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
 122 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
 123 \r
 124 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 125 #define portOFFSET_TO_PC                                                ( 6 )\r
 126 \r
 127 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 128 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )\r
 129 \r
 130 /* For strict compliance with the Cortex-M spec the task start address should\r
 131 have bit-0 clear, as it is loaded into the PC on exit from an ISR. */\r
 132 #define portSTART_ADDRESS_MASK                          ( ( StackType_t ) 0xfffffffeUL )\r
 133 \r
 134 /* Each task maintains its own interrupt status in the critical nesting\r
 135 variable.  Note this is not saved as part of the task context as context\r
 136 switches can only occur when uxCriticalNesting is zero. */\r
 137 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
 138 \r
 139 /*\r
 140  * Setup the timer to generate the tick interrupts.\r
 141  */\r
 142 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 143 \r
 144 /*\r
 145  * Configure a number of standard MPU regions that are used by all tasks.\r
 146  */\r
 147 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 148 \r
 149 /*\r
 150  * Return the smallest MPU region size that a given number of bytes will fit\r
 151  * into.  The region size is returned as the value that should be programmed\r
 152  * into the region attribute register for that region.\r
 153  */\r
 154 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 155 \r
 156 /*\r
 157  * Checks to see if being called from the context of an unprivileged task, and\r
 158  * if so raises the privilege level and returns false - otherwise does nothing\r
 159  * other than return true.\r
 160  */\r
 161 static BaseType_t prvRaisePrivilege( void ) __attribute__(( naked ));\r
 162 \r
 163 /*\r
 164  * Standard FreeRTOS exception handlers.\r
 165  */\r
 166 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 167 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 168 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 169 \r
 170 /*\r
 171  * Starts the scheduler by restoring the context of the first task to run.\r
 172  */\r
 173 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 174 \r
 175 /*\r
 176  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 177  * and a C wrapper for simplicity of coding and maintenance.\r
 178  */\r
 179 static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 180 \r
 181 /*-----------------------------------------------------------*/\r
 182 \r
 183 /*\r
 184  * See header file for description.\r
 185  */\r
 186 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )\r
 187 {\r
 188         /* Simulate the stack frame as it would be created by a context switch\r
 189         interrupt. */\r
 190         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 191         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 192         pxTopOfStack--;\r
 193         *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;    /* PC */\r
 194         pxTopOfStack--;\r
 195         *pxTopOfStack = 0;      /* LR */\r
 196         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 197         *pxTopOfStack = ( StackType_t ) pvParameters;   /* R0 */\r
 198         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 199 \r
 200         if( xRunPrivileged == pdTRUE )\r
 201         {\r
 202                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 203         }\r
 204         else\r
 205         {\r
 206                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 207         }\r
 208 \r
 209         return pxTopOfStack;\r
 210 }\r
 211 /*-----------------------------------------------------------*/\r
 212 \r
 213 void vPortSVCHandler( void )\r
 214 {\r
 215         /* Assumes psp was in use. */\r
 216         __asm volatile\r
 217         (\r
 218                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 219                         "       tst lr, #4                                              \n"\r
 220                         "       ite eq                                                  \n"\r
 221                         "       mrseq r0, msp                                   \n"\r
 222                         "       mrsne r0, psp                                   \n"\r
 223                 #else\r
 224                         "       mrs r0, psp                                             \n"\r
 225                 #endif\r
 226                         "       b %0                                                    \n"\r
 227                         ::"i"(prvSVCHandler):"r0"\r
 228         );\r
 229 }\r
 230 /*-----------------------------------------------------------*/\r
 231 \r
 232 static void prvSVCHandler(      uint32_t *pulParam )\r
 233 {\r
 234 uint8_t ucSVCNumber;\r
 235 \r
 236         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 237         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 238         ucSVCNumber = ( ( uint8_t * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 239         switch( ucSVCNumber )\r
 240         {\r
 241                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 242                                                                                         prvRestoreContextOfFirstTask();\r
 243                                                                                         break;\r
 244 \r
 245                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 246                                                                                         /* Barriers are normally not required\r
 247                                                                                         but do ensure the code is completely\r
 248                                                                                         within the specified behaviour for the\r
 249                                                                                         architecture. */\r
 250                                                                                         __asm volatile( "dsb" );\r
 251                                                                                         __asm volatile( "isb" );\r
 252 \r
 253                                                                                         break;\r
 254 \r
 255                 case portSVC_RAISE_PRIVILEGE    :       __asm volatile\r
 256                                                                                         (\r
 257                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 258                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 259                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 260                                                                                                 :::"r1"\r
 261                                                                                         );\r
 262                                                                                         break;\r
 263 \r
 264                 default                                                 :       /* Unknown SVC call. */\r
 265                                                                                         break;\r
 266         }\r
 267 }\r
 268 /*-----------------------------------------------------------*/\r
 269 \r
 270 static void prvRestoreContextOfFirstTask( void )\r
 271 {\r
 272         __asm volatile\r
 273         (\r
 274                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 275                 "       ldr r0, [r0]                                    \n"\r
 276                 "       ldr r0, [r0]                                    \n"\r
 277                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 278                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 279                 "       ldr r1, [r3]                                    \n"\r
 280                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 281                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 282                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 283                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 284                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 285                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 286                 "       msr control, r3                                 \n"\r
 287                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 288                 "       mov r0, #0                                              \n"\r
 289                 "       msr     basepri, r0                                     \n"\r
 290                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 291                 "       bx r14                                                  \n"\r
 292                 "                                                                       \n"\r
 293                 "       .align 4                                                \n"\r
 294                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 295         );\r
 296 }\r
 297 /*-----------------------------------------------------------*/\r
 298 \r
 299 /*\r
 300  * See header file for description.\r
 301  */\r
 302 BaseType_t xPortStartScheduler( void )\r
 303 {\r
 304         /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See\r
 305         http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
 306         configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );\r
 307 \r
 308         /* Make PendSV and SysTick the same priority as the kernel. */\r
 309         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 310         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 311 \r
 312         /* Configure the regions in the MPU that are common to all tasks. */\r
 313         prvSetupMPU();\r
 314 \r
 315         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 316         here already. */\r
 317         prvSetupTimerInterrupt();\r
 318 \r
 319         /* Initialise the critical nesting count ready for the first task. */\r
 320         uxCriticalNesting = 0;\r
 321 \r
 322         /* Start the first task. */\r
 323         __asm volatile( "       svc %0                  \n"\r
 324                                         :: "i" (portSVC_START_SCHEDULER) );\r
 325 \r
 326         /* Should not get here! */\r
 327         return 0;\r
 328 }\r
 329 /*-----------------------------------------------------------*/\r
 330 \r
 331 void vPortEndScheduler( void )\r
 332 {\r
 333         /* Not implemented in ports where there is nothing to return to.\r
 334         Artificially force an assert. */\r
 335         configASSERT( uxCriticalNesting == 1000UL );\r
 336 }\r
 337 /*-----------------------------------------------------------*/\r
 338 \r
 339 void vPortEnterCritical( void )\r
 340 {\r
 341 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 342 \r
 343         portDISABLE_INTERRUPTS();\r
 344         uxCriticalNesting++;\r
 345 \r
 346         portRESET_PRIVILEGE( xRunningPrivileged );\r
 347 }\r
 348 /*-----------------------------------------------------------*/\r
 349 \r
 350 void vPortExitCritical( void )\r
 351 {\r
 352 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 353 \r
 354         configASSERT( uxCriticalNesting );\r
 355         uxCriticalNesting--;\r
 356         if( uxCriticalNesting == 0 )\r
 357         {\r
 358                 portENABLE_INTERRUPTS();\r
 359         }\r
 360         portRESET_PRIVILEGE( xRunningPrivileged );\r
 361 }\r
 362 /*-----------------------------------------------------------*/\r
 363 \r
 364 void xPortPendSVHandler( void )\r
 365 {\r
 366         /* This is a naked function. */\r
 367 \r
 368         __asm volatile\r
 369         (\r
 370                 "       mrs r0, psp                                                     \n"\r
 371                 "                                                                               \n"\r
 372                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 373                 "       ldr     r2, [r3]                                                \n"\r
 374                 "                                                                               \n"\r
 375                 "       mrs r1, control                                         \n"\r
 376                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 377                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 378                 "                                                                               \n"\r
 379                 "       stmdb sp!, {r3, r14}                            \n"\r
 380                 "       mov r0, %0                                                      \n"\r
 381                 "       msr basepri, r0                                         \n"\r
 382                 "       bl vTaskSwitchContext                           \n"\r
 383                 "       mov r0, #0                                                      \n"\r
 384                 "       msr basepri, r0                                         \n"\r
 385                 "       ldmia sp!, {r3, r14}                            \n"\r
 386                 "                                                                               \n"     /* Restore the context. */\r
 387                 "       ldr r1, [r3]                                            \n"\r
 388                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 389                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 390                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 391                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 392                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 393                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 394                 "       msr control, r3                                         \n"\r
 395                 "                                                                               \n"\r
 396                 "       msr psp, r0                                                     \n"\r
 397                 "       bx r14                                                          \n"\r
 398                 "                                                                               \n"\r
 399                 "       .align 4                                                        \n"\r
 400                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 401                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 402         );\r
 403 }\r
 404 /*-----------------------------------------------------------*/\r
 405 \r
 406 void xPortSysTickHandler( void )\r
 407 {\r
 408 uint32_t ulDummy;\r
 409 \r
 410         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 411         {\r
 412                 /* Increment the RTOS tick. */\r
 413                 if( xTaskIncrementTick() != pdFALSE )\r
 414                 {\r
 415                         /* Pend a context switch. */\r
 416                         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 417                 }\r
 418         }\r
 419         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 420 }\r
 421 /*-----------------------------------------------------------*/\r
 422 \r
 423 /*\r
 424  * Setup the systick timer to generate the tick interrupts at the required\r
 425  * frequency.\r
 426  */\r
 427 static void prvSetupTimerInterrupt( void )\r
 428 {\r
 429         /* Configure SysTick to interrupt at the requested rate. */\r
 430         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 431         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 432 }\r
 433 /*-----------------------------------------------------------*/\r
 434 \r
 435 static void prvSetupMPU( void )\r
 436 {\r
 437 extern uint32_t __privileged_functions_end__[];\r
 438 extern uint32_t __FLASH_segment_start__[];\r
 439 extern uint32_t __FLASH_segment_end__[];\r
 440 extern uint32_t __privileged_data_start__[];\r
 441 extern uint32_t __privileged_data_end__[];\r
 442 \r
 443         /* Check the expected MPU is present. */\r
 444         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 445         {\r
 446                 /* First setup the entire flash for unprivileged read only access. */\r
 447                 *portMPU_REGION_BASE_ADDRESS =  ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */\r
 448                                                                                 ( portMPU_REGION_VALID ) |\r
 449                                                                                 ( portUNPRIVILEGED_FLASH_REGION );\r
 450 \r
 451                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 452                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 453                                                                                 ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |\r
 454                                                                                 ( portMPU_REGION_ENABLE );\r
 455 \r
 456                 /* Setup the first 16K for privileged only access (even though less\r
 457                 than 10K is actually being used).  This is where the kernel code is\r
 458                 placed. */\r
 459                 *portMPU_REGION_BASE_ADDRESS =  ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */\r
 460                                                                                 ( portMPU_REGION_VALID ) |\r
 461                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 462 \r
 463                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 464                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 465                                                                                 ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |\r
 466                                                                                 ( portMPU_REGION_ENABLE );\r
 467 \r
 468                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 469                 is placed. */\r
 470                 *portMPU_REGION_BASE_ADDRESS =  ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */\r
 471                                                                                 ( portMPU_REGION_VALID ) |\r
 472                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 473 \r
 474                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 475                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 476                                                                                 prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |\r
 477                                                                                 ( portMPU_REGION_ENABLE );\r
 478 \r
 479                 /* By default allow everything to access the general peripherals.  The\r
 480                 system peripherals and registers are protected. */\r
 481                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 482                                                                                 ( portMPU_REGION_VALID ) |\r
 483                                                                                 ( portGENERAL_PERIPHERALS_REGION );\r
 484 \r
 485                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 486                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 487                                                                                 ( portMPU_REGION_ENABLE );\r
 488 \r
 489                 /* Enable the memory fault exception. */\r
 490                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 491 \r
 492                 /* Enable the MPU with the background region configured. */\r
 493                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 494         }\r
 495 }\r
 496 /*-----------------------------------------------------------*/\r
 497 \r
 498 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )\r
 499 {\r
 500 uint32_t ulRegionSize, ulReturnValue = 4;\r
 501 \r
 502         /* 32 is the smallest region size, 31 is the largest valid value for\r
 503         ulReturnValue. */\r
 504         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 505         {\r
 506                 if( ulActualSizeInBytes <= ulRegionSize )\r
 507                 {\r
 508                         break;\r
 509                 }\r
 510                 else\r
 511                 {\r
 512                         ulReturnValue++;\r
 513                 }\r
 514         }\r
 515 \r
 516         /* Shift the code by one before returning so it can be written directly\r
 517         into the the correct bit position of the attribute register. */\r
 518         return ( ulReturnValue << 1UL );\r
 519 }\r
 520 /*-----------------------------------------------------------*/\r
 521 \r
 522 static BaseType_t prvRaisePrivilege( void )\r
 523 {\r
 524         __asm volatile\r
 525         (\r
 526                 "       mrs r0, control                                         \n"\r
 527                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 528                 "       itte ne                                                         \n"\r
 529                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 530                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 531                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 532                 "       bx lr                                                           \n"\r
 533                 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
 534         );\r
 535 \r
 536         return 0;\r
 537 }\r
 538 /*-----------------------------------------------------------*/\r
 539 \r
 540 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )\r
 541 {\r
 542 extern uint32_t __SRAM_segment_start__[];\r
 543 extern uint32_t __SRAM_segment_end__[];\r
 544 extern uint32_t __privileged_data_start__[];\r
 545 extern uint32_t __privileged_data_end__[];\r
 546 int32_t lIndex;\r
 547 uint32_t ul;\r
 548 \r
 549         if( xRegions == NULL )\r
 550         {\r
 551                 /* No MPU regions are specified so allow access to all RAM. */\r
 552                 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 553                                 ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */\r
 554                                 ( portMPU_REGION_VALID ) |\r
 555                                 ( portSTACK_REGION );\r
 556 \r
 557                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 558                                 ( portMPU_REGION_READ_WRITE ) |\r
 559                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 560                                 ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |\r
 561                                 ( portMPU_REGION_ENABLE );\r
 562 \r
 563                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 564                 just removed the privileged only parameters. */\r
 565                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =\r
 566                                 ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */\r
 567                                 ( portMPU_REGION_VALID ) |\r
 568                                 ( portSTACK_REGION + 1 );\r
 569 \r
 570                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =\r
 571                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 572                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 573                                 prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |\r
 574                                 ( portMPU_REGION_ENABLE );\r
 575 \r
 576                 /* Invalidate all other regions. */\r
 577                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 578                 {\r
 579                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 580                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 581                 }\r
 582         }\r
 583         else\r
 584         {\r
 585                 /* This function is called automatically when the task is created - in\r
 586                 which case the stack region parameters will be valid.  At all other\r
 587                 times the stack parameters will not be valid and it is assumed that the\r
 588                 stack region has already been configured. */\r
 589                 if( ulStackDepth > 0 )\r
 590                 {\r
 591                         /* Define the region that allows access to the stack. */\r
 592                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 593                                         ( ( uint32_t ) pxBottomOfStack ) |\r
 594                                         ( portMPU_REGION_VALID ) |\r
 595                                         ( portSTACK_REGION ); /* Region number. */\r
 596 \r
 597                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 598                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 599                                         ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |\r
 600                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 601                                         ( portMPU_REGION_ENABLE );\r
 602                 }\r
 603 \r
 604                 lIndex = 0;\r
 605 \r
 606                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 607                 {\r
 608                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 609                         {\r
 610                                 /* Translate the generic region definition contained in\r
 611                                 xRegions into the CM3 specific MPU settings that are then\r
 612                                 stored in xMPUSettings. */\r
 613                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =\r
 614                                                 ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |\r
 615                                                 ( portMPU_REGION_VALID ) |\r
 616                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 617 \r
 618                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute =\r
 619                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |\r
 620                                                 ( xRegions[ lIndex ].ulParameters ) |\r
 621                                                 ( portMPU_REGION_ENABLE );\r
 622                         }\r
 623                         else\r
 624                         {\r
 625                                 /* Invalidate the region. */\r
 626                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 627                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 628                         }\r
 629 \r
 630                         lIndex++;\r
 631                 }\r
 632         }\r
 633 }\r
 634 /*-----------------------------------------------------------*/\r
 635 \r
 636 BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )\r
 637 {\r
 638 BaseType_t xReturn;\r
 639 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 640 \r
 641         xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask );\r
 642         portRESET_PRIVILEGE( xRunningPrivileged );\r
 643         return xReturn;\r
 644 }\r
 645 /*-----------------------------------------------------------*/\r
 646 \r
 647 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
 648         BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask )\r
 649         {\r
 650         BaseType_t xReturn;\r
 651         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 652 \r
 653                 xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask );\r
 654                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 655                 return xReturn;\r
 656         }\r
 657 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
 658 /*-----------------------------------------------------------*/\r
 659 \r
 660 #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
 661         TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer )\r
 662         {\r
 663         TaskHandle_t xReturn;\r
 664         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 665 \r
 666                 xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer );\r
 667                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 668                 return xReturn;\r
 669         }\r
 670 #endif /* configSUPPORT_STATIC_ALLOCATION */\r
 671 /*-----------------------------------------------------------*/\r
 672 \r
 673 void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions )\r
 674 {\r
 675 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 676 \r
 677         vTaskAllocateMPURegions( xTask, xRegions );\r
 678         portRESET_PRIVILEGE( xRunningPrivileged );\r
 679 }\r
 680 /*-----------------------------------------------------------*/\r
 681 \r
 682 #if ( INCLUDE_vTaskDelete == 1 )\r
 683         void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete )\r
 684         {\r
 685         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 686 \r
 687                 vTaskDelete( pxTaskToDelete );\r
 688                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 689         }\r
 690 #endif\r
 691 /*-----------------------------------------------------------*/\r
 692 \r
 693 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 694         void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement )\r
 695         {\r
 696         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 697 \r
 698                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 699                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 700         }\r
 701 #endif\r
 702 /*-----------------------------------------------------------*/\r
 703 \r
 704 #if ( INCLUDE_xTaskAbortDelay == 1 )\r
 705         BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask )\r
 706         {\r
 707         BaseType_t xReturn;\r
 708         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 709 \r
 710                 xReturn = xTaskAbortDelay( xTask );\r
 711                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 712                 return xReturn;\r
 713         }\r
 714 #endif\r
 715 /*-----------------------------------------------------------*/\r
 716 \r
 717 #if ( INCLUDE_vTaskDelay == 1 )\r
 718         void MPU_vTaskDelay( TickType_t xTicksToDelay )\r
 719         {\r
 720         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 721 \r
 722                 vTaskDelay( xTicksToDelay );\r
 723                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 724         }\r
 725 #endif\r
 726 /*-----------------------------------------------------------*/\r
 727 \r
 728 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 729         UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask )\r
 730         {\r
 731         UBaseType_t uxReturn;\r
 732         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 733 \r
 734                 uxReturn = uxTaskPriorityGet( pxTask );\r
 735                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 736                 return uxReturn;\r
 737         }\r
 738 #endif\r
 739 /*-----------------------------------------------------------*/\r
 740 \r
 741 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 742         void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority )\r
 743         {\r
 744         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 745 \r
 746                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 747                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 748         }\r
 749 #endif\r
 750 /*-----------------------------------------------------------*/\r
 751 \r
 752 #if ( INCLUDE_eTaskGetState == 1 )\r
 753         eTaskState MPU_eTaskGetState( TaskHandle_t pxTask )\r
 754         {\r
 755         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 756         eTaskState eReturn;\r
 757 \r
 758                 eReturn = eTaskGetState( pxTask );\r
 759                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 760                 return eReturn;\r
 761         }\r
 762 #endif\r
 763 /*-----------------------------------------------------------*/\r
 764 \r
 765 #if( configUSE_TRACE_FACILITY == 1 )\r
 766         void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState )\r
 767         {\r
 768         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 769 \r
 770                 vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState );\r
 771                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 772         }\r
 773 #endif\r
 774 /*-----------------------------------------------------------*/\r
 775 \r
 776 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
 777         TaskHandle_t MPU_xTaskGetIdleTaskHandle( void )\r
 778         {\r
 779         TaskHandle_t xReturn;\r
 780         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 781 \r
 782                 xReturn = xTaskGetIdleTaskHandle();\r
 783                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 784                 return xReturn;\r
 785         }\r
 786 #endif\r
 787 /*-----------------------------------------------------------*/\r
 788 \r
 789 #if ( INCLUDE_vTaskSuspend == 1 )\r
 790         void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend )\r
 791         {\r
 792         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 793 \r
 794                 vTaskSuspend( pxTaskToSuspend );\r
 795                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 796         }\r
 797 #endif\r
 798 /*-----------------------------------------------------------*/\r
 799 \r
 800 #if ( INCLUDE_vTaskSuspend == 1 )\r
 801         void MPU_vTaskResume( TaskHandle_t pxTaskToResume )\r
 802         {\r
 803         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 804 \r
 805                 vTaskResume( pxTaskToResume );\r
 806                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 807         }\r
 808 #endif\r
 809 /*-----------------------------------------------------------*/\r
 810 \r
 811 void MPU_vTaskSuspendAll( void )\r
 812 {\r
 813 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 814 \r
 815         vTaskSuspendAll();\r
 816         portRESET_PRIVILEGE( xRunningPrivileged );\r
 817 }\r
 818 /*-----------------------------------------------------------*/\r
 819 \r
 820 BaseType_t MPU_xTaskResumeAll( void )\r
 821 {\r
 822 BaseType_t xReturn;\r
 823 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 824 \r
 825         xReturn = xTaskResumeAll();\r
 826         portRESET_PRIVILEGE( xRunningPrivileged );\r
 827         return xReturn;\r
 828 }\r
 829 /*-----------------------------------------------------------*/\r
 830 \r
 831 TickType_t MPU_xTaskGetTickCount( void )\r
 832 {\r
 833 TickType_t xReturn;\r
 834 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 835 \r
 836         xReturn = xTaskGetTickCount();\r
 837         portRESET_PRIVILEGE( xRunningPrivileged );\r
 838         return xReturn;\r
 839 }\r
 840 /*-----------------------------------------------------------*/\r
 841 \r
 842 UBaseType_t MPU_uxTaskGetNumberOfTasks( void )\r
 843 {\r
 844 UBaseType_t uxReturn;\r
 845 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 846 \r
 847         uxReturn = uxTaskGetNumberOfTasks();\r
 848         portRESET_PRIVILEGE( xRunningPrivileged );\r
 849         return uxReturn;\r
 850 }\r
 851 /*-----------------------------------------------------------*/\r
 852 \r
 853 char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery )\r
 854 {\r
 855 char *pcReturn;\r
 856 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 857 \r
 858         pcReturn = pcTaskGetName( xTaskToQuery );\r
 859         portRESET_PRIVILEGE( xRunningPrivileged );\r
 860         return pcReturn;\r
 861 }\r
 862 /*-----------------------------------------------------------*/\r
 863 \r
 864 #if ( INCLUDE_xTaskGetHandle == 1 )\r
 865         TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery )\r
 866         {\r
 867         TaskHandle_t xReturn;\r
 868         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 869 \r
 870                 xReturn = xTaskGetHandle( pcNameToQuery );\r
 871                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 872                 return xReturn;\r
 873         }\r
 874 #endif\r
 875 /*-----------------------------------------------------------*/\r
 876 \r
 877 #if ( configUSE_TRACE_FACILITY == 1 )\r
 878         void MPU_vTaskList( char *pcWriteBuffer )\r
 879         {\r
 880         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 881 \r
 882                 vTaskList( pcWriteBuffer );\r
 883                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 884         }\r
 885 #endif\r
 886 /*-----------------------------------------------------------*/\r
 887 \r
 888 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 889         void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer )\r
 890         {\r
 891         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 892 \r
 893                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 894                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 895         }\r
 896 #endif\r
 897 /*-----------------------------------------------------------*/\r
 898 \r
 899 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 900         void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue )\r
 901         {\r
 902         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 903 \r
 904                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 905                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 906         }\r
 907 #endif\r
 908 /*-----------------------------------------------------------*/\r
 909 \r
 910 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 911         TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask )\r
 912         {\r
 913         TaskHookFunction_t xReturn;\r
 914         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 915 \r
 916                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 917                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 918                 return xReturn;\r
 919         }\r
 920 #endif\r
 921 /*-----------------------------------------------------------*/\r
 922 \r
 923 #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )\r
 924         void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue )\r
 925         {\r
 926         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 927 \r
 928                 vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue );\r
 929                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 930         }\r
 931 #endif\r
 932 /*-----------------------------------------------------------*/\r
 933 \r
 934 #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )\r
 935         void *MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex )\r
 936         {\r
 937         void *pvReturn;\r
 938         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 939 \r
 940                 pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex );\r
 941                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 942                 return pvReturn;\r
 943         }\r
 944 #endif\r
 945 /*-----------------------------------------------------------*/\r
 946 \r
 947 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 948         BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )\r
 949         {\r
 950         BaseType_t xReturn;\r
 951         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 952 \r
 953                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 954                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 955                 return xReturn;\r
 956         }\r
 957 #endif\r
 958 /*-----------------------------------------------------------*/\r
 959 \r
 960 #if ( configUSE_TRACE_FACILITY == 1 )\r
 961         UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime )\r
 962         {\r
 963         UBaseType_t uxReturn;\r
 964         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 965 \r
 966                 uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );\r
 967                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 968                 return uxReturn;\r
 969         }\r
 970 #endif\r
 971 /*-----------------------------------------------------------*/\r
 972 \r
 973 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 974         UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask )\r
 975         {\r
 976         UBaseType_t uxReturn;\r
 977         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 978 \r
 979                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 980                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 981                 return uxReturn;\r
 982         }\r
 983 #endif\r
 984 /*-----------------------------------------------------------*/\r
 985 \r
 986 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 987         TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void )\r
 988         {\r
 989         TaskHandle_t xReturn;\r
 990         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
 991 \r
 992                 xReturn = xTaskGetCurrentTaskHandle();\r
 993                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 994                 return xReturn;\r
 995         }\r
 996 #endif\r
 997 /*-----------------------------------------------------------*/\r
 998 \r
 999 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
1000         BaseType_t MPU_xTaskGetSchedulerState( void )\r
1001         {\r
1002         BaseType_t xReturn;\r
1003         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1004 \r
1005                 xReturn = xTaskGetSchedulerState();\r
1006                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1007                 return xReturn;\r
1008         }\r
1009 #endif\r
1010 /*-----------------------------------------------------------*/\r
1011 \r
1012 void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )\r
1013 {\r
1014 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1015 \r
1016         vTaskSetTimeOutState( pxTimeOut );\r
1017         portRESET_PRIVILEGE( xRunningPrivileged );\r
1018 }\r
1019 /*-----------------------------------------------------------*/\r
1020 \r
1021 BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )\r
1022 {\r
1023 BaseType_t xReturn;\r
1024 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1025 \r
1026         xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait );\r
1027         portRESET_PRIVILEGE( xRunningPrivileged );\r
1028         return xReturn;\r
1029 }\r
1030 /*-----------------------------------------------------------*/\r
1031 \r
1032 #if( configUSE_TASK_NOTIFICATIONS == 1 )\r
1033         BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )\r
1034         {\r
1035         BaseType_t xReturn;\r
1036         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1037 \r
1038                 xReturn = xTaskGenericNotify( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue );\r
1039                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1040                 return xReturn;\r
1041         }\r
1042 #endif\r
1043 /*-----------------------------------------------------------*/\r
1044 \r
1045 #if( configUSE_TASK_NOTIFICATIONS == 1 )\r
1046         BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )\r
1047         {\r
1048         BaseType_t xReturn;\r
1049         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1050 \r
1051                 xReturn = xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait );\r
1052                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1053                 return xReturn;\r
1054         }\r
1055 #endif\r
1056 /*-----------------------------------------------------------*/\r
1057 \r
1058 #if( configUSE_TASK_NOTIFICATIONS == 1 )\r
1059         uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait )\r
1060         {\r
1061         uint32_t ulReturn;\r
1062         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1063 \r
1064                 ulReturn = ulTaskNotifyTake( xClearCountOnExit, xTicksToWait );\r
1065                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1066                 return ulReturn;\r
1067         }\r
1068 #endif\r
1069 /*-----------------------------------------------------------*/\r
1070 \r
1071 #if( configUSE_TASK_NOTIFICATIONS == 1 )\r
1072         BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask )\r
1073         {\r
1074         BaseType_t xReturn;\r
1075         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1076 \r
1077                 xReturn = xTaskNotifyStateClear( xTask );\r
1078                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1079                 return xReturn;\r
1080         }\r
1081 #endif\r
1082 /*-----------------------------------------------------------*/\r
1083         \r
1084 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
1085         QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType )\r
1086         {\r
1087         QueueHandle_t xReturn;\r
1088         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1089 \r
1090                 xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );\r
1091                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1092                 return xReturn;\r
1093         }\r
1094 #endif\r
1095 /*-----------------------------------------------------------*/\r
1096 \r
1097 #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
1098         QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )\r
1099         {\r
1100         QueueHandle_t xReturn;\r
1101         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1102 \r
1103                 xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType );\r
1104                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1105                 return xReturn;\r
1106         }\r
1107 #endif\r
1108 /*-----------------------------------------------------------*/\r
1109 \r
1110 BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue )\r
1111 {\r
1112 BaseType_t xReturn;\r
1113 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1114 \r
1115         xReturn = xQueueGenericReset( pxQueue, xNewQueue );\r
1116         portRESET_PRIVILEGE( xRunningPrivileged );\r
1117         return xReturn;\r
1118 }\r
1119 /*-----------------------------------------------------------*/\r
1120 \r
1121 BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )\r
1122 {\r
1123 BaseType_t xReturn;\r
1124 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1125 \r
1126         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
1127         portRESET_PRIVILEGE( xRunningPrivileged );\r
1128         return xReturn;\r
1129 }\r
1130 /*-----------------------------------------------------------*/\r
1131 \r
1132 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue )\r
1133 {\r
1134 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1135 UBaseType_t uxReturn;\r
1136 \r
1137         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
1138         portRESET_PRIVILEGE( xRunningPrivileged );\r
1139         return uxReturn;\r
1140 }\r
1141 /*-----------------------------------------------------------*/\r
1142 \r
1143 UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue )\r
1144 {\r
1145 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1146 UBaseType_t uxReturn;\r
1147 \r
1148         uxReturn = uxQueueSpacesAvailable( xQueue );\r
1149         portRESET_PRIVILEGE( xRunningPrivileged );\r
1150         return uxReturn;\r
1151 }\r
1152 /*-----------------------------------------------------------*/\r
1153 \r
1154 BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )\r
1155 {\r
1156 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1157 BaseType_t xReturn;\r
1158 \r
1159         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1160         portRESET_PRIVILEGE( xRunningPrivileged );\r
1161         return xReturn;\r
1162 }\r
1163 /*-----------------------------------------------------------*/\r
1164 \r
1165 BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer )\r
1166 {\r
1167 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1168 BaseType_t xReturn;\r
1169 \r
1170         xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );\r
1171         portRESET_PRIVILEGE( xRunningPrivileged );\r
1172         return xReturn;\r
1173 }\r
1174 /*-----------------------------------------------------------*/\r
1175 \r
1176 void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore )\r
1177 {\r
1178 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1179 void * xReturn;\r
1180 \r
1181         xReturn = ( void * ) xQueueGetMutexHolder( xSemaphore );\r
1182         portRESET_PRIVILEGE( xRunningPrivileged );\r
1183         return xReturn;\r
1184 }\r
1185 /*-----------------------------------------------------------*/\r
1186 \r
1187 #if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
1188         QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType )\r
1189         {\r
1190         QueueHandle_t xReturn;\r
1191         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1192 \r
1193                 xReturn = xQueueCreateMutex( ucQueueType );\r
1194                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1195                 return xReturn;\r
1196         }\r
1197 #endif\r
1198 /*-----------------------------------------------------------*/\r
1199 \r
1200 #if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
1201         QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )\r
1202         {\r
1203         QueueHandle_t xReturn;\r
1204         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1205 \r
1206                 xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue );\r
1207                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1208                 return xReturn;\r
1209         }\r
1210 #endif\r
1211 /*-----------------------------------------------------------*/\r
1212 \r
1213 #if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
1214         QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount )\r
1215         {\r
1216         QueueHandle_t xReturn;\r
1217         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1218 \r
1219                 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
1220                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1221                 return xReturn;\r
1222         }\r
1223 #endif\r
1224 /*-----------------------------------------------------------*/\r
1225 \r
1226 #if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
1227 \r
1228         QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )\r
1229         {\r
1230         QueueHandle_t xReturn;\r
1231         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1232 \r
1233                 xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue );\r
1234                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1235                 return xReturn;\r
1236         }\r
1237 #endif\r
1238 /*-----------------------------------------------------------*/\r
1239 \r
1240 #if ( configUSE_MUTEXES == 1 )\r
1241         BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime )\r
1242         {\r
1243         BaseType_t xReturn;\r
1244         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1245 \r
1246                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
1247                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1248                 return xReturn;\r
1249         }\r
1250 #endif\r
1251 /*-----------------------------------------------------------*/\r
1252 \r
1253 #if ( configUSE_MUTEXES == 1 )\r
1254         BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex )\r
1255         {\r
1256         BaseType_t xReturn;\r
1257         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1258 \r
1259                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
1260                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1261                 return xReturn;\r
1262         }\r
1263 #endif\r
1264 /*-----------------------------------------------------------*/\r
1265 \r
1266 #if ( configUSE_QUEUE_SETS == 1 )\r
1267         QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength )\r
1268         {\r
1269         QueueSetHandle_t xReturn;\r
1270         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1271 \r
1272                 xReturn = xQueueCreateSet( uxEventQueueLength );\r
1273                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1274                 return xReturn;\r
1275         }\r
1276 #endif\r
1277 /*-----------------------------------------------------------*/\r
1278 \r
1279 #if ( configUSE_QUEUE_SETS == 1 )\r
1280         QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks )\r
1281         {\r
1282         QueueSetMemberHandle_t xReturn;\r
1283         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1284 \r
1285                 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );\r
1286                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1287                 return xReturn;\r
1288         }\r
1289 #endif\r
1290 /*-----------------------------------------------------------*/\r
1291 \r
1292 #if ( configUSE_QUEUE_SETS == 1 )\r
1293         BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )\r
1294         {\r
1295         BaseType_t xReturn;\r
1296         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1297 \r
1298                 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );\r
1299                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1300                 return xReturn;\r
1301         }\r
1302 #endif\r
1303 /*-----------------------------------------------------------*/\r
1304 \r
1305 #if ( configUSE_QUEUE_SETS == 1 )\r
1306         BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )\r
1307         {\r
1308         BaseType_t xReturn;\r
1309         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1310 \r
1311                 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );\r
1312                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1313                 return xReturn;\r
1314         }\r
1315 #endif\r
1316 /*-----------------------------------------------------------*/\r
1317 \r
1318 #if configQUEUE_REGISTRY_SIZE > 0\r
1319         void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName )\r
1320         {\r
1321         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1322 \r
1323                 vQueueAddToRegistry( xQueue, pcName );\r
1324 \r
1325                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1326         }\r
1327 #endif\r
1328 /*-----------------------------------------------------------*/\r
1329 \r
1330 #if configQUEUE_REGISTRY_SIZE > 0\r
1331         void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue )\r
1332         {\r
1333         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1334 \r
1335                 vQueueUnregisterQueue( xQueue );\r
1336 \r
1337                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1338         }\r
1339 #endif\r
1340 /*-----------------------------------------------------------*/\r
1341 \r
1342 #if configQUEUE_REGISTRY_SIZE > 0\r
1343         const char *MPU_pcQueueGetName( QueueHandle_t xQueue )\r
1344         {\r
1345         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1346         const char *pcReturn;\r
1347 \r
1348                 pcReturn = pcQueueGetName( xQueue );\r
1349 \r
1350                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1351                 return pcReturn;\r
1352         }\r
1353 #endif\r
1354 /*-----------------------------------------------------------*/\r
1355 \r
1356 void MPU_vQueueDelete( QueueHandle_t xQueue )\r
1357 {\r
1358 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1359 \r
1360         vQueueDelete( xQueue );\r
1361 \r
1362         portRESET_PRIVILEGE( xRunningPrivileged );\r
1363 }\r
1364 /*-----------------------------------------------------------*/\r
1365 \r
1366 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
1367 \r
1368         void *MPU_pvPortMalloc( size_t xSize )\r
1369         {\r
1370         void *pvReturn;\r
1371         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1372 \r
1373                 pvReturn = pvPortMalloc( xSize );\r
1374 \r
1375                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1376 \r
1377                 return pvReturn;\r
1378         }\r
1379 \r
1380 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
1381 /*-----------------------------------------------------------*/\r
1382 \r
1383 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
1384 \r
1385         void MPU_vPortFree( void *pv )\r
1386         {\r
1387         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1388 \r
1389                 vPortFree( pv );\r
1390 \r
1391                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1392         }\r
1393 \r
1394 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
1395 /*-----------------------------------------------------------*/\r
1396 \r
1397 void MPU_vPortInitialiseBlocks( void )\r
1398 {\r
1399 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1400 \r
1401         vPortInitialiseBlocks();\r
1402 \r
1403         portRESET_PRIVILEGE( xRunningPrivileged );\r
1404 }\r
1405 /*-----------------------------------------------------------*/\r
1406 \r
1407 size_t MPU_xPortGetFreeHeapSize( void )\r
1408 {\r
1409 size_t xReturn;\r
1410 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1411 \r
1412         xReturn = xPortGetFreeHeapSize();\r
1413 \r
1414         portRESET_PRIVILEGE( xRunningPrivileged );\r
1415 \r
1416         return xReturn;\r
1417 }\r
1418 /*-----------------------------------------------------------*/\r
1419 \r
1420 #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) )\r
1421         TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction )\r
1422         {\r
1423         TimerHandle_t xReturn;\r
1424         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1425 \r
1426                 xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction );\r
1427                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1428 \r
1429                 return xReturn;\r
1430         }\r
1431 #endif\r
1432 /*-----------------------------------------------------------*/\r
1433 \r
1434 #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) )\r
1435         TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer )\r
1436         {\r
1437         TimerHandle_t xReturn;\r
1438         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1439 \r
1440                 xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer );\r
1441                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1442 \r
1443                 return xReturn;\r
1444         }\r
1445 #endif\r
1446 /*-----------------------------------------------------------*/\r
1447 \r
1448 #if( configUSE_TIMERS == 1 )\r
1449         void *MPU_pvTimerGetTimerID( const TimerHandle_t xTimer )\r
1450         {\r
1451         void * pvReturn;\r
1452         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1453 \r
1454                 pvReturn = pvTimerGetTimerID( xTimer );\r
1455                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1456 \r
1457                 return pvReturn;\r
1458         }\r
1459 #endif\r
1460 /*-----------------------------------------------------------*/\r
1461 \r
1462 #if( configUSE_TIMERS == 1 )\r
1463         void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID )\r
1464         {\r
1465         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1466 \r
1467                 vTimerSetTimerID( xTimer, pvNewID );\r
1468                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1469         }\r
1470 #endif\r
1471 /*-----------------------------------------------------------*/\r
1472 \r
1473 #if( configUSE_TIMERS == 1 )\r
1474         BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer )\r
1475         {\r
1476         BaseType_t xReturn;\r
1477         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1478 \r
1479                 xReturn = xTimerIsTimerActive( xTimer );\r
1480                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1481 \r
1482                 return xReturn;\r
1483         }\r
1484 #endif\r
1485 /*-----------------------------------------------------------*/\r
1486 \r
1487 #if( configUSE_TIMERS == 1 )\r
1488         TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void )\r
1489         {\r
1490         TaskHandle_t xReturn;\r
1491         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1492 \r
1493                 xReturn = xTimerGetTimerDaemonTaskHandle();\r
1494                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1495 \r
1496                 return xReturn;\r
1497         }\r
1498 #endif\r
1499 /*-----------------------------------------------------------*/\r
1500 \r
1501 #if( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )\r
1502         BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait )\r
1503         {\r
1504         BaseType_t xReturn;\r
1505         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1506 \r
1507                 xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait );\r
1508                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1509 \r
1510                 return xReturn;\r
1511         }\r
1512 #endif\r
1513 /*-----------------------------------------------------------*/\r
1514 \r
1515 #if( configUSE_TIMERS == 1 )\r
1516         const char * MPU_pcTimerGetName( TimerHandle_t xTimer )\r
1517         {\r
1518         const char * pcReturn;\r
1519         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1520 \r
1521                 pcReturn = pcTimerGetName( xTimer );\r
1522                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1523 \r
1524                 return pcReturn;\r
1525         }\r
1526 #endif\r
1527 /*-----------------------------------------------------------*/\r
1528 \r
1529 #if( configUSE_TIMERS == 1 )\r
1530         TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer )\r
1531         {\r
1532         TickType_t xReturn;\r
1533         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1534 \r
1535                 xReturn = xTimerGetPeriod( xTimer );\r
1536                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1537 \r
1538                 return xReturn;\r
1539         }\r
1540 #endif\r
1541 /*-----------------------------------------------------------*/\r
1542 \r
1543 #if( configUSE_TIMERS == 1 )\r
1544         TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer )\r
1545         {\r
1546         TickType_t xReturn;\r
1547         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1548 \r
1549                 xReturn = xTimerGetExpiryTime( xTimer );\r
1550                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1551 \r
1552                 return xReturn;\r
1553         }\r
1554 #endif\r
1555 /*-----------------------------------------------------------*/\r
1556 \r
1557 #if( configUSE_TIMERS == 1 )\r
1558         BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )\r
1559         {\r
1560         BaseType_t xReturn;\r
1561         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1562 \r
1563                 xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait );\r
1564                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1565 \r
1566                 return xReturn;\r
1567         }\r
1568 #endif\r
1569 /*-----------------------------------------------------------*/\r
1570 \r
1571 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
1572         EventGroupHandle_t MPU_xEventGroupCreate( void )\r
1573         {\r
1574         EventGroupHandle_t xReturn;\r
1575         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1576 \r
1577                 xReturn = xEventGroupCreate();\r
1578                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1579 \r
1580                 return xReturn;\r
1581         }\r
1582 #endif\r
1583 /*-----------------------------------------------------------*/\r
1584 \r
1585 #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
1586         EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer )\r
1587         {\r
1588         EventGroupHandle_t xReturn;\r
1589         BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1590 \r
1591                 xReturn = xEventGroupCreateStatic( pxEventGroupBuffer );\r
1592                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1593 \r
1594                 return xReturn;\r
1595         }\r
1596 #endif\r
1597 /*-----------------------------------------------------------*/\r
1598 \r
1599 EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait )\r
1600 {\r
1601 EventBits_t xReturn;\r
1602 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1603 \r
1604         xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait );\r
1605         portRESET_PRIVILEGE( xRunningPrivileged );\r
1606 \r
1607         return xReturn;\r
1608 }\r
1609 /*-----------------------------------------------------------*/\r
1610 \r
1611 EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear )\r
1612 {\r
1613 EventBits_t xReturn;\r
1614 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1615 \r
1616         xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear );\r
1617         portRESET_PRIVILEGE( xRunningPrivileged );\r
1618 \r
1619         return xReturn;\r
1620 }\r
1621 /*-----------------------------------------------------------*/\r
1622 \r
1623 EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet )\r
1624 {\r
1625 EventBits_t xReturn;\r
1626 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1627 \r
1628         xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet );\r
1629         portRESET_PRIVILEGE( xRunningPrivileged );\r
1630 \r
1631         return xReturn;\r
1632 }\r
1633 /*-----------------------------------------------------------*/\r
1634 \r
1635 EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait )\r
1636 {\r
1637 EventBits_t xReturn;\r
1638 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1639 \r
1640         xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait );\r
1641         portRESET_PRIVILEGE( xRunningPrivileged );\r
1642 \r
1643         return xReturn;\r
1644 }\r
1645 /*-----------------------------------------------------------*/\r
1646 \r
1647 void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup )\r
1648 {\r
1649 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1650 \r
1651         vEventGroupDelete( xEventGroup );\r
1652         portRESET_PRIVILEGE( xRunningPrivileged );\r
1653 }\r
1654 /*-----------------------------------------------------------*/\r
1655 \r
1656 \r
1657 \r
1658 \r
1659 \r
1660 /* Functions that the application writer wants to execute in privileged mode\r
1661 can be defined in application_defined_privileged_functions.h.  The functions\r
1662 must take the same format as those above whereby the privilege state on exit\r
1663 equals the privilege state on entry.  For example:\r
1664 \r
1665 void MPU_FunctionName( [parameters ] )\r
1666 {\r
1667 BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
1668 \r
1669         FunctionName( [parameters ] );\r
1670 \r
1671         portRESET_PRIVILEGE( xRunningPrivileged );\r
1672 }\r
1673 */\r
1674 \r
1675 #if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1\r
1676         #include "application_defined_privileged_functions.h"\r
1677 #endif\r
1678 \r