git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h

   1 /*\r
   2     FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS provides completely free yet professionally developed,    *\r
  10      *    robust, strictly quality controlled, supported, and cross          *\r
  11      *    platform software that has become a de facto standard.             *\r
  12      *                                                                       *\r
  13      *    Help yourself get started quickly and support the FreeRTOS         *\r
  14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  16      *                                                                       *\r
  17      *    Thank you!                                                         *\r
  18      *                                                                       *\r
  19     ***************************************************************************\r
  20 \r
  21     This file is part of the FreeRTOS distribution.\r
  22 \r
  23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  24     the terms of the GNU General Public License (version 2) as published by the\r
  25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  26 \r
  27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  28     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  29     >>!   obliged to provide the source code for proprietary components     !<<\r
  30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  31 \r
  32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  35     link: http://www.freertos.org/a00114.html\r
  36 \r
  37     1 tab == 4 spaces!\r
  38 \r
  39     ***************************************************************************\r
  40      *                                                                       *\r
  41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  42      *    not run, what could be wrong?"                                     *\r
  43      *                                                                       *\r
  44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  45      *                                                                       *\r
  46     ***************************************************************************\r
  47 \r
  48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  49     license and Real Time Engineers Ltd. contact details.\r
  50 \r
  51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  54 \r
  55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  57     licenses offer ticketed support, indemnification and middleware.\r
  58 \r
  59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  60     engineered and independently SIL3 certified version for use in safety and\r
  61     mission critical applications that require provable dependability.\r
  62 \r
  63     1 tab == 4 spaces!\r
  64 */\r
  65 \r
  66 \r
  67 #ifndef PORTMACRO_H\r
  68 #define PORTMACRO_H\r
  69 \r
  70 #ifdef __cplusplus\r
  71 extern "C" {\r
  72 #endif\r
  73 \r
  74 /*-----------------------------------------------------------\r
  75  * Port specific definitions.\r
  76  *\r
  77  * The settings in this file configure FreeRTOS correctly for the\r
  78  * given hardware and compiler.\r
  79  *\r
  80  * These settings should not be altered.\r
  81  *-----------------------------------------------------------\r
  82  */\r
  83 \r
  84 /* Type definitions. */\r
  85 #define portCHAR                char\r
  86 #define portFLOAT               float\r
  87 #define portDOUBLE              double\r
  88 #define portLONG                long\r
  89 #define portSHORT               short\r
  90 #define portSTACK_TYPE  uint32_t\r
  91 #define portBASE_TYPE   long\r
  92 \r
  93 typedef portSTACK_TYPE StackType_t;\r
  94 typedef long BaseType_t;\r
  95 typedef unsigned long UBaseType_t;\r
  96 \r
  97 #if( configUSE_16_BIT_TICKS == 1 )\r
  98         typedef uint16_t TickType_t;\r
  99         #define portMAX_DELAY ( TickType_t ) 0xffff\r
 100 #else\r
 101         typedef uint32_t TickType_t;\r
 102         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 103 \r
 104         /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
 105         not need to be guarded with a critical section. */\r
 106         #define portTICK_TYPE_IS_ATOMIC 1\r
 107 #endif\r
 108 /*-----------------------------------------------------------*/\r
 109 \r
 110 /* Architecture specifics. */\r
 111 #define portSTACK_GROWTH                        ( -1 )\r
 112 #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 113 #define portBYTE_ALIGNMENT                      8\r
 114 /*-----------------------------------------------------------*/\r
 115 \r
 116 /* Scheduler utilities. */\r
 117 #define portNVIC_INT_CTRL_REG           ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
 118 #define portNVIC_PENDSVSET_BIT          ( 1UL << 28UL )\r
 119 #define portYIELD() vPortYield()\r
 120 #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) vPortYield()\r
 121 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
 122 /*-----------------------------------------------------------*/\r
 123 \r
 124 /* Critical section management. */\r
 125 extern void vPortEnterCritical( void );\r
 126 extern void vPortExitCritical( void );\r
 127 #define portSET_INTERRUPT_MASK_FROM_ISR()               ulPortRaiseBASEPRI()\r
 128 #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)    vPortSetBASEPRI(x)\r
 129 #define portDISABLE_INTERRUPTS()                                vPortRaiseBASEPRI()\r
 130 #define portENABLE_INTERRUPTS()                                 vPortSetBASEPRI(0)\r
 131 #define portENTER_CRITICAL()                                    vPortEnterCritical()\r
 132 #define portEXIT_CRITICAL()                                             vPortExitCritical()\r
 133 \r
 134 /*-----------------------------------------------------------*/\r
 135 \r
 136 /* Task function macros as described on the FreeRTOS.org WEB site.  These are\r
 137 not necessary for to use this port.  They are defined so the common demo files\r
 138 (which build with all the ports) will build. */\r
 139 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 140 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 141 /*-----------------------------------------------------------*/\r
 142 \r
 143 /* Tickless idle/low power functionality. */\r
 144 #ifndef portSUPPRESS_TICKS_AND_SLEEP\r
 145         extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
 146         #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
 147 #endif\r
 148 /*-----------------------------------------------------------*/\r
 149 \r
 150 /* Architecture specific optimisations. */\r
 151 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
 152         #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
 153 #endif\r
 154 \r
 155 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
 156 \r
 157         /* Generic helper function. */\r
 158         __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )\r
 159         {\r
 160         uint8_t ucReturn;\r
 161 \r
 162                 __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );\r
 163                 return ucReturn;\r
 164         }\r
 165 \r
 166         /* Check the configuration. */\r
 167         #if( configMAX_PRIORITIES > 32 )\r
 168                 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\r
 169         #endif\r
 170 \r
 171         /* Store/clear the ready priorities in a bit map. */\r
 172         #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
 173         #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
 174 \r
 175         /*-----------------------------------------------------------*/\r
 176 \r
 177         #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )\r
 178 \r
 179 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
 180 \r
 181 /*-----------------------------------------------------------*/\r
 182 \r
 183 #ifdef configASSERT\r
 184         void vPortValidateInterruptPriority( void );\r
 185         #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()      vPortValidateInterruptPriority()\r
 186 #endif\r
 187 \r
 188 /* portNOP() is not required by this port. */\r
 189 #define portNOP()\r
 190 \r
 191 #ifndef portFORCE_INLINE\r
 192         #define portFORCE_INLINE inline __attribute__(( always_inline))\r
 193 #endif\r
 194 \r
 195 /*-----------------------------------------------------------*/\r
 196 \r
 197 portFORCE_INLINE static void vPortRaiseBASEPRI( void )\r
 198 {\r
 199 uint32_t ulNewBASEPRI;\r
 200 \r
 201         __asm volatile\r
 202         (\r
 203                 "       mov %0, %1                                                                                              \n"     \\r
 204                 "       msr basepri, %0                                                                                 \n" \\r
 205                 "       isb                                                                                                             \n" \\r
 206                 "       dsb                                                                                                             \n" \\r
 207                 :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
 208         );\r
 209 }\r
 210 \r
 211 /*-----------------------------------------------------------*/\r
 212 \r
 213 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )\r
 214 {\r
 215 uint32_t ulOriginalBASEPRI, ulNewBASEPRI;\r
 216 \r
 217         __asm volatile\r
 218         (\r
 219                 "       mrs %0, basepri                                                                                 \n" \\r
 220                 "       mov %1, %2                                                                                              \n"     \\r
 221                 "       msr basepri, %1                                                                                 \n" \\r
 222                 "       isb                                                                                                             \n" \\r
 223                 "       dsb                                                                                                             \n" \\r
 224                 :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
 225         );\r
 226 \r
 227         /* This return will not be reached but is necessary to prevent compiler\r
 228         warnings. */\r
 229         return ulOriginalBASEPRI;\r
 230 }\r
 231 /*-----------------------------------------------------------*/\r
 232 \r
 233 portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )\r
 234 {\r
 235         __asm volatile\r
 236         (\r
 237                 "       msr basepri, %0 " :: "r" ( ulNewMaskValue )\r
 238         );\r
 239 }\r
 240 /*-----------------------------------------------------------*/\r
 241 \r
 242 portFORCE_INLINE static void vPortYield( void )\r
 243 {\r
 244         /* Set a PendSV to request a context switch. */\r
 245         portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
 246 \r
 247         /* Barriers are normally not required but do ensure the code is completely\r
 248         within the specified behaviour for the architecture. */\r
 249         __asm volatile( "dsb" );\r
 250         __asm volatile( "isb" );\r
 251 }\r
 252 \r
 253 \r
 254 #ifdef __cplusplus\r
 255 }\r
 256 #endif\r
 257 \r
 258 #endif /* PORTMACRO_H */\r
 259 \r