2 FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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5 ***************************************************************************
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7 * FreeRTOS tutorial books are available in pdf and paperback. *
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8 * Complete, revised, and edited pdf reference manuals are also *
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11 * Purchasing FreeRTOS documentation will not only help you, by *
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12 * ensuring you get running as quickly as possible and with an *
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13 * in-depth knowledge of how to use FreeRTOS, it will also help *
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14 * the FreeRTOS project to continue with its mission of providing *
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15 * professional grade, cross platform, de facto standard solutions *
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16 * for microcontrollers - completely free of charge! *
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18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 * Thank you for using FreeRTOS, and thank you for your support! *
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22 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 >>>NOTE<<< The modification to the GPL is included to allow you to
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31 distribute a combined work that includes FreeRTOS without being obliged to
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32 provide the source code for proprietary components outside of the FreeRTOS
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33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 ***************************************************************************
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46 * Having a problem? Start by reading the FAQ "My application does *
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47 * not run, what could be wrong? *
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49 * http://www.FreeRTOS.org/FAQHelp.html *
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51 ***************************************************************************
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54 http://www.FreeRTOS.org - Documentation, training, latest information,
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55 license and contact details.
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57 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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58 including FreeRTOS+Trace - an indispensable productivity tool.
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60 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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61 the code with commercial support, indemnification, and middleware, under
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62 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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63 provide a safety engineered and independently SIL3 certified version under
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64 the SafeRTOS brand: http://www.SafeRTOS.com.
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75 /*-----------------------------------------------------------
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76 * Port specific definitions.
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78 * The settings in this file configure FreeRTOS correctly for the
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79 * given hardware and compiler.
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81 * These settings should not be altered.
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82 *-----------------------------------------------------------
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85 /* Type definitions. */
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86 #define portCHAR char
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87 #define portFLOAT float
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88 #define portDOUBLE double
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89 #define portLONG long
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90 #define portSHORT short
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91 #define portSTACK_TYPE unsigned portCHAR
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92 #define portBASE_TYPE char
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94 #if( configUSE_16_BIT_TICKS == 1 )
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95 typedef unsigned portSHORT portTickType;
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96 #define portMAX_DELAY ( portTickType ) 0xffff
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98 typedef unsigned portLONG portTickType;
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99 #define portMAX_DELAY ( portTickType ) 0xffffffff
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101 /*-----------------------------------------------------------*/
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103 /* Hardware specifics. */
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104 #define portBYTE_ALIGNMENT 1
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105 #define portSTACK_GROWTH ( -1 )
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106 #define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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107 #define portYIELD() __asm( "swi" );
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108 /*-----------------------------------------------------------*/
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110 /* Critical section handling. */
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111 #define portENABLE_INTERRUPTS() __asm( "cli" )
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112 #define portDISABLE_INTERRUPTS() __asm( "sei" )
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115 * Disable interrupts before incrementing the count of critical section nesting.
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116 * The nesting count is maintained so we know when interrupts should be
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117 * re-enabled. Once interrupts are disabled the nesting count can be accessed
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118 * directly. Each task maintains its own nesting count.
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120 #define portENTER_CRITICAL() \
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122 extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
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124 portDISABLE_INTERRUPTS(); \
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125 uxCriticalNesting++; \
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129 * Interrupts are disabled so we can access the nesting count directly. If the
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130 * nesting is found to be 0 (no nesting) then we are leaving the critical
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131 * section and interrupts can be re-enabled.
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133 #define portEXIT_CRITICAL() \
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135 extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
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137 uxCriticalNesting--; \
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138 if( uxCriticalNesting == 0 ) \
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140 portENABLE_INTERRUPTS(); \
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143 /*-----------------------------------------------------------*/
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145 /* Task utilities. */
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148 * These macros are very simple as the processor automatically saves and
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149 * restores its registers as interrupts are entered and exited. In
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150 * addition to the (automatically stacked) registers we also stack the
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151 * critical nesting count. Each task maintains its own critical nesting
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152 * count as it is legitimate for a task to yield from within a critical
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153 * section. If the banked memory model is being used then the PPAGE
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154 * register is also stored as part of the tasks context.
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157 #ifdef BANKED_MODEL
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159 * Load the stack pointer for the task, then pull the critical nesting
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160 * count and PPAGE register from the stack. The remains of the
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161 * context are restored by the RTI instruction.
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163 #define portRESTORE_CONTEXT() \
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166 .globl pxCurrentTCB ; void * \n\
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167 .globl uxCriticalNesting ; char \n\
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169 ldx pxCurrentTCB \n\
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170 lds 0,x ; Stack \n\
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172 movb 1,sp+,uxCriticalNesting \n\
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173 movb 1,sp+,0x30 ; PPAGE \n\
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178 * By the time this macro is called the processor has already stacked the
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179 * registers. Simply stack the nesting count and PPAGE value, then save
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180 * the task stack pointer.
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182 #define portSAVE_CONTEXT() \
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185 .globl pxCurrentTCB ; void * \n\
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186 .globl uxCriticalNesting ; char \n\
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188 movb 0x30, 1,-sp ; PPAGE \n\
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189 movb uxCriticalNesting, 1,-sp \n\
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191 ldx pxCurrentTCB \n\
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192 sts 0,x ; Stack \n\
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198 * These macros are as per the BANKED versions above, but without saving
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199 * and restoring the PPAGE register.
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202 #define portRESTORE_CONTEXT() \
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205 .globl pxCurrentTCB ; void * \n\
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206 .globl uxCriticalNesting ; char \n\
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208 ldx pxCurrentTCB \n\
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209 lds 0,x ; Stack \n\
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211 movb 1,sp+,uxCriticalNesting \n\
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215 #define portSAVE_CONTEXT() \
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218 .globl pxCurrentTCB ; void * \n\
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219 .globl uxCriticalNesting ; char \n\
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221 movb uxCriticalNesting, 1,-sp \n\
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223 ldx pxCurrentTCB \n\
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224 sts 0,x ; Stack \n\
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230 * Utility macros to save/restore correct software registers for GCC. This is
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231 * useful when GCC does not generate appropriate ISR head/tail code.
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233 #define portISR_HEAD() \
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236 movw _.frame, 2,-sp \n\
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237 movw _.tmp, 2,-sp \n\
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238 movw _.z, 2,-sp \n\
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239 movw _.xy, 2,-sp \n\
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240 ;movw _.d2, 2,-sp \n\
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241 ;movw _.d1, 2,-sp \n\
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245 #define portISR_TAIL() \
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248 movw 2,sp+, _.xy \n\
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249 movw 2,sp+, _.z \n\
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250 movw 2,sp+, _.tmp \n\
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251 movw 2,sp+, _.frame \n\
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252 ;movw 2,sp+, _.d1 \n\
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253 ;movw 2,sp+, _.d2 \n\
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259 * Utility macro to call macros above in correct order in order to perform a
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260 * task switch from within a standard ISR. This macro can only be used if
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261 * the ISR does not use any local (stack) variables. If the ISR uses stack
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262 * variables portYIELD() should be used in it's place.
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265 #define portTASK_SWITCH_FROM_ISR() \
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266 portSAVE_CONTEXT(); \
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267 vTaskSwitchContext(); \
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268 portRESTORE_CONTEXT();
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271 /* Task function macros as described on the FreeRTOS.org WEB site. */
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272 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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273 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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279 #endif /* PORTMACRO_H */
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