2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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32 >>>NOTE<<< The modification to the GPL is included to allow you to
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33 distribute a combined work that includes FreeRTOS without being obliged to
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34 provide the source code for proprietary components outside of the FreeRTOS
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35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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38 more details. You should have received a copy of the GNU General Public
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39 License and the FreeRTOS license exception along with FreeRTOS; if not it
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40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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41 by writing to Richard Barry, contact details for whom are available on the
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46 ***************************************************************************
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48 * Having a problem? Start by reading the FAQ "My application does *
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49 * not run, what could be wrong?" *
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51 * http://www.FreeRTOS.org/FAQHelp.html *
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53 ***************************************************************************
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56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
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57 and contact details.
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59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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60 including FreeRTOS+Trace - an indispensable productivity tool.
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62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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63 the code with commercial support, indemnification, and middleware, under
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64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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65 provide a safety engineered and independently SIL3 certified version under
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66 the SafeRTOS brand: http://www.SafeRTOS.com.
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69 /*-----------------------------------------------------------
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70 * Implementation of functions defined in portable.h for the PPC405 port.
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71 *----------------------------------------------------------*/
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74 /* Scheduler includes. */
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75 #include "FreeRTOS.h"
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78 /* Library includes. */
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79 #include "xtime_l.h"
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81 #include "xintc_i.h"
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83 /*-----------------------------------------------------------*/
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85 /* Definitions to set the initial MSR of each task. */
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86 #define portCRITICAL_INTERRUPT_ENABLE ( 1UL << 17UL )
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87 #define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )
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88 #define portMACHINE_CHECK_ENABLE ( 1UL << 12UL )
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90 #if configUSE_FPU == 1
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91 #define portAPU_PRESENT ( 1UL << 25UL )
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92 #define portFCM_FPU_PRESENT ( 1UL << 13UL )
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94 #define portAPU_PRESENT ( 0UL )
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95 #define portFCM_FPU_PRESENT ( 0UL )
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98 #define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE | portAPU_PRESENT | portFCM_FPU_PRESENT )
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101 extern const unsigned _SDA_BASE_;
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102 extern const unsigned _SDA2_BASE_;
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104 /*-----------------------------------------------------------*/
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107 * Setup the system timer to generate the tick interrupt.
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109 static void prvSetupTimerInterrupt( void );
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112 * The handler for the tick interrupt - defined in portasm.s.
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114 extern void vPortTickISR( void );
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117 * The handler for the yield function - defined in portasm.s.
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119 extern void vPortYield( void );
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122 * Function to start the scheduler running by starting the highest
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123 * priority task that has thus far been created.
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125 extern void vPortStartFirstTask( void );
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127 /*-----------------------------------------------------------*/
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129 /* Structure used to hold the state of the interrupt controller. */
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130 static XIntc xInterruptController;
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132 /*-----------------------------------------------------------*/
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135 * Initialise the stack of a task to look exactly as if the task had been
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138 * See the header file portable.h.
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140 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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142 /* Place a known value at the bottom of the stack for debugging. */
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143 *pxTopOfStack = 0xDEADBEEF;
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146 /* EABI stack frame. */
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147 pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */
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149 /* Parameters in R13. */
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150 *pxTopOfStack = ( portSTACK_TYPE ) &_SDA_BASE_; /* address of the first small data area */
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151 pxTopOfStack -= 10;
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153 /* Parameters in R3. */
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154 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
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157 /* Parameters in R2. */
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158 *pxTopOfStack = ( portSTACK_TYPE ) &_SDA2_BASE_; /* address of the second small data area */
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161 /* R1 is the stack pointer so is omitted. */
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163 *pxTopOfStack = 0x10000001UL;; /* R0. */
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165 *pxTopOfStack = 0x00000000UL; /* USPRG0. */
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167 *pxTopOfStack = 0x00000000UL; /* CR. */
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169 *pxTopOfStack = 0x00000000UL; /* XER. */
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171 *pxTopOfStack = 0x00000000UL; /* CTR. */
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173 *pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler; /* LR. */
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175 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */
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177 *pxTopOfStack = portINITIAL_MSR;/* SRR1. */
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179 *pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler;/* Next LR. */
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181 *pxTopOfStack = 0x00000000UL;/* Backchain. */
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183 return pxTopOfStack;
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185 /*-----------------------------------------------------------*/
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187 portBASE_TYPE xPortStartScheduler( void )
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189 prvSetupTimerInterrupt();
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190 XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
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191 vPortStartFirstTask();
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193 /* Should not get here as the tasks are now running! */
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196 /*-----------------------------------------------------------*/
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198 void vPortEndScheduler( void )
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200 /* Not implemented. */
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203 /*-----------------------------------------------------------*/
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206 * Hardware initialisation to generate the RTOS tick.
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208 static void prvSetupTimerInterrupt( void )
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210 const unsigned long ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
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212 XTime_PITClearInterrupt();
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213 XTime_FITClearInterrupt();
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214 XTime_WDTClearInterrupt();
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215 XTime_WDTDisableInterrupt();
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216 XTime_FITDisableInterrupt();
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218 XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );
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220 XTime_PITEnableAutoReload();
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221 XTime_PITSetInterval( ulInterval );
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222 XTime_PITEnableInterrupt();
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224 /*-----------------------------------------------------------*/
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226 void vPortISRHandler( void *pvNullDoNotUse )
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228 unsigned long ulInterruptStatus, ulInterruptMask = 1UL;
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229 portBASE_TYPE xInterruptNumber;
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230 XIntc_Config *pxInterruptController;
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231 XIntc_VectorTableEntry *pxTable;
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233 /* Just to remove compiler warning. */
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234 ( void ) pvNullDoNotUse;
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236 /* Get the configuration by using the device ID - in this case it is
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237 assumed that only one interrupt controller is being used. */
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238 pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];
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240 /* Which interrupts are pending? */
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241 ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
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243 for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )
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245 if( ulInterruptStatus & 0x01UL )
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247 /* Clear the pending interrupt. */
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248 XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );
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250 /* Call the registered handler. */
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251 pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );
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252 pxTable->Handler( pxTable->CallBackRef );
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255 /* Check the next interrupt. */
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256 ulInterruptMask <<= 0x01UL;
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257 ulInterruptStatus >>= 0x01UL;
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259 /* Have we serviced all interrupts? */
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260 if( ulInterruptStatus == 0UL )
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266 /*-----------------------------------------------------------*/
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268 void vPortSetupInterruptController( void )
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270 extern void vPortISRWrapper( void );
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272 /* Perform all library calls necessary to initialise the exception table
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273 and interrupt controller. This assumes only one interrupt controller is in
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275 XExc_mDisableExceptions( XEXC_NON_CRITICAL );
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278 /* The library functions save the context - we then jump to a wrapper to
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279 save the stack into the TCB. The wrapper then calls the handler defined
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281 XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );
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282 XIntc_Initialize( &xInterruptController, XPAR_XPS_INTC_0_DEVICE_ID );
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283 XIntc_Start( &xInterruptController, XIN_REAL_MODE );
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285 /*-----------------------------------------------------------*/
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287 portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
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289 portBASE_TYPE xReturn = pdFAIL;
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291 /* This function is defined here so the scope of xInterruptController can
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292 remain within this file. */
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294 if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )
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296 XIntc_Enable( &xInterruptController, ucInterruptID );
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