2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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32 >>>NOTE<<< The modification to the GPL is included to allow you to
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33 distribute a combined work that includes FreeRTOS without being obliged to
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34 provide the source code for proprietary components outside of the FreeRTOS
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35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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38 more details. You should have received a copy of the GNU General Public
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39 License and the FreeRTOS license exception along with FreeRTOS; if not it
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40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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41 by writing to Richard Barry, contact details for whom are available on the
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46 ***************************************************************************
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48 * Having a problem? Start by reading the FAQ "My application does *
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49 * not run, what could be wrong?" *
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51 * http://www.FreeRTOS.org/FAQHelp.html *
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53 ***************************************************************************
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56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
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57 and contact details.
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59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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60 including FreeRTOS+Trace - an indispensable productivity tool.
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62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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63 the code with commercial support, indemnification, and middleware, under
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64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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65 provide a safety engineered and independently SIL3 certified version under
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66 the SafeRTOS brand: http://www.SafeRTOS.com.
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69 /*-----------------------------------------------------------
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70 * Implementation of functions defined in portable.h for the SH2A port.
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71 *----------------------------------------------------------*/
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73 /* Scheduler includes. */
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74 #include "FreeRTOS.h"
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77 /* Library includes. */
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80 /* Hardware specifics. */
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81 #include "iodefine.h"
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83 /*-----------------------------------------------------------*/
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85 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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86 PSW is set with U and I set, and PM and IPL clear. */
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87 #define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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88 #define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )
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90 /* These macros allow a critical section to be added around the call to
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91 vTaskIncrementTick(), which is only ever called from interrupts at the kernel
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92 priority - ie a known priority. Therefore these local macros are a slight
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93 optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
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94 which would require the old IPL to be read first and stored in a local variable. */
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95 #define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
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96 #define portENABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )
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98 /*-----------------------------------------------------------*/
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101 * Function to start the first task executing - written in asm code as direct
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102 * access to registers is required.
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104 static void prvStartFirstTask( void ) __attribute__((naked));
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107 * Software interrupt handler. Performs the actual context switch (saving and
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108 * restoring of registers). Written in asm code as direct register access is
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111 void vSoftwareInterruptISR( void ) __attribute__((naked));
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114 * The tick interrupt handler.
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116 void vTickISR( void ) __attribute__((interrupt));
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118 /*-----------------------------------------------------------*/
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120 extern void *pxCurrentTCB;
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122 /*-----------------------------------------------------------*/
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125 * See header file for description.
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127 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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129 /* R0 is not included as it is the stack pointer. */
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131 *pxTopOfStack = 0x00;
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133 *pxTopOfStack = portINITIAL_PSW;
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135 *pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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137 /* When debugging it can be useful if every register is set to a known
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138 value. Otherwise code space can be saved by just setting the registers
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139 that need to be set. */
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140 #ifdef USE_FULL_REGISTER_INITIALISATION
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143 *pxTopOfStack = 0xffffffff; /* r15. */
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145 *pxTopOfStack = 0xeeeeeeee;
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147 *pxTopOfStack = 0xdddddddd;
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149 *pxTopOfStack = 0xcccccccc;
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151 *pxTopOfStack = 0xbbbbbbbb;
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153 *pxTopOfStack = 0xaaaaaaaa;
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155 *pxTopOfStack = 0x99999999;
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157 *pxTopOfStack = 0x88888888;
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159 *pxTopOfStack = 0x77777777;
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161 *pxTopOfStack = 0x66666666;
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163 *pxTopOfStack = 0x55555555;
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165 *pxTopOfStack = 0x44444444;
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167 *pxTopOfStack = 0x33333333;
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169 *pxTopOfStack = 0x22222222;
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174 pxTopOfStack -= 15;
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178 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
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180 *pxTopOfStack = portINITIAL_FPSW;
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182 *pxTopOfStack = 0x12345678; /* Accumulator. */
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184 *pxTopOfStack = 0x87654321; /* Accumulator. */
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186 return pxTopOfStack;
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188 /*-----------------------------------------------------------*/
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190 portBASE_TYPE xPortStartScheduler( void )
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192 extern void vApplicationSetupTimerInterrupt( void );
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194 /* Use pxCurrentTCB just so it does not get optimised away. */
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195 if( pxCurrentTCB != NULL )
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197 /* Call an application function to set up the timer that will generate the
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198 tick interrupt. This way the application can decide which peripheral to
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199 use. A demo application is provided to show a suitable example. */
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200 vApplicationSetupTimerInterrupt();
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202 /* Enable the software interrupt. */
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203 _IEN( _ICU_SWINT ) = 1;
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205 /* Ensure the software interrupt is clear. */
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206 _IR( _ICU_SWINT ) = 0;
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208 /* Ensure the software interrupt is set to the kernel priority. */
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209 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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211 /* Start the first task. */
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212 prvStartFirstTask();
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215 /* Should not get here. */
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218 /*-----------------------------------------------------------*/
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220 void vPortEndScheduler( void )
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222 /* Not implemented as there is nothing to return to. */
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224 /*-----------------------------------------------------------*/
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226 static void prvStartFirstTask( void )
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230 /* When starting the scheduler there is nothing that needs moving to the
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231 interrupt stack because the function is not called from an interrupt.
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232 Just ensure the current stack is the user stack. */
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235 /* Obtain the location of the stack associated with which ever task
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236 pxCurrentTCB is currently pointing to. */
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237 "MOV.L #_pxCurrentTCB, R15 \n" \
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238 "MOV.L [R15], R15 \n" \
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239 "MOV.L [R15], R0 \n" \
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241 /* Restore the registers from the stack of the task pointed to by
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245 /* Accumulator low 32 bits. */
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249 /* Accumulator high 32 bits. */
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253 /* Floating point status word. */
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254 "MVTC R15, FPSW \n" \
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256 /* R1 to R15 - R0 is not included as it is the SP. */
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259 /* This pops the remaining registers. */
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265 /*-----------------------------------------------------------*/
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267 void vSoftwareInterruptISR( void )
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271 /* Re-enable interrupts. */
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274 /* Move the data that was automatically pushed onto the interrupt stack when
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275 the interrupt occurred from the interrupt stack to the user stack.
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277 R15 is saved before it is clobbered. */
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280 /* Read the user stack pointer. */
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281 "MVFC USP, R15 \n" \
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283 /* Move the address down to the data being moved. */
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284 "SUB #12, R15 \n" \
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285 "MVTC R15, USP \n" \
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287 /* Copy the data across, R15, then PC, then PSW. */
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288 "MOV.L [ R0 ], [ R15 ] \n" \
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289 "MOV.L 4[ R0 ], 4[ R15 ] \n" \
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290 "MOV.L 8[ R0 ], 8[ R15 ] \n" \
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292 /* Move the interrupt stack pointer to its new correct position. */
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295 /* All the rest of the registers are saved directly to the user stack. */
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298 /* Save the rest of the general registers (R15 has been saved already). */
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299 "PUSHM R1-R14 \n" \
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301 /* Save the FPSW and accumulator. */
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302 "MVFC FPSW, R15 \n" \
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310 /* Shifted left as it is restored to the low order word. */
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311 "SHLL #16, R15 \n" \
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314 /* Save the stack pointer to the TCB. */
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315 "MOV.L #_pxCurrentTCB, R15 \n" \
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316 "MOV.L [ R15 ], R15 \n" \
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317 "MOV.L R0, [ R15 ] \n" \
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319 /* Ensure the interrupt mask is set to the syscall priority while the kernel
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320 structures are being accessed. */
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323 /* Select the next task to run. */
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324 "BSR.A _vTaskSwitchContext \n" \
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326 /* Reset the interrupt mask as no more data structure access is required. */
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329 /* Load the stack pointer of the task that is now selected as the Running
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330 state task from its TCB. */
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331 "MOV.L #_pxCurrentTCB,R15 \n" \
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332 "MOV.L [ R15 ], R15 \n" \
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333 "MOV.L [ R15 ], R0 \n" \
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335 /* Restore the context of the new task. The PSW (Program Status Word) and
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336 PC will be popped by the RTE instruction. */
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342 "MVTC R15, FPSW \n" \
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347 :: "i"(configMAX_SYSCALL_INTERRUPT_PRIORITY), "i"(configKERNEL_INTERRUPT_PRIORITY)
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350 /*-----------------------------------------------------------*/
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352 void vTickISR( void )
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354 /* Re-enabled interrupts. */
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355 __asm volatile( "SETPSW I" );
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357 /* Increment the tick, and perform any processing the new tick value
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358 necessitates. Ensure IPL is at the max syscall value first. */
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359 portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();
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361 vTaskIncrementTick();
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363 portENABLE_INTERRUPTS_FROM_KERNEL_ISR();
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365 /* Only select a new task if the preemptive scheduler is being used. */
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366 #if( configUSE_PREEMPTION == 1 )
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370 /*-----------------------------------------------------------*/
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372 unsigned long ulPortGetIPL( void )
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376 "MVFC PSW, R1 \n" \
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377 "SHLR #24, R1 \n" \
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381 /* This will never get executed, but keeps the compiler from complaining. */
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384 /*-----------------------------------------------------------*/
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386 void vPortSetIPL( unsigned long ulNewIPL )
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391 "MVFC PSW, R5 \n" \
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392 "SHLL #24, R1 \n" \
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393 "AND #-0F000001H, R5 \n" \
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395 "MVTC R5, PSW \n" \
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projects / freertos / blob