2 FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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5 ***************************************************************************
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7 * FreeRTOS tutorial books are available in pdf and paperback. *
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8 * Complete, revised, and edited pdf reference manuals are also *
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11 * Purchasing FreeRTOS documentation will not only help you, by *
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12 * ensuring you get running as quickly as possible and with an *
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13 * in-depth knowledge of how to use FreeRTOS, it will also help *
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14 * the FreeRTOS project to continue with its mission of providing *
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15 * professional grade, cross platform, de facto standard solutions *
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16 * for microcontrollers - completely free of charge! *
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18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 * Thank you for using FreeRTOS, and thank you for your support! *
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22 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 >>>NOTE<<< The modification to the GPL is included to allow you to
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31 distribute a combined work that includes FreeRTOS without being obliged to
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32 provide the source code for proprietary components outside of the FreeRTOS
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33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 ***************************************************************************
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46 * Having a problem? Start by reading the FAQ "My application does *
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47 * not run, what could be wrong? *
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49 * http://www.FreeRTOS.org/FAQHelp.html *
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51 ***************************************************************************
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54 http://www.FreeRTOS.org - Documentation, training, latest information,
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55 license and contact details.
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57 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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58 including FreeRTOS+Trace - an indispensable productivity tool.
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60 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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61 the code with commercial support, indemnification, and middleware, under
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62 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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63 provide a safety engineered and independently SIL3 certified version under
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64 the SafeRTOS brand: http://www.SafeRTOS.com.
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67 /*-----------------------------------------------------------
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68 * Implementation of functions defined in portable.h for the SH2A port.
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69 *----------------------------------------------------------*/
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71 /* Scheduler includes. */
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72 #include "FreeRTOS.h"
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75 /* Library includes. */
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78 /* Hardware specifics. */
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79 #include "iodefine.h"
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81 /*-----------------------------------------------------------*/
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83 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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84 PSW is set with U and I set, and PM and IPL clear. */
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85 #define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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86 #define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )
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88 /* These macros allow a critical section to be added around the call to
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89 vTaskIncrementTick(), which is only ever called from interrupts at the kernel
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90 priority - ie a known priority. Therefore these local macros are a slight
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91 optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
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92 which would require the old IPL to be read first and stored in a local variable. */
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93 #define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
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94 #define portENABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )
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96 /*-----------------------------------------------------------*/
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99 * Function to start the first task executing - written in asm code as direct
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100 * access to registers is required.
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102 static void prvStartFirstTask( void ) __attribute__((naked));
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105 * Software interrupt handler. Performs the actual context switch (saving and
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106 * restoring of registers). Written in asm code as direct register access is
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109 void vSoftwareInterruptISR( void ) __attribute__((naked));
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112 * The tick interrupt handler.
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114 void vTickISR( void ) __attribute__((interrupt));
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116 /*-----------------------------------------------------------*/
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118 extern void *pxCurrentTCB;
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120 /*-----------------------------------------------------------*/
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123 * See header file for description.
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125 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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127 /* R0 is not included as it is the stack pointer. */
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129 *pxTopOfStack = 0x00;
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131 *pxTopOfStack = portINITIAL_PSW;
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133 *pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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135 /* When debugging it can be useful if every register is set to a known
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136 value. Otherwise code space can be saved by just setting the registers
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137 that need to be set. */
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138 #ifdef USE_FULL_REGISTER_INITIALISATION
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141 *pxTopOfStack = 0xffffffff; /* r15. */
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143 *pxTopOfStack = 0xeeeeeeee;
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145 *pxTopOfStack = 0xdddddddd;
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147 *pxTopOfStack = 0xcccccccc;
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149 *pxTopOfStack = 0xbbbbbbbb;
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151 *pxTopOfStack = 0xaaaaaaaa;
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153 *pxTopOfStack = 0x99999999;
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155 *pxTopOfStack = 0x88888888;
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157 *pxTopOfStack = 0x77777777;
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159 *pxTopOfStack = 0x66666666;
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161 *pxTopOfStack = 0x55555555;
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163 *pxTopOfStack = 0x44444444;
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165 *pxTopOfStack = 0x33333333;
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167 *pxTopOfStack = 0x22222222;
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172 pxTopOfStack -= 15;
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176 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
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178 *pxTopOfStack = portINITIAL_FPSW;
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180 *pxTopOfStack = 0x12345678; /* Accumulator. */
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182 *pxTopOfStack = 0x87654321; /* Accumulator. */
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184 return pxTopOfStack;
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186 /*-----------------------------------------------------------*/
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188 portBASE_TYPE xPortStartScheduler( void )
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190 extern void vApplicationSetupTimerInterrupt( void );
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192 /* Use pxCurrentTCB just so it does not get optimised away. */
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193 if( pxCurrentTCB != NULL )
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195 /* Call an application function to set up the timer that will generate the
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196 tick interrupt. This way the application can decide which peripheral to
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197 use. A demo application is provided to show a suitable example. */
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198 vApplicationSetupTimerInterrupt();
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200 /* Enable the software interrupt. */
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201 _IEN( _ICU_SWINT ) = 1;
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203 /* Ensure the software interrupt is clear. */
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204 _IR( _ICU_SWINT ) = 0;
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206 /* Ensure the software interrupt is set to the kernel priority. */
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207 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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209 /* Start the first task. */
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210 prvStartFirstTask();
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213 /* Should not get here. */
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216 /*-----------------------------------------------------------*/
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218 void vPortEndScheduler( void )
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220 /* Not implemented as there is nothing to return to. */
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222 /*-----------------------------------------------------------*/
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224 static void prvStartFirstTask( void )
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228 /* When starting the scheduler there is nothing that needs moving to the
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229 interrupt stack because the function is not called from an interrupt.
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230 Just ensure the current stack is the user stack. */
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233 /* Obtain the location of the stack associated with which ever task
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234 pxCurrentTCB is currently pointing to. */
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235 "MOV.L #_pxCurrentTCB, R15 \n" \
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236 "MOV.L [R15], R15 \n" \
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237 "MOV.L [R15], R0 \n" \
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239 /* Restore the registers from the stack of the task pointed to by
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243 /* Accumulator low 32 bits. */
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247 /* Accumulator high 32 bits. */
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251 /* Floating point status word. */
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252 "MVTC R15, FPSW \n" \
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254 /* R1 to R15 - R0 is not included as it is the SP. */
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257 /* This pops the remaining registers. */
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263 /*-----------------------------------------------------------*/
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265 void vSoftwareInterruptISR( void )
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269 /* Re-enable interrupts. */
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272 /* Move the data that was automatically pushed onto the interrupt stack when
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273 the interrupt occurred from the interrupt stack to the user stack.
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275 R15 is saved before it is clobbered. */
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278 /* Read the user stack pointer. */
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279 "MVFC USP, R15 \n" \
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281 /* Move the address down to the data being moved. */
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282 "SUB #12, R15 \n" \
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283 "MVTC R15, USP \n" \
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285 /* Copy the data across, R15, then PC, then PSW. */
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286 "MOV.L [ R0 ], [ R15 ] \n" \
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287 "MOV.L 4[ R0 ], 4[ R15 ] \n" \
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288 "MOV.L 8[ R0 ], 8[ R15 ] \n" \
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290 /* Move the interrupt stack pointer to its new correct position. */
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293 /* All the rest of the registers are saved directly to the user stack. */
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296 /* Save the rest of the general registers (R15 has been saved already). */
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297 "PUSHM R1-R14 \n" \
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299 /* Save the FPSW and accumulator. */
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300 "MVFC FPSW, R15 \n" \
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308 /* Shifted left as it is restored to the low order word. */
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309 "SHLL #16, R15 \n" \
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312 /* Save the stack pointer to the TCB. */
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313 "MOV.L #_pxCurrentTCB, R15 \n" \
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314 "MOV.L [ R15 ], R15 \n" \
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315 "MOV.L R0, [ R15 ] \n" \
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317 /* Ensure the interrupt mask is set to the syscall priority while the kernel
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318 structures are being accessed. */
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321 /* Select the next task to run. */
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322 "BSR.A _vTaskSwitchContext \n" \
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324 /* Reset the interrupt mask as no more data structure access is required. */
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327 /* Load the stack pointer of the task that is now selected as the Running
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328 state task from its TCB. */
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329 "MOV.L #_pxCurrentTCB,R15 \n" \
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330 "MOV.L [ R15 ], R15 \n" \
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331 "MOV.L [ R15 ], R0 \n" \
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333 /* Restore the context of the new task. The PSW (Program Status Word) and
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334 PC will be popped by the RTE instruction. */
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340 "MVTC R15, FPSW \n" \
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345 :: "i"(configMAX_SYSCALL_INTERRUPT_PRIORITY), "i"(configKERNEL_INTERRUPT_PRIORITY)
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348 /*-----------------------------------------------------------*/
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350 void vTickISR( void )
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352 /* Re-enabled interrupts. */
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353 __asm volatile( "SETPSW I" );
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355 /* Increment the tick, and perform any processing the new tick value
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356 necessitates. Ensure IPL is at the max syscall value first. */
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357 portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();
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359 vTaskIncrementTick();
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361 portENABLE_INTERRUPTS_FROM_KERNEL_ISR();
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363 /* Only select a new task if the preemptive scheduler is being used. */
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364 #if( configUSE_PREEMPTION == 1 )
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368 /*-----------------------------------------------------------*/
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370 unsigned long ulPortGetIPL( void )
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374 "MVFC PSW, R1 \n" \
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375 "SHLR #24, R1 \n" \
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379 /* This will never get executed, but keeps the compiler from complaining. */
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382 /*-----------------------------------------------------------*/
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384 void vPortSetIPL( unsigned long ulNewIPL )
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389 "MVFC PSW, R5 \n" \
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390 "SHLL #24, R1 \n" \
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391 "AND #-0F000001H, R5 \n" \
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393 "MVTC R5, PSW \n" \
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