git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h

   1 /*\r
   2     FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS provides completely free yet professionally developed,    *\r
  10      *    robust, strictly quality controlled, supported, and cross          *\r
  11      *    platform software that has become a de facto standard.             *\r
  12      *                                                                       *\r
  13      *    Help yourself get started quickly and support the FreeRTOS         *\r
  14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  16      *                                                                       *\r
  17      *    Thank you!                                                         *\r
  18      *                                                                       *\r
  19     ***************************************************************************\r
  20 \r
  21     This file is part of the FreeRTOS distribution.\r
  22 \r
  23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  24     the terms of the GNU General Public License (version 2) as published by the\r
  25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  26 \r
  27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  28     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  29     >>!   obliged to provide the source code for proprietary components     !<<\r
  30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  31 \r
  32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  35     link: http://www.freertos.org/a00114.html\r
  36 \r
  37     1 tab == 4 spaces!\r
  38 \r
  39     ***************************************************************************\r
  40      *                                                                       *\r
  41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  42      *    not run, what could be wrong?"                                     *\r
  43      *                                                                       *\r
  44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  45      *                                                                       *\r
  46     ***************************************************************************\r
  47 \r
  48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  49     license and Real Time Engineers Ltd. contact details.\r
  50 \r
  51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  54 \r
  55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  57     licenses offer ticketed support, indemnification and middleware.\r
  58 \r
  59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  60     engineered and independently SIL3 certified version for use in safety and\r
  61     mission critical applications that require provable dependability.\r
  62 \r
  63     1 tab == 4 spaces!\r
  64 */\r
  65 \r
  66 #ifndef PORTMACRO_H\r
  67 #define PORTMACRO_H\r
  68 \r
  69 #ifdef __cplusplus\r
  70 extern "C" {\r
  71 #endif\r
  72 \r
  73 /* System Includes. */\r
  74 #include <tc1782.h>\r
  75 #include <machine/intrinsics.h>\r
  76 \r
  77 /*-----------------------------------------------------------\r
  78  * Port specific definitions.\r
  79  *\r
  80  * The settings in this file configure FreeRTOS correctly for the\r
  81  * given hardware and compiler.\r
  82  *\r
  83  * These settings should not be altered.\r
  84  *-----------------------------------------------------------\r
  85  */\r
  86 \r
  87 /* Type definitions. */\r
  88 #define portCHAR                char\r
  89 #define portFLOAT               float\r
  90 #define portDOUBLE              double\r
  91 #define portLONG                long\r
  92 #define portSHORT               short\r
  93 #define portSTACK_TYPE  uint32_t\r
  94 #define portBASE_TYPE   long\r
  95 \r
  96 typedef portSTACK_TYPE StackType_t;\r
  97 typedef long BaseType_t;\r
  98 typedef unsigned long UBaseType_t;\r
  99 \r
 100 #if( configUSE_16_BIT_TICKS == 1 )\r
 101         typedef uint16_t TickType_t;\r
 102         #define portMAX_DELAY ( TickType_t ) 0xffff\r
 103 #else\r
 104         typedef uint32_t TickType_t;\r
 105         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 106 #endif\r
 107 /*---------------------------------------------------------------------------*/\r
 108 \r
 109 /* Architecture specifics. */\r
 110 #define portSTACK_GROWTH                                                        ( -1 )\r
 111 #define portTICK_PERIOD_MS                                                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 112 #define portBYTE_ALIGNMENT                                                      4\r
 113 #define portNOP()                                                                       __asm volatile( " nop " )\r
 114 #define portCRITICAL_NESTING_IN_TCB                                     1\r
 115 #define portRESTORE_FIRST_TASK_PRIORITY_LEVEL           1\r
 116 \r
 117 \r
 118 /*---------------------------------------------------------------------------*/\r
 119 \r
 120 typedef struct MPU_SETTINGS { uint32_t ulNotUsed; } xMPU_SETTINGS;\r
 121 \r
 122 /* Define away the instruction from the Restore Context Macro. */\r
 123 #define portPRIVILEGE_BIT                                                       0x0UL\r
 124 \r
 125 #define portCCPN_MASK                                           ( 0x000000FFUL )\r
 126 \r
 127 extern void vTaskEnterCritical( void );\r
 128 extern void vTaskExitCritical( void );\r
 129 #define portENTER_CRITICAL()                    vTaskEnterCritical()\r
 130 #define portEXIT_CRITICAL()                             vTaskExitCritical()\r
 131 /*---------------------------------------------------------------------------*/\r
 132 \r
 133 /* CSA Manipulation. */\r
 134 #define portCSA_TO_ADDRESS( pCSA )                      ( ( uint32_t * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )\r
 135 #define portADDRESS_TO_CSA( pAddress )          ( ( uint32_t )( ( ( ( (uint32_t)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( uint32_t )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )\r
 136 /*---------------------------------------------------------------------------*/\r
 137 \r
 138 #define portYIELD()                                                             _syscall( 0 )\r
 139 /* Port Restore is implicit in the platform when the function is returned from the original PSW is automatically replaced. */\r
 140 #define portSYSCALL_TASK_YIELD                                  0\r
 141 #define portSYSCALL_RAISE_PRIORITY                              1\r
 142 /*---------------------------------------------------------------------------*/\r
 143 \r
 144 /* Critical section management. */\r
 145 \r
 146 /* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
 147 #define portDISABLE_INTERRUPTS()        {                                                                                                                                                                                                       \\r
 148                                                                                 uint32_t ulICR;                                                                                                                                                 \\r
 149                                                                                 _disable();                                                                                                                                                                             \\r
 150                                                                                 ulICR = _mfcr( $ICR );          /* Get current ICR value. */                                                                            \\r
 151                                                                                 ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                                                                                     \\r
 152                                                                                 ulICR |= configMAX_SYSCALL_INTERRUPT_PRIORITY; /* Set mask bits to required priority mask. */   \\r
 153                                                                                 _mtcr( $ICR, ulICR );           /* Write back updated ICR. */                                                                           \\r
 154                                                                                 _isync();                                                                                                                                                                               \\r
 155                                                                                 _enable();                                                                                                                                                                              \\r
 156                                                                         }\r
 157 \r
 158 /* Clear ICR.CCPN to allow all interrupt priorities. */\r
 159 #define portENABLE_INTERRUPTS()         {                                                                                                                                       \\r
 160                                                                                 uint32_t ulICR;                                                                                 \\r
 161                                                                                 _disable();                                                                                                             \\r
 162                                                                                 ulICR = _mfcr( $ICR );          /* Get current ICR value. */            \\r
 163                                                                                 ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                     \\r
 164                                                                                 _mtcr( $ICR, ulICR );           /* Write back updated ICR. */           \\r
 165                                                                                 _isync();                                                                                                               \\r
 166                                                                                 _enable();                                                                                                              \\r
 167                                                                         }\r
 168 \r
 169 /* Set ICR.CCPN to uxSavedMaskValue. */\r
 170 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedMaskValue )   {                                                                                                                                                                               \\r
 171                                                                                                                                         uint32_t ulICR;                                                                                                                         \\r
 172                                                                                                                                         _disable();                                                                                                                                                     \\r
 173                                                                                                                                         ulICR = _mfcr( $ICR );          /* Get current ICR value. */                                                    \\r
 174                                                                                                                                         ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                                                             \\r
 175                                                                                                                                         ulICR |= uxSavedMaskValue;      /* Set mask bits to previously saved mask value. */             \\r
 176                                                                                                                                         _mtcr( $ICR, ulICR );           /* Write back updated ICR. */                                                   \\r
 177                                                                                                                                         _isync();                                                                                                                                                       \\r
 178                                                                                                                                         _enable();                                                                                                                                                      \\r
 179                                                                                                                                 }\r
 180 \r
 181 \r
 182 /* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
 183 extern uint32_t uxPortSetInterruptMaskFromISR( void );\r
 184 #define portSET_INTERRUPT_MASK_FROM_ISR()       uxPortSetInterruptMaskFromISR()\r
 185 \r
 186 /* Pend a priority 1 interrupt, which will take care of the context switch. */\r
 187 #define portYIELD_FROM_ISR( xHigherPriorityTaskWoken )          if( xHigherPriorityTaskWoken != pdFALSE ) {     CPU_SRC0.bits.SETR = 1; _isync(); }\r
 188 \r
 189 /*---------------------------------------------------------------------------*/\r
 190 \r
 191 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
 192 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 193 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 194 /*---------------------------------------------------------------------------*/\r
 195 \r
 196 /*\r
 197  * Port specific clean up macro required to free the CSAs that were consumed by\r
 198  * a task that has since been deleted.\r
 199  */\r
 200 void vPortReclaimCSA( uint32_t *pxTCB );\r
 201 #define portCLEAN_UP_TCB( pxTCB )               vPortReclaimCSA( ( uint32_t * ) ( pxTCB ) )\r
 202 \r
 203 #ifdef __cplusplus\r
 204 }\r
 205 #endif\r
 206 \r
 207 #endif /* PORTMACRO_H */\r