git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c

   1 /*\r
   2     FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  12 \r
  13         ***************************************************************************\r
  14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  16     >>!   obliged to provide the source code for proprietary components     !<<\r
  17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  18         ***************************************************************************\r
  19 \r
  20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  23     link: http://www.freertos.org/a00114.html\r
  24 \r
  25     ***************************************************************************\r
  26      *                                                                       *\r
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  34      *    tutorial book, reference manual, or both:                          *\r
  35      *    http://www.FreeRTOS.org/Documentation                              *\r
  36      *                                                                       *\r
  37     ***************************************************************************\r
  38 \r
  39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
  40         the FAQ page "My application does not run, what could be wrong?".  Have you\r
  41         defined configASSERT()?\r
  42 \r
  43         http://www.FreeRTOS.org/support - In return for receiving this top quality\r
  44         embedded software for free we request you assist our global community by\r
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  46 \r
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  48         be as productive as possible as early as possible.  Now you can receive\r
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  51 \r
  52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
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  58 \r
  59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
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  62 \r
  63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  64     engineered and independently SIL3 certified version for use in safety and\r
  65     mission critical applications that require provable dependability.\r
  66 \r
  67     1 tab == 4 spaces!\r
  68 */\r
  69 \r
  70 /* Kernel includes. */\r
  71 #include "FreeRTOS.h"\r
  72 \r
  73 /* Machine includes */\r
  74 #include <tc1782.h>\r
  75 #include <machine/intrinsics.h>\r
  76 #include <machine/cint.h>\r
  77 /*---------------------------------------------------------------------------*/\r
  78 \r
  79 /*\r
  80  * This reference is required by the Save/Restore Context Macros.\r
  81  */\r
  82 extern volatile uint32_t *pxCurrentTCB;\r
  83 /*-----------------------------------------------------------*/\r
  84 \r
  85 /*\r
  86  * This file contains base definitions for all of the possible traps in the system.\r
  87  * It is suggested to provide implementations for all of the traps but for\r
  88  * the time being they simply trigger a DEBUG instruction so that it is easy\r
  89  * to see what caused a particular trap.\r
  90  *\r
  91  * Trap Class 6, the SYSCALL, is used exclusively by the operating system.\r
  92  */\r
  93 \r
  94 /* The Trap Classes. */\r
  95 #define portMMU_TRAP                                                                            0\r
  96 #define portIPT_TRAP                                                                            1\r
  97 #define portIE_TRAP                                                                                     2\r
  98 #define portCM_TRAP                                                                                     3\r
  99 #define portSBP_TRAP                                                                            4\r
 100 #define portASSERT_TRAP                                                                         5\r
 101 #define portNMI_TRAP                                                                            7\r
 102 \r
 103 /* MMU Trap Identifications. */\r
 104 #define portTIN_MMU_VIRTUAL_ADDRESS_FILL                                        0\r
 105 #define portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION                          1\r
 106 \r
 107 /* Internal Protection Trap Identifications. */\r
 108 #define portTIN_IPT_PRIVILIGED_INSTRUCTION                                      1\r
 109 #define portTIN_IPT_MEMORY_PROTECTION_READ                                      2\r
 110 #define portTIN_IPT_MEMORY_PROTECTION_WRITE                                     3\r
 111 #define portTIN_IPT_MEMORY_PROTECTION_EXECUTION                         4\r
 112 #define portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS         5\r
 113 #define portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS                      6\r
 114 #define portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION  7\r
 115 \r
 116 /* Instruction Error Trap Identifications. */\r
 117 #define portTIN_IE_ILLEGAL_OPCODE                                                       1\r
 118 #define portTIN_IE_UNIMPLEMENTED_OPCODE                                         2\r
 119 #define portTIN_IE_INVALID_OPERAND                                                      3\r
 120 #define portTIN_IE_DATA_ADDRESS_ALIGNMENT                                       4\r
 121 #define portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS                         5\r
 122 \r
 123 /* Context Management Trap Identifications. */\r
 124 #define portTIN_CM_FREE_CONTEXT_LIST_DEPLETION                          1\r
 125 #define portTIN_CM_CALL_DEPTH_OVERFLOW                                          2\r
 126 #define portTIN_CM_CALL_DEPTH_UNDEFLOW                                          3\r
 127 #define portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW                          4\r
 128 #define portTIN_CM_CALL_STACK_UNDERFLOW                                         5\r
 129 #define portTIN_CM_CONTEXT_TYPE                                                         6\r
 130 #define portTIN_CM_NESTING_ERROR                                                        7\r
 131 \r
 132 /* System Bus and Peripherals Trap Identifications. */\r
 133 #define portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR                     1\r
 134 #define portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR                       2\r
 135 #define portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR                      3\r
 136 #define portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR         4\r
 137 #define portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR                      5\r
 138 #define portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR                         6\r
 139 \r
 140 /* Assertion Trap Identifications. */\r
 141 #define portTIN_ASSERT_ARITHMETIC_OVERFLOW                                      1\r
 142 #define portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW                       2\r
 143 \r
 144 /* Non-maskable Interrupt Trap Identifications. */\r
 145 #define portTIN_NMI_NON_MASKABLE_INTERRUPT                                      0\r
 146 /*---------------------------------------------------------------------------*/\r
 147 \r
 148 void vMMUTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 149 void vInternalProtectionTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 150 void vInstructionErrorTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 151 void vContextManagementTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 152 void vSystemBusAndPeripheralsTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 153 void vAssertionTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 154 void vNonMaskableInterruptTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 155 /*---------------------------------------------------------------------------*/\r
 156 \r
 157 void vTrapInstallHandlers( void )\r
 158 {\r
 159         if( 0 == _install_trap_handler ( portMMU_TRAP, vMMUTrap ) )\r
 160         {\r
 161                 _debug();\r
 162         }\r
 163 \r
 164         if( 0 == _install_trap_handler ( portIPT_TRAP, vInternalProtectionTrap ) )\r
 165         {\r
 166                 _debug();\r
 167         }\r
 168 \r
 169         if( 0 == _install_trap_handler ( portIE_TRAP, vInstructionErrorTrap ) )\r
 170         {\r
 171                 _debug();\r
 172         }\r
 173 \r
 174         if( 0 == _install_trap_handler ( portCM_TRAP, vContextManagementTrap ) )\r
 175         {\r
 176                 _debug();\r
 177         }\r
 178 \r
 179         if( 0 == _install_trap_handler ( portSBP_TRAP, vSystemBusAndPeripheralsTrap ) )\r
 180         {\r
 181                 _debug();\r
 182         }\r
 183 \r
 184         if( 0 == _install_trap_handler ( portASSERT_TRAP, vAssertionTrap ) )\r
 185         {\r
 186                 _debug();\r
 187         }\r
 188 \r
 189         if( 0 == _install_trap_handler ( portNMI_TRAP, vNonMaskableInterruptTrap ) )\r
 190         {\r
 191                 _debug();\r
 192         }\r
 193 }\r
 194 /*-----------------------------------------------------------*/\r
 195 \r
 196 void vMMUTrap( int iTrapIdentification )\r
 197 {\r
 198         switch( iTrapIdentification )\r
 199         {\r
 200         case portTIN_MMU_VIRTUAL_ADDRESS_FILL:\r
 201         case portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION:\r
 202         default:\r
 203                 _debug();\r
 204                 break;\r
 205         }\r
 206 }\r
 207 /*---------------------------------------------------------------------------*/\r
 208 \r
 209 void vInternalProtectionTrap( int iTrapIdentification )\r
 210 {\r
 211         /* Deliberate fall through to default. */\r
 212         switch( iTrapIdentification )\r
 213         {\r
 214                 case portTIN_IPT_PRIVILIGED_INSTRUCTION:\r
 215                         /* Instruction is not allowed at current execution level, eg DISABLE at User-0. */\r
 216 \r
 217                 case portTIN_IPT_MEMORY_PROTECTION_READ:\r
 218                         /* Load word using invalid address. */\r
 219                         \r
 220                 case portTIN_IPT_MEMORY_PROTECTION_WRITE:\r
 221                         /* Store Word using invalid address. */\r
 222                         \r
 223                 case portTIN_IPT_MEMORY_PROTECTION_EXECUTION:\r
 224                         /* PC jumped to an address outside of the valid range. */\r
 225                         \r
 226                 case portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS:\r
 227                         /* Access to a peripheral denied at current execution level. */\r
 228                         \r
 229                 case portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS:\r
 230                         /* NULL Pointer. */\r
 231                         \r
 232                 case portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION:\r
 233                         /* Tried to modify a global address pointer register. */\r
 234                         \r
 235                 default:\r
 236                 \r
 237                         pxCurrentTCB[ 0 ] = _mfcr( $PCXI );\r
 238                         _debug();\r
 239                         break;\r
 240         }\r
 241 }\r
 242 /*---------------------------------------------------------------------------*/\r
 243 \r
 244 void vInstructionErrorTrap( int iTrapIdentification )\r
 245 {\r
 246         /* Deliberate fall through to default. */\r
 247         switch( iTrapIdentification )\r
 248         {\r
 249                 case portTIN_IE_ILLEGAL_OPCODE:\r
 250                 case portTIN_IE_UNIMPLEMENTED_OPCODE:\r
 251                 case portTIN_IE_INVALID_OPERAND:\r
 252                 case portTIN_IE_DATA_ADDRESS_ALIGNMENT:\r
 253                 case portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS:\r
 254                 default:\r
 255                         _debug();\r
 256                         break;\r
 257         }\r
 258 }\r
 259 /*---------------------------------------------------------------------------*/\r
 260 \r
 261 void vContextManagementTrap( int iTrapIdentification )\r
 262 {\r
 263         /* Deliberate fall through to default. */\r
 264         switch( iTrapIdentification )\r
 265         {\r
 266                 case portTIN_CM_FREE_CONTEXT_LIST_DEPLETION:\r
 267                 case portTIN_CM_CALL_DEPTH_OVERFLOW:\r
 268                 case portTIN_CM_CALL_DEPTH_UNDEFLOW:\r
 269                 case portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW:\r
 270                 case portTIN_CM_CALL_STACK_UNDERFLOW:\r
 271                 case portTIN_CM_CONTEXT_TYPE:\r
 272                 case portTIN_CM_NESTING_ERROR:\r
 273                 default:\r
 274                         _debug();\r
 275                         break;\r
 276         }\r
 277 }\r
 278 /*---------------------------------------------------------------------------*/\r
 279 \r
 280 void vSystemBusAndPeripheralsTrap( int iTrapIdentification )\r
 281 {\r
 282         /* Deliberate fall through to default. */\r
 283         switch( iTrapIdentification )\r
 284         {\r
 285                 case portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR:\r
 286                 case portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR:\r
 287                 case portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR:\r
 288                 case portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR:\r
 289                 case portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR:\r
 290                 case portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR:\r
 291                 default:\r
 292                         _debug();\r
 293                         break;\r
 294         }\r
 295 }\r
 296 /*---------------------------------------------------------------------------*/\r
 297 \r
 298 void vAssertionTrap( int iTrapIdentification )\r
 299 {\r
 300         /* Deliberate fall through to default. */\r
 301         switch( iTrapIdentification )\r
 302         {\r
 303                 case portTIN_ASSERT_ARITHMETIC_OVERFLOW:\r
 304                 case portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW:\r
 305                 default:\r
 306                         _debug();\r
 307                         break;\r
 308         }\r
 309 }\r
 310 /*---------------------------------------------------------------------------*/\r
 311 \r
 312 void vNonMaskableInterruptTrap( int iTrapIdentification )\r
 313 {\r
 314         /* Deliberate fall through to default. */\r
 315         switch( iTrapIdentification )\r
 316         {\r
 317                 case portTIN_NMI_NON_MASKABLE_INTERRUPT:\r
 318                 default:\r
 319                         _debug();\r
 320                         break;\r
 321         }\r
 322 }\r
 323 /*---------------------------------------------------------------------------*/\r