2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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32 >>>NOTE<<< The modification to the GPL is included to allow you to
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33 distribute a combined work that includes FreeRTOS without being obliged to
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34 provide the source code for proprietary components outside of the FreeRTOS
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35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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38 more details. You should have received a copy of the GNU General Public
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39 License and the FreeRTOS license exception along with FreeRTOS; if not it
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40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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41 by writing to Richard Barry, contact details for whom are available on the
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46 ***************************************************************************
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48 * Having a problem? Start by reading the FAQ "My application does *
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49 * not run, what could be wrong?" *
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51 * http://www.FreeRTOS.org/FAQHelp.html *
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53 ***************************************************************************
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56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
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57 and contact details.
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59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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60 including FreeRTOS+Trace - an indispensable productivity tool.
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62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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63 the code with commercial support, indemnification, and middleware, under
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64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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65 provide a safety engineered and independently SIL3 certified version under
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66 the SafeRTOS brand: http://www.SafeRTOS.com.
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69 /* Standard includes. */
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72 /* Scheduler includes. */
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73 #include "FreeRTOS.h"
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76 /* The critical nesting value is initialised to a non zero value to ensure
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77 interrupts don't accidentally become enabled before the scheduler is started. */
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78 #define portINITIAL_CRITICAL_NESTING (( unsigned short ) 10)
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80 /* Initial PSW value allocated to a newly created task.
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82 * ||||||||-------------- Fill byte
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83 * |||||||--------------- Carry Flag cleared
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84 * |||||----------------- In-service priority Flags set to low level
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85 * ||||------------------ Register bank Select 0 Flag cleared
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86 * |||------------------- Auxiliary Carry Flag cleared
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87 * ||-------------------- Register bank Select 1 Flag cleared
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88 * |--------------------- Zero Flag set
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89 * ---------------------- Global Interrupt Flag set (enabled)
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91 #define portPSW (0xc6UL)
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93 /* We require the address of the pxCurrentTCB variable, but don't want to know
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94 any details of its type. */
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95 typedef void tskTCB;
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96 extern volatile tskTCB * volatile pxCurrentTCB;
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98 /* Most ports implement critical sections by placing the interrupt flags on
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99 the stack before disabling interrupts. Exiting the critical section is then
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100 simply a case of popping the flags from the stack. As 78K0 IAR does not use
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101 a frame pointer this cannot be done as modifying the stack will clobber all
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102 the stack variables. Instead each task maintains a count of the critical
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103 section nesting depth. Each time a critical section is entered the count is
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104 incremented. Each time a critical section is left the count is decremented -
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105 with interrupts only being re-enabled if the count is zero.
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107 usCriticalNesting will get set to zero when the scheduler starts, but must
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108 not be initialised to zero as this will cause problems during the startup
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110 volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;
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111 /*-----------------------------------------------------------*/
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114 * Sets up the periodic ISR used for the RTOS tick.
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116 static void prvSetupTimerInterrupt( void );
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117 /*-----------------------------------------------------------*/
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120 * Initialise the stack of a task to look exactly as if a call to
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121 * portSAVE_CONTEXT had been called.
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123 * See the header file portable.h.
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125 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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127 unsigned long *pulLocal;
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129 #if configMEMORY_MODE == 1
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131 /* Parameters are passed in on the stack, and written using a 32bit value
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132 hence a space is left for the second two bytes. */
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135 /* Write in the parameter value. */
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136 pulLocal = ( unsigned long * ) pxTopOfStack;
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137 *pulLocal = ( unsigned long ) pvParameters;
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140 /* These values are just spacers. The return address of the function
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141 would normally be written here. */
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142 *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;
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144 *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;
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147 /* The start address / PSW value is also written in as a 32bit value,
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148 so leave a space for the second two bytes. */
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151 /* Task function start address combined with the PSW. */
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152 pulLocal = ( unsigned long * ) pxTopOfStack;
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153 *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );
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156 /* An initial value for the AX register. */
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157 *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;
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162 /* Task function address is written to the stack first. As it is
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163 written as a 32bit value a space is left on the stack for the second
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167 /* Task function start address combined with the PSW. */
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168 pulLocal = ( unsigned long * ) pxTopOfStack;
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169 *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );
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172 /* The parameter is passed in AX. */
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173 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
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178 /* An initial value for the HL register. */
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179 *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;
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182 /* CS and ES registers. */
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183 *pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;
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186 /* Finally the remaining general purpose registers DE and BC */
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187 *pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE;
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189 *pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC;
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192 /* Finally the critical section nesting count is set to zero when the task
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194 *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING;
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196 /* Return a pointer to the top of the stack we have generated so this can
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197 be stored in the task control block for the task. */
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198 return pxTopOfStack;
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200 /*-----------------------------------------------------------*/
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202 portBASE_TYPE xPortStartScheduler( void )
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204 /* Setup the hardware to generate the tick. Interrupts are disabled when
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205 this function is called. */
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206 prvSetupTimerInterrupt();
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208 /* Restore the context of the first task that is going to run. */
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211 /* Should not get here as the tasks are now running! */
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214 /*-----------------------------------------------------------*/
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216 void vPortEndScheduler( void )
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218 /* It is unlikely that the 78K0R port will get stopped. If required simply
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219 disable the tick interrupt here. */
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221 /*-----------------------------------------------------------*/
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223 static void prvSetupTimerInterrupt( void )
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225 /* Setup channel 5 of the TAU to generate the tick interrupt. */
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227 /* First the Timer Array Unit has to be enabled. */
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230 /* To configure the Timer Array Unit all Channels have to first be stopped. */
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233 /* Interrupt of Timer Array Unit Channel 5 is disabled to set the interrupt
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237 /* Clear Timer Array Unit Channel 5 interrupt flag. */
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240 /* Set Timer Array Unit Channel 5 interrupt priority */
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244 /* Set Timer Array Unit Channel 5 Mode as interval timer. */
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247 /* Set the compare match value according to the tick rate we want. */
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248 TDR05 = ( portTickType ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
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250 /* Set Timer Array Unit Channel 5 output mode */
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253 /* Set Timer Array Unit Channel 5 output level */
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256 /* Set Timer Array Unit Channel 5 output enable */
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259 /* Interrupt of Timer Array Unit Channel 5 enabled */
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262 /* Start Timer Array Unit Channel 5.*/
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265 /*-----------------------------------------------------------*/
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