2 * FreeRTOS Kernel V10.1.0
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3 * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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29 #include <intrinsics.h>
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31 /* Scheduler includes. */
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32 #include "FreeRTOS.h"
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35 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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36 /* Check the configuration. */
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37 #if( configMAX_PRIORITIES > 32 )
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38 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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40 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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42 #ifndef configSETUP_TICK_INTERRUPT
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43 #error configSETUP_TICK_INTERRUPT() must be defined in FreeRTOSConfig.h to call the function that sets up the tick interrupt. A default that uses the PIT is provided in the official demo application.
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46 #ifndef configCLEAR_TICK_INTERRUPT
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47 #error configCLEAR_TICK_INTERRUPT must be defined in FreeRTOSConfig.h to clear which ever interrupt was used to generate the tick interrupt. A default that uses the PIT is provided in the official demo application.
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50 /* A critical section is exited when the critical section nesting count reaches
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52 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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54 /* Tasks are not created with a floating point context, but can be given a
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55 floating point context after they have been created. A variable is stored as
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56 part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
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57 does not have an FPU context, or any other value if the task does have an FPU
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59 #define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )
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61 /* Constants required to setup the initial task context. */
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62 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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63 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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64 #define portTHUMB_MODE_ADDRESS ( 0x01UL )
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66 /* Masks all bits in the APSR other than the mode bits. */
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67 #define portAPSR_MODE_BITS_MASK ( 0x1F )
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69 /* The value of the mode bits in the APSR when the CPU is executing in user
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71 #define portAPSR_USER_MODE ( 0x10 )
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73 /*-----------------------------------------------------------*/
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76 * Starts the first task executing. This function is necessarily written in
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77 * assembly code so is implemented in portASM.s.
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79 extern void vPortRestoreTaskContext( void );
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82 * Used to catch tasks that attempt to return from their implementing function.
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84 static void prvTaskExitError( void );
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86 /*-----------------------------------------------------------*/
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88 /* A variable is used to keep track of the critical section nesting. This
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89 variable has to be stored as part of the task context and must be initialised to
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90 a non zero value to ensure interrupts don't inadvertently become unmasked before
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91 the scheduler starts. As it is stored as part of the task context it will
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92 automatically be set to 0 when the first task is started. */
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93 volatile uint32_t ulCriticalNesting = 9999UL;
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95 /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero
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96 then a floating point context must be saved and restored for the task. */
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97 uint32_t ulPortTaskHasFPUContext = pdFALSE;
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99 /* Set to 1 to pend a context switch from an ISR. */
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100 uint32_t ulPortYieldRequired = pdFALSE;
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102 /* Counts the interrupt nesting depth. A context switch is only performed if
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103 if the nesting depth is 0. */
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104 uint32_t ulPortInterruptNesting = 0UL;
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107 /*-----------------------------------------------------------*/
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110 * See header file for description.
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112 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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114 /* Setup the initial stack of the task. The stack is set exactly as
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115 expected by the portRESTORE_CONTEXT() macro.
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117 The fist real value on the stack is the status register, which is set for
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118 system mode, with interrupts enabled. A few NULLs are added first to ensure
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119 GDB does not try decoding a non-existent return address. */
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120 *pxTopOfStack = NULL;
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122 *pxTopOfStack = NULL;
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124 *pxTopOfStack = NULL;
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126 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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128 if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
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130 /* The task will start in THUMB mode. */
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131 *pxTopOfStack |= portTHUMB_MODE_BIT;
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136 /* Next the return address, which in this case is the start of the task. */
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137 *pxTopOfStack = ( StackType_t ) pxCode;
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140 /* Next all the registers other than the stack pointer. */
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141 *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* R14 */
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143 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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145 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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147 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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149 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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151 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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153 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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155 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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157 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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159 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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161 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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163 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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165 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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167 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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170 /* The task will start with a critical nesting count of 0 as interrupts are
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172 *pxTopOfStack = portNO_CRITICAL_NESTING;
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175 /* The task will start without a floating point context. A task that uses
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176 the floating point hardware must call vPortTaskUsesFPU() before executing
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177 any floating point instructions. */
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178 *pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
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180 return pxTopOfStack;
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182 /*-----------------------------------------------------------*/
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184 static void prvTaskExitError( void )
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186 /* A function that implements a task must not exit or attempt to return to
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187 its caller as there is nothing to return to. If a task wants to exit it
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188 should instead call vTaskDelete( NULL ).
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190 Artificially force an assert() to be triggered if configASSERT() is
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191 defined, then stop here so application writers can catch the error. */
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192 configASSERT( ulPortInterruptNesting == ~0UL );
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193 portDISABLE_INTERRUPTS();
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196 /*-----------------------------------------------------------*/
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198 BaseType_t xPortStartScheduler( void )
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202 /* Only continue if the CPU is not in User mode. The CPU must be in a
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203 Privileged mode for the scheduler to start. */
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204 __asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) );
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205 ulAPSR &= portAPSR_MODE_BITS_MASK;
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206 configASSERT( ulAPSR != portAPSR_USER_MODE );
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208 if( ulAPSR != portAPSR_USER_MODE )
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210 /* Start the timer that generates the tick ISR. */
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211 configSETUP_TICK_INTERRUPT();
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212 vPortRestoreTaskContext();
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215 /* Will only get here if vTaskStartScheduler() was called with the CPU in
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216 a non-privileged mode or the binary point register was not set to its lowest
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220 /*-----------------------------------------------------------*/
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222 void vPortEndScheduler( void )
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224 /* Not implemented in ports where there is nothing to return to.
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225 Artificially force an assert. */
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226 configASSERT( ulCriticalNesting == 1000UL );
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228 /*-----------------------------------------------------------*/
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230 void vPortEnterCritical( void )
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232 portDISABLE_INTERRUPTS();
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234 /* Now interrupts are disabled ulCriticalNesting can be accessed
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235 directly. Increment ulCriticalNesting to keep a count of how many times
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236 portENTER_CRITICAL() has been called. */
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237 ulCriticalNesting++;
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239 /* This is not the interrupt safe version of the enter critical function so
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240 assert() if it is being called from an interrupt context. Only API
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241 functions that end in "FromISR" can be used in an interrupt. Only assert if
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242 the critical nesting count is 1 to protect against recursive calls if the
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243 assert function also uses a critical section. */
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244 if( ulCriticalNesting == 1 )
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246 configASSERT( ulPortInterruptNesting == 0 );
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249 /*-----------------------------------------------------------*/
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251 void vPortExitCritical( void )
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253 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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255 /* Decrement the nesting count as the critical section is being
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257 ulCriticalNesting--;
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259 /* If the nesting level has reached zero then all interrupt
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260 priorities must be re-enabled. */
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261 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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263 /* Critical nesting has reached zero so all interrupt priorities
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264 should be unmasked. */
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265 portENABLE_INTERRUPTS();
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269 /*-----------------------------------------------------------*/
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271 void FreeRTOS_Tick_Handler( void )
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273 portDISABLE_INTERRUPTS();
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275 /* Increment the RTOS tick. */
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276 if( xTaskIncrementTick() != pdFALSE )
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278 ulPortYieldRequired = pdTRUE;
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281 portENABLE_INTERRUPTS();
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282 configCLEAR_TICK_INTERRUPT();
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284 /*-----------------------------------------------------------*/
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286 void vPortTaskUsesFPU( void )
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288 uint32_t ulInitialFPSCR = 0;
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290 /* A task is registering the fact that it needs an FPU context. Set the
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291 FPU flag (which is saved as part of the task context). */
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292 ulPortTaskHasFPUContext = pdTRUE;
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294 /* Initialise the floating point status register. */
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295 __asm( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );
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297 /*-----------------------------------------------------------*/
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