git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h

   1 /*\r
   2  * FreeRTOS Kernel V10.2.0\r
   3  * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   6  * this software and associated documentation files (the "Software"), to deal in\r
   7  * the Software without restriction, including without limitation the rights to\r
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
   9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  10  * subject to the following conditions:\r
  11  *\r
  12  * The above copyright notice and this permission notice shall be included in all\r
  13  * copies or substantial portions of the Software.\r
  14  *\r
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  21  *\r
  22  * http://www.FreeRTOS.org\r
  23  * http://aws.amazon.com/freertos\r
  24  *\r
  25  * 1 tab == 4 spaces!\r
  26  */\r
  27 \r
  28 #ifndef PORTMACRO_H\r
  29 #define PORTMACRO_H\r
  30 \r
  31 #ifdef __cplusplus\r
  32 extern "C" {\r
  33 #endif\r
  34 \r
  35 /*------------------------------------------------------------------------------\r
  36  * Port specific definitions.\r
  37  *\r
  38  * The settings in this file configure FreeRTOS correctly for the given hardware\r
  39  * and compiler.\r
  40  *\r
  41  * These settings should not be altered.\r
  42  *------------------------------------------------------------------------------\r
  43  */\r
  44 \r
  45 #ifndef configENABLE_FPU\r
  46         #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.\r
  47 #endif /* configENABLE_FPU */\r
  48 \r
  49 #ifndef configENABLE_MPU\r
  50         #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.\r
  51 #endif /* configENABLE_MPU */\r
  52 \r
  53 #ifndef configENABLE_TRUSTZONE\r
  54         #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.\r
  55 #endif /* configENABLE_TRUSTZONE */\r
  56 \r
  57 /*-----------------------------------------------------------*/\r
  58 \r
  59 /**\r
  60  * @brief Type definitions.\r
  61  */\r
  62 #define portCHAR                                                                                        char\r
  63 #define portFLOAT                                                                                       float\r
  64 #define portDOUBLE                                                                                      double\r
  65 #define portLONG                                                                                        long\r
  66 #define portSHORT                                                                                       short\r
  67 #define portSTACK_TYPE                                                                          uint32_t\r
  68 #define portBASE_TYPE                                                                           long\r
  69 \r
  70 typedef portSTACK_TYPE                                                                          StackType_t;\r
  71 typedef long                                                                                            BaseType_t;\r
  72 typedef unsigned long                                                                           UBaseType_t;\r
  73 \r
  74 #if( configUSE_16_BIT_TICKS == 1 )\r
  75         typedef uint16_t TickType_t;\r
  76         #define portMAX_DELAY ( TickType_t )                                    0xffff\r
  77 #else\r
  78         typedef uint32_t TickType_t;\r
  79         #define portMAX_DELAY ( TickType_t )                                    0xffffffffUL\r
  80 \r
  81         /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
  82          * not need to be guarded with a critical section. */\r
  83         #define portTICK_TYPE_IS_ATOMIC                                                 1\r
  84 #endif\r
  85 /*-----------------------------------------------------------*/\r
  86 \r
  87 /**\r
  88  * Architecture specifics.\r
  89  */\r
  90 #define portARCH_NAME                                                                           "Cortex-M33"\r
  91 #define portSTACK_GROWTH                                                                        ( -1 )\r
  92 #define portTICK_PERIOD_MS                                                                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
  93 #define portBYTE_ALIGNMENT                                                                      8\r
  94 #define portNOP()\r
  95 #define portINLINE                                                                                      __inline\r
  96 #ifndef portFORCE_INLINE\r
  97         #define portFORCE_INLINE                                                                inline __attribute__(( always_inline ))\r
  98 #endif\r
  99 #define portHAS_STACK_OVERFLOW_CHECKING                                         1\r
 100 /*-----------------------------------------------------------*/\r
 101 \r
 102 /**\r
 103  * @brief Extern declarations.\r
 104  */\r
 105 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 106 \r
 107 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 108 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 109 \r
 110 extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 111 extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 112 \r
 113 #if( configENABLE_TRUSTZONE == 1 )\r
 114         extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize );\r
 115         extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* PRIVILEGED_FUNCTION */;\r
 116 #endif /* configENABLE_TRUSTZONE */\r
 117 \r
 118 #if( configENABLE_MPU == 1 )\r
 119         extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;\r
 120         extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;\r
 121 #endif /* configENABLE_MPU */\r
 122 /*-----------------------------------------------------------*/\r
 123 \r
 124 /**\r
 125  * @brief MPU specific constants.\r
 126  */\r
 127 #if( configENABLE_MPU == 1 )\r
 128         #define portUSING_MPU_WRAPPERS                                                  1\r
 129         #define portPRIVILEGE_BIT                                                               ( 0x80000000UL )\r
 130 #else\r
 131         #define portPRIVILEGE_BIT                                                               ( 0x0UL )\r
 132 #endif /* configENABLE_MPU */\r
 133 \r
 134 \r
 135 /* MPU regions. */\r
 136 #define portPRIVILEGED_FLASH_REGION                                                     ( 0UL )\r
 137 #define portUNPRIVILEGED_FLASH_REGION                                           ( 1UL )\r
 138 #define portPRIVILEGED_RAM_REGION                                                       ( 2UL )\r
 139 #define portUNPRIVILEGED_DEVICE_REGION                                          ( 3UL )\r
 140 #define portSTACK_REGION                                                                        ( 4UL )\r
 141 #define portFIRST_CONFIGURABLE_REGION                                           ( 5UL )\r
 142 #define portLAST_CONFIGURABLE_REGION                                            ( 7UL )\r
 143 #define portNUM_CONFIGURABLE_REGIONS                                            ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )\r
 144 #define portTOTAL_NUM_REGIONS                                                           ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */\r
 145 \r
 146 /* Devices Region. */\r
 147 #define portDEVICE_REGION_START_ADDRESS                                         ( 0x50000000 )\r
 148 #define portDEVICE_REGION_END_ADDRESS                                           ( 0x5FFFFFFF )\r
 149 \r
 150 /* Device memory attributes used in MPU_MAIR registers.\r
 151  *\r
 152  * 8-bit values encoded as follows:\r
 153  *  Bit[7:4] - 0000 - Device Memory\r
 154  *  Bit[3:2] - 00 --> Device-nGnRnE\r
 155  *                              01 --> Device-nGnRE\r
 156  *                              10 --> Device-nGRE\r
 157  *                              11 --> Device-GRE\r
 158  *  Bit[1:0] - 00, Reserved.\r
 159  */\r
 160 #define portMPU_DEVICE_MEMORY_nGnRnE                                            ( 0x00 ) /* 0000 0000 */\r
 161 #define portMPU_DEVICE_MEMORY_nGnRE                                                     ( 0x04 ) /* 0000 0100 */\r
 162 #define portMPU_DEVICE_MEMORY_nGRE                                                      ( 0x08 ) /* 0000 1000 */\r
 163 #define portMPU_DEVICE_MEMORY_GRE                                                       ( 0x0C ) /* 0000 1100 */\r
 164 \r
 165 /* Normal memory attributes used in MPU_MAIR registers. */\r
 166 #define portMPU_NORMAL_MEMORY_NON_CACHEABLE                                     ( 0x44 ) /* Non-cacheable. */\r
 167 #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE                      ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */\r
 168 \r
 169 /* Attributes used in MPU_RBAR registers. */\r
 170 #define portMPU_REGION_NON_SHAREABLE                                            ( 0UL << 3UL )\r
 171 #define portMPU_REGION_INNER_SHAREABLE                                          ( 1UL << 3UL )\r
 172 #define portMPU_REGION_OUTER_SHAREABLE                                          ( 2UL << 3UL )\r
 173 \r
 174 #define portMPU_REGION_PRIVILEGED_READ_WRITE                            ( 0UL << 1UL )\r
 175 #define portMPU_REGION_READ_WRITE                                                       ( 1UL << 1UL )\r
 176 #define portMPU_REGION_PRIVILEGED_READ_ONLY                                     ( 2UL << 1UL )\r
 177 #define portMPU_REGION_READ_ONLY                                                        ( 3UL << 1UL )\r
 178 \r
 179 #define portMPU_REGION_EXECUTE_NEVER                                            ( 1UL )\r
 180 /*-----------------------------------------------------------*/\r
 181 \r
 182 /**\r
 183  * @brief Settings to define an MPU region.\r
 184  */\r
 185 typedef struct MPURegionSettings\r
 186 {\r
 187         uint32_t ulRBAR;        /**< RBAR for the region. */\r
 188         uint32_t ulRLAR;        /**< RLAR for the region. */\r
 189 } MPURegionSettings_t;\r
 190 \r
 191 /**\r
 192  * @brief MPU settings as stored in the TCB.\r
 193  */\r
 194 typedef struct MPU_SETTINGS\r
 195 {\r
 196         uint32_t ulMAIR0;       /**< MAIR0 for the task containing attributes for all the 4 per task regions. */\r
 197         MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */\r
 198 } xMPU_SETTINGS;\r
 199 /*-----------------------------------------------------------*/\r
 200 \r
 201 /**\r
 202  * @brief SVC numbers.\r
 203  */\r
 204 #define portSVC_ALLOCATE_SECURE_CONTEXT                                         0\r
 205 #define portSVC_FREE_SECURE_CONTEXT                                                     1\r
 206 #define portSVC_START_SCHEDULER                                                         2\r
 207 #define portSVC_RAISE_PRIVILEGE                                                         3\r
 208 /*-----------------------------------------------------------*/\r
 209 \r
 210 /**\r
 211  * @brief Scheduler utilities.\r
 212  */\r
 213 #define portYIELD()                                                                                     vPortYield()\r
 214 #define portNVIC_INT_CTRL_REG                                                           ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
 215 #define portNVIC_PENDSVSET_BIT                                                          ( 1UL << 28UL )\r
 216 #define portEND_SWITCHING_ISR( xSwitchRequired )                        if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
 217 #define portYIELD_FROM_ISR( x )                                                         portEND_SWITCHING_ISR( x )\r
 218 /*-----------------------------------------------------------*/\r
 219 \r
 220 /**\r
 221  * @brief Critical section management.\r
 222  */\r
 223 #define portSET_INTERRUPT_MASK_FROM_ISR()                                       ulSetInterruptMaskFromISR()\r
 224 #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                            vClearInterruptMaskFromISR( x )\r
 225 #define portDISABLE_INTERRUPTS()                                                        __asm volatile ( " cpsid i " ::: "memory" )\r
 226 #define portENABLE_INTERRUPTS()                                                         __asm volatile ( " cpsie i " ::: "memory" )\r
 227 #define portENTER_CRITICAL()                                                            vPortEnterCritical()\r
 228 #define portEXIT_CRITICAL()                                                                     vPortExitCritical()\r
 229 /*-----------------------------------------------------------*/\r
 230 \r
 231 /**\r
 232  * @brief Task function macros as described on the FreeRTOS.org WEB site.\r
 233  */\r
 234 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )      void vFunction( void *pvParameters )\r
 235 #define portTASK_FUNCTION( vFunction, pvParameters )            void vFunction( void *pvParameters )\r
 236 /*-----------------------------------------------------------*/\r
 237 \r
 238 #if( configENABLE_TRUSTZONE == 1 )\r
 239         /**\r
 240          * @brief Allocate a secure context for the task.\r
 241          *\r
 242          * Tasks are not created with a secure context. Any task that is going to call\r
 243          * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a\r
 244          * secure context before it calls any secure function.\r
 245          *\r
 246          * @param[in] ulSecureStackSize The size of the secure stack to be allocated.\r
 247          */\r
 248         #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )        vPortAllocateSecureContext( ulSecureStackSize )\r
 249 \r
 250         /**\r
 251          * @brief Called when a task is deleted to delete the task's secure context,\r
 252          * if it has one.\r
 253          *\r
 254          * @param[in] pxTCB The TCB of the task being deleted.\r
 255          */\r
 256         #define portCLEAN_UP_TCB( pxTCB )                                                       vPortFreeSecureContext( ( uint32_t * ) pxTCB )\r
 257 #else\r
 258         #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )\r
 259         #define portCLEAN_UP_TCB( pxTCB )\r
 260 #endif /* configENABLE_TRUSTZONE */\r
 261 /*-----------------------------------------------------------*/\r
 262 \r
 263 #if( configENABLE_MPU == 1 )\r
 264         /**\r
 265          * @brief Checks whether or not the processor is privileged.\r
 266          *\r
 267          * @return 1 if the processor is already privileged, 0 otherwise.\r
 268          */\r
 269         #define portIS_PRIVILEGED()                                                                     xIsPrivileged()\r
 270 \r
 271         /**\r
 272          * @brief Raise an SVC request to raise privilege.\r
 273          *\r
 274          * The SVC handler checks that the SVC was raised from a system call and only\r
 275          * then it raises the privilege. If this is called from any other place,\r
 276          * the privilege is not raised.\r
 277          */\r
 278         #define portRAISE_PRIVILEGE()                                                           __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );\r
 279 \r
 280         /**\r
 281          * @brief Lowers the privilege level by setting the bit 0 of the CONTROL\r
 282          * register.\r
 283          */\r
 284         #define portRESET_PRIVILEGE()                                                           vResetPrivilege()\r
 285 #else\r
 286         #define portIS_PRIVILEGED()\r
 287         #define portRAISE_PRIVILEGE()\r
 288         #define portRESET_PRIVILEGE()\r
 289 #endif /* configENABLE_MPU */\r
 290 /*-----------------------------------------------------------*/\r
 291 \r
 292 #ifdef __cplusplus\r
 293 }\r
 294 #endif\r
 295 \r
 296 #endif /* PORTMACRO_H */\r