2 * FreeRTOS Kernel V10.1.1
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3 * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
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30 *----------------------------------------------------------*/
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33 /* Standard includes. */
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36 /* Scheduler includes. */
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37 #include "FreeRTOS.h"
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40 /* Hardware includes. */
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42 #include <pio/pio.h>
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43 #include <pio/pio_it.h>
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44 #include <pit/pit.h>
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45 #include <aic/aic.h>
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47 #include <utility/led.h>
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48 #include <utility/trace.h>
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50 /*-----------------------------------------------------------*/
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52 /* Constants required to setup the initial stack. */
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53 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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54 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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55 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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57 /* Constants required to setup the PIT. */
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58 #define port1MHz_IN_Hz ( 1000000ul )
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59 #define port1SECOND_IN_uS ( 1000000.0 )
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61 /* Constants required to handle critical sections. */
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62 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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65 #define portINT_LEVEL_SENSITIVE 0
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66 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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67 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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68 /*-----------------------------------------------------------*/
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70 /* Setup the PIT to generate the tick interrupts. */
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71 static void prvSetupTimerInterrupt( void );
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73 /* The PIT interrupt handler - the RTOS tick. */
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74 static void vPortTickISR( void );
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76 /* ulCriticalNesting will get set to zero when the first task starts. It
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77 cannot be initialised to 0 as this will cause interrupts to be enabled
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78 during the kernel initialisation process. */
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79 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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81 /*-----------------------------------------------------------*/
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84 * Initialise the stack of a task to look exactly as if a call to
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85 * portSAVE_CONTEXT had been called.
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87 * See header file for description.
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89 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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91 StackType_t *pxOriginalTOS;
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93 pxOriginalTOS = pxTopOfStack;
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95 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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96 is not really required. */
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99 /* Setup the initial stack of the task. The stack is set exactly as
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100 expected by the portRESTORE_CONTEXT() macro. */
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102 /* First on the stack is the return address - which in this case is the
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103 start of the task. The offset is added to make the return address appear
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104 as it would within an IRQ ISR. */
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105 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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108 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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110 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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112 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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114 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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116 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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118 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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120 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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122 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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124 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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126 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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128 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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130 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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132 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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134 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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137 /* When the task starts is will expect to find the function parameter in
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139 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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142 /* The status register is set for system mode, with interrupts enabled. */
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143 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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145 #ifdef THUMB_INTERWORK
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147 /* We want the task to start in thumb mode. */
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148 *pxTopOfStack |= portTHUMB_MODE_BIT;
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154 /* Interrupt flags cannot always be stored on the stack and will
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155 instead be stored in a variable, which is then saved as part of the
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157 *pxTopOfStack = portNO_CRITICAL_NESTING;
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159 return pxTopOfStack;
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161 /*-----------------------------------------------------------*/
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163 BaseType_t xPortStartScheduler( void )
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165 extern void vPortStartFirstTask( void );
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167 /* Start the timer that generates the tick ISR. Interrupts are disabled
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169 prvSetupTimerInterrupt();
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171 /* Start the first task. */
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172 vPortStartFirstTask();
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174 /* Should not get here! */
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177 /*-----------------------------------------------------------*/
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179 void vPortEndScheduler( void )
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181 /* It is unlikely that the ARM port will require this function as there
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182 is nothing to return to. */
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184 /*-----------------------------------------------------------*/
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186 static __arm void vPortTickISR( void )
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188 volatile uint32_t ulDummy;
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190 /* Increment the tick count - which may wake some tasks but as the
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191 preemptive scheduler is not being used any woken task is not given
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192 processor time no matter what its priority. */
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193 if( xTaskIncrementTick() != pdFALSE )
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195 vTaskSwitchContext();
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198 /* Clear the PIT interrupt. */
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199 ulDummy = AT91C_BASE_PITC->PITC_PIVR;
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201 /* To remove compiler warning. */
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204 /* The AIC is cleared in the asm wrapper, outside of this function. */
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206 /*-----------------------------------------------------------*/
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208 static void prvSetupTimerInterrupt( void )
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210 const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
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212 /* Setup the PIT for the required frequency. */
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213 PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
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215 /* Setup the PIT interrupt. */
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216 AIC_DisableIT( AT91C_ID_SYS );
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217 AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
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218 AIC_EnableIT( AT91C_ID_SYS );
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221 /*-----------------------------------------------------------*/
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223 void vPortEnterCritical( void )
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225 /* Disable interrupts first! */
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228 /* Now interrupts are disabled ulCriticalNesting can be accessed
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229 directly. Increment ulCriticalNesting to keep a count of how many times
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230 portENTER_CRITICAL() has been called. */
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231 ulCriticalNesting++;
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233 /*-----------------------------------------------------------*/
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235 void vPortExitCritical( void )
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237 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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239 /* Decrement the nesting count as we are leaving a critical section. */
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240 ulCriticalNesting--;
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242 /* If the nesting level has reached zero then interrupts should be
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244 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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250 /*-----------------------------------------------------------*/
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