2 FreeRTOS V7.5.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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6 ***************************************************************************
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8 * FreeRTOS provides completely free yet professionally developed, *
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9 * robust, strictly quality controlled, supported, and cross *
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10 * platform software that has become a de facto standard. *
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12 * Help yourself get started quickly and support the FreeRTOS *
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13 * project by purchasing a FreeRTOS tutorial book, reference *
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14 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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18 ***************************************************************************
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20 This file is part of the FreeRTOS distribution.
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22 FreeRTOS is free software; you can redistribute it and/or modify it under
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23 the terms of the GNU General Public License (version 2) as published by the
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24 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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26 >>! NOTE: The modification to the GPL is included to allow you to distribute
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27 >>! a combined work that includes FreeRTOS without being obliged to provide
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28 >>! the source code for proprietary components outside of the FreeRTOS
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31 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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32 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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33 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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34 link: http://www.freertos.org/a00114.html
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38 ***************************************************************************
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40 * Having a problem? Start by reading the FAQ "My application does *
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41 * not run, what could be wrong?" *
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43 * http://www.FreeRTOS.org/FAQHelp.html *
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45 ***************************************************************************
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47 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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48 license and Real Time Engineers Ltd. contact details.
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50 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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51 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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52 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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54 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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55 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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56 licenses offer ticketed support, indemnification and middleware.
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58 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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59 engineered and independently SIL3 certified version for use in safety and
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60 mission critical applications that require provable dependability.
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65 /*-----------------------------------------------------------
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66 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
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67 *----------------------------------------------------------*/
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70 /* Standard includes. */
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73 /* Scheduler includes. */
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74 #include "FreeRTOS.h"
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77 /* Hardware includes. */
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79 #include <pio/pio.h>
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80 #include <pio/pio_it.h>
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81 #include <pit/pit.h>
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82 #include <aic/aic.h>
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84 #include <utility/led.h>
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85 #include <utility/trace.h>
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87 /*-----------------------------------------------------------*/
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89 /* Constants required to setup the initial stack. */
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90 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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91 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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92 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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94 /* Constants required to setup the PIT. */
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95 #define port1MHz_IN_Hz ( 1000000ul )
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96 #define port1SECOND_IN_uS ( 1000000.0 )
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98 /* Constants required to handle critical sections. */
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99 #define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
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102 #define portINT_LEVEL_SENSITIVE 0
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103 #define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 )
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104 #define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 )
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105 /*-----------------------------------------------------------*/
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107 /* Setup the PIT to generate the tick interrupts. */
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108 static void prvSetupTimerInterrupt( void );
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110 /* The PIT interrupt handler - the RTOS tick. */
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111 static void vPortTickISR( void );
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113 /* ulCriticalNesting will get set to zero when the first task starts. It
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114 cannot be initialised to 0 as this will cause interrupts to be enabled
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115 during the kernel initialisation process. */
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116 unsigned long ulCriticalNesting = ( unsigned long ) 9999;
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118 /*-----------------------------------------------------------*/
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121 * Initialise the stack of a task to look exactly as if a call to
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122 * portSAVE_CONTEXT had been called.
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124 * See header file for description.
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126 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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128 portSTACK_TYPE *pxOriginalTOS;
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130 pxOriginalTOS = pxTopOfStack;
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132 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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133 is not really required. */
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136 /* Setup the initial stack of the task. The stack is set exactly as
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137 expected by the portRESTORE_CONTEXT() macro. */
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139 /* First on the stack is the return address - which in this case is the
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140 start of the task. The offset is added to make the return address appear
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141 as it would within an IRQ ISR. */
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142 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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145 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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147 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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149 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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151 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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153 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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155 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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157 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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159 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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161 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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163 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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165 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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167 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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169 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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171 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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174 /* When the task starts is will expect to find the function parameter in
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176 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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179 /* The status register is set for system mode, with interrupts enabled. */
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180 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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182 #ifdef THUMB_INTERWORK
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184 /* We want the task to start in thumb mode. */
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185 *pxTopOfStack |= portTHUMB_MODE_BIT;
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191 /* Interrupt flags cannot always be stored on the stack and will
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192 instead be stored in a variable, which is then saved as part of the
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194 *pxTopOfStack = portNO_CRITICAL_NESTING;
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196 return pxTopOfStack;
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198 /*-----------------------------------------------------------*/
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200 portBASE_TYPE xPortStartScheduler( void )
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202 extern void vPortStartFirstTask( void );
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204 /* Start the timer that generates the tick ISR. Interrupts are disabled
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206 prvSetupTimerInterrupt();
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208 /* Start the first task. */
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209 vPortStartFirstTask();
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211 /* Should not get here! */
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214 /*-----------------------------------------------------------*/
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216 void vPortEndScheduler( void )
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218 /* It is unlikely that the ARM port will require this function as there
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219 is nothing to return to. */
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221 /*-----------------------------------------------------------*/
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223 static __arm void vPortTickISR( void )
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225 volatile unsigned long ulDummy;
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227 /* Increment the tick count - which may wake some tasks but as the
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228 preemptive scheduler is not being used any woken task is not given
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229 processor time no matter what its priority. */
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230 if( xTaskIncrementTick() != pdFALSE )
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232 vTaskSwitchContext();
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235 /* Clear the PIT interrupt. */
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236 ulDummy = AT91C_BASE_PITC->PITC_PIVR;
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238 /* To remove compiler warning. */
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241 /* The AIC is cleared in the asm wrapper, outside of this function. */
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243 /*-----------------------------------------------------------*/
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245 static void prvSetupTimerInterrupt( void )
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247 const unsigned long ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
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249 /* Setup the PIT for the required frequency. */
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250 PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
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252 /* Setup the PIT interrupt. */
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253 AIC_DisableIT( AT91C_ID_SYS );
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254 AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
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255 AIC_EnableIT( AT91C_ID_SYS );
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258 /*-----------------------------------------------------------*/
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260 void vPortEnterCritical( void )
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262 /* Disable interrupts first! */
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265 /* Now interrupts are disabled ulCriticalNesting can be accessed
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266 directly. Increment ulCriticalNesting to keep a count of how many times
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267 portENTER_CRITICAL() has been called. */
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268 ulCriticalNesting++;
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270 /*-----------------------------------------------------------*/
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272 void vPortExitCritical( void )
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274 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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276 /* Decrement the nesting count as we are leaving a critical section. */
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277 ulCriticalNesting--;
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279 /* If the nesting level has reached zero then interrupts should be
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281 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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287 /*-----------------------------------------------------------*/
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