2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 >>! NOTE: The modification to the GPL is included to allow you to !<<
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14 >>! distribute a combined work that includes FreeRTOS without being !<<
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15 >>! obliged to provide the source code for proprietary components !<<
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16 >>! outside of the FreeRTOS kernel. !<<
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18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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21 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * Having a problem? Start by reading the FAQ "My application does *
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28 * not run, what could be wrong?". Have you defined configASSERT()? *
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30 * http://www.FreeRTOS.org/FAQHelp.html *
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32 ***************************************************************************
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34 ***************************************************************************
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36 * FreeRTOS provides completely free yet professionally developed, *
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37 * robust, strictly quality controlled, supported, and cross *
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38 * platform software that is more than just the market leader, it *
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39 * is the industry's de facto standard. *
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41 * Help yourself get started quickly while simultaneously helping *
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42 * to support the FreeRTOS project by purchasing a FreeRTOS *
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43 * tutorial book, reference manual, or both: *
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44 * http://www.FreeRTOS.org/Documentation *
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46 ***************************************************************************
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48 ***************************************************************************
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50 * Investing in training allows your team to be as productive as *
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51 * possible as early as possible, lowering your overall development *
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52 * cost, and enabling you to bring a more robust product to market *
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53 * earlier than would otherwise be possible. Richard Barry is both *
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54 * the architect and key author of FreeRTOS, and so also the world's *
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55 * leading authority on what is the world's most popular real time *
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56 * kernel for deeply embedded MCU designs. Obtaining your training *
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57 * from Richard ensures your team will gain directly from his in-depth *
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58 * product knowledge and years of usage experience. Contact Real Time *
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59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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60 * by Richard Barry: http://www.FreeRTOS.org/contact
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62 ***************************************************************************
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64 ***************************************************************************
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66 * You are receiving this top quality software for free. Please play *
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67 * fair and reciprocate by reporting any suspected issues and *
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68 * participating in the community forum: *
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69 * http://www.FreeRTOS.org/support *
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73 ***************************************************************************
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75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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76 license and Real Time Engineers Ltd. contact details.
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78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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87 licenses offer ticketed support, indemnification and commercial middleware.
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89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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90 engineered and independently SIL3 certified version for use in safety and
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91 mission critical applications that require provable dependability.
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96 /*-----------------------------------------------------------
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97 * Implementation of functions defined in portable.h for the Philips ARM7 port.
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98 *----------------------------------------------------------*/
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101 Changes from V3.2.2
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103 + Bug fix - The prescale value for the timer setup is now written to T0PR
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104 instead of T0PC. This bug would have had no effect unless a prescale
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105 value was actually used.
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108 /* Standard includes. */
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109 #include <stdlib.h>
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110 #include <intrinsics.h>
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112 /* Scheduler includes. */
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113 #include "FreeRTOS.h"
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116 /* Constants required to setup the tick ISR. */
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117 #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
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118 #define portPRESCALE_VALUE 0x00
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119 #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
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120 #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
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122 /* Constants required to setup the initial stack. */
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123 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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124 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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125 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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127 /* Constants required to setup the PIT. */
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128 #define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
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129 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
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131 /* Constants required to handle interrupts. */
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132 #define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
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133 #define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
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135 /* Constants required to handle critical sections. */
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136 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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139 #define portINT_LEVEL_SENSITIVE 0
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140 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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141 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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143 /* Constants required to setup the VIC for the tick ISR. */
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144 #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
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145 #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
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146 #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
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148 /*-----------------------------------------------------------*/
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150 /* Setup the PIT to generate the tick interrupts. */
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151 static void prvSetupTimerInterrupt( void );
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153 /* ulCriticalNesting will get set to zero when the first task starts. It
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154 cannot be initialised to 0 as this will cause interrupts to be enabled
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155 during the kernel initialisation process. */
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156 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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158 /*-----------------------------------------------------------*/
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161 * Initialise the stack of a task to look exactly as if a call to
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162 * portSAVE_CONTEXT had been called.
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164 * See header file for description.
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166 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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168 StackType_t *pxOriginalTOS;
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170 pxOriginalTOS = pxTopOfStack;
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172 /* Setup the initial stack of the task. The stack is set exactly as
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173 expected by the portRESTORE_CONTEXT() macro. */
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175 /* First on the stack is the return address - which in this case is the
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176 start of the task. The offset is added to make the return address appear
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177 as it would within an IRQ ISR. */
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178 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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181 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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183 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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185 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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187 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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189 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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191 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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193 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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195 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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197 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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199 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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201 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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203 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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205 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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207 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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210 /* When the task starts is will expect to find the function parameter in
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212 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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215 /* The status register is set for system mode, with interrupts enabled. */
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216 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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218 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
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220 /* We want the task to start in thumb mode. */
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221 *pxTopOfStack |= portTHUMB_MODE_BIT;
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226 /* Interrupt flags cannot always be stored on the stack and will
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227 instead be stored in a variable, which is then saved as part of the
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229 *pxTopOfStack = portNO_CRITICAL_NESTING;
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231 return pxTopOfStack;
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233 /*-----------------------------------------------------------*/
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235 BaseType_t xPortStartScheduler( void )
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237 extern void vPortStartFirstTask( void );
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239 /* Start the timer that generates the tick ISR. Interrupts are disabled
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241 prvSetupTimerInterrupt();
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243 /* Start the first task. */
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244 vPortStartFirstTask();
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246 /* Should not get here! */
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249 /*-----------------------------------------------------------*/
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251 void vPortEndScheduler( void )
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253 /* It is unlikely that the ARM port will require this function as there
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254 is nothing to return to. */
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256 /*-----------------------------------------------------------*/
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258 #if configUSE_PREEMPTION == 0
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260 /* The cooperative scheduler requires a normal IRQ service routine to
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261 simply increment the system tick. */
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262 static __arm __irq void vPortNonPreemptiveTick( void );
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263 static __arm __irq void vPortNonPreemptiveTick( void )
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265 /* Increment the tick count - which may wake some tasks but as the
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266 preemptive scheduler is not being used any woken task is not given
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267 processor time no matter what its priority. */
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268 xTaskIncrementTick();
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270 /* Ready for the next interrupt. */
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271 T0IR = portTIMER_MATCH_ISR_BIT;
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272 VICVectAddr = portCLEAR_VIC_INTERRUPT;
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277 /* This function is called from an asm wrapper, so does not require the __irq
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279 void vPortPreemptiveTick( void );
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280 void vPortPreemptiveTick( void )
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282 /* Increment the tick counter. */
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283 if( xTaskIncrementTick() != pdFALSE )
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285 /* The new tick value might unblock a task. Ensure the highest task that
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286 is ready to execute is the task that will execute when the tick ISR
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288 vTaskSwitchContext();
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291 /* Ready for the next interrupt. */
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292 T0IR = portTIMER_MATCH_ISR_BIT;
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293 VICVectAddr = portCLEAR_VIC_INTERRUPT;
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298 /*-----------------------------------------------------------*/
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300 static void prvSetupTimerInterrupt( void )
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302 uint32_t ulCompareMatch;
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304 /* A 1ms tick does not require the use of the timer prescale. This is
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305 defaulted to zero but can be used if necessary. */
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306 T0PR = portPRESCALE_VALUE;
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308 /* Calculate the match value required for our wanted tick rate. */
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309 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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311 /* Protect against divide by zero. Using an if() statement still results
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312 in a warning - hence the #if. */
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313 #if portPRESCALE_VALUE != 0
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315 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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319 T0MR0 = ulCompareMatch;
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321 /* Generate tick with timer 0 compare match. */
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322 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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324 /* Setup the VIC for the timer. */
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325 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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326 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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328 /* The ISR installed depends on whether the preemptive or cooperative
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329 scheduler is being used. */
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330 #if configUSE_PREEMPTION == 1
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332 extern void ( vPortPreemptiveTickEntry )( void );
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334 VICVectAddr0 = ( uint32_t ) vPortPreemptiveTickEntry;
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338 extern void ( vNonPreemptiveTick )( void );
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340 VICVectAddr0 = ( int32_t ) vPortNonPreemptiveTick;
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344 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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346 /* Start the timer - interrupts are disabled when this function is called
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347 so it is okay to do this here. */
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348 T0TCR = portENABLE_TIMER;
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350 /*-----------------------------------------------------------*/
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352 void vPortEnterCritical( void )
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354 /* Disable interrupts first! */
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355 __disable_interrupt();
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357 /* Now interrupts are disabled ulCriticalNesting can be accessed
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358 directly. Increment ulCriticalNesting to keep a count of how many times
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359 portENTER_CRITICAL() has been called. */
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360 ulCriticalNesting++;
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362 /*-----------------------------------------------------------*/
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364 void vPortExitCritical( void )
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366 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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368 /* Decrement the nesting count as we are leaving a critical section. */
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369 ulCriticalNesting--;
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371 /* If the nesting level has reached zero then interrupts should be
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373 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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375 __enable_interrupt();
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379 /*-----------------------------------------------------------*/
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