2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 >>! NOTE: The modification to the GPL is included to allow you to !<<
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14 >>! distribute a combined work that includes FreeRTOS without being !<<
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15 >>! obliged to provide the source code for proprietary components !<<
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16 >>! outside of the FreeRTOS kernel. !<<
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18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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21 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * Having a problem? Start by reading the FAQ "My application does *
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28 * not run, what could be wrong?". Have you defined configASSERT()? *
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30 * http://www.FreeRTOS.org/FAQHelp.html *
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32 ***************************************************************************
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34 ***************************************************************************
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36 * FreeRTOS provides completely free yet professionally developed, *
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37 * robust, strictly quality controlled, supported, and cross *
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38 * platform software that is more than just the market leader, it *
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39 * is the industry's de facto standard. *
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41 * Help yourself get started quickly while simultaneously helping *
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42 * to support the FreeRTOS project by purchasing a FreeRTOS *
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43 * tutorial book, reference manual, or both: *
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44 * http://www.FreeRTOS.org/Documentation *
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46 ***************************************************************************
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48 ***************************************************************************
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50 * Investing in training allows your team to be as productive as *
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51 * possible as early as possible, lowering your overall development *
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52 * cost, and enabling you to bring a more robust product to market *
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53 * earlier than would otherwise be possible. Richard Barry is both *
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54 * the architect and key author of FreeRTOS, and so also the world's *
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55 * leading authority on what is the world's most popular real time *
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56 * kernel for deeply embedded MCU designs. Obtaining your training *
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57 * from Richard ensures your team will gain directly from his in-depth *
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58 * product knowledge and years of usage experience. Contact Real Time *
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59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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60 * by Richard Barry: http://www.FreeRTOS.org/contact
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62 ***************************************************************************
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64 ***************************************************************************
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66 * You are receiving this top quality software for free. Please play *
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67 * fair and reciprocate by reporting any suspected issues and *
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68 * participating in the community forum: *
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69 * http://www.FreeRTOS.org/support *
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73 ***************************************************************************
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75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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76 license and Real Time Engineers Ltd. contact details.
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78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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87 licenses offer ticketed support, indemnification and commercial middleware.
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89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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90 engineered and independently SIL3 certified version for use in safety and
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91 mission critical applications that require provable dependability.
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96 /*-----------------------------------------------------------
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97 * Implementation of functions defined in portable.h for the ST STR75x ARM7
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99 *----------------------------------------------------------*/
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101 /* Library includes. */
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102 #include "75x_tb.h"
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103 #include "75x_eic.h"
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105 /* Scheduler includes. */
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106 #include "FreeRTOS.h"
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109 /* Constants required to setup the initial stack. */
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110 #define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
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111 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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113 /* Constants required to handle critical sections. */
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114 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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116 /* Prescale used on the timer clock when calculating the tick period. */
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117 #define portPRESCALE 20
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120 /*-----------------------------------------------------------*/
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122 /* Setup the TB to generate the tick interrupts. */
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123 static void prvSetupTimerInterrupt( void );
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125 /* ulCriticalNesting will get set to zero when the first task starts. It
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126 cannot be initialised to 0 as this will cause interrupts to be enabled
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127 during the kernel initialisation process. */
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128 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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130 /* Tick interrupt routines for preemptive operation. */
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131 __arm void vPortPreemptiveTick( void );
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133 /*-----------------------------------------------------------*/
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136 * Initialise the stack of a task to look exactly as if a call to
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137 * portSAVE_CONTEXT had been called.
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139 * See header file for description.
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141 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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143 StackType_t *pxOriginalTOS;
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145 pxOriginalTOS = pxTopOfStack;
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147 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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148 is not really required. */
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151 /* Setup the initial stack of the task. The stack is set exactly as
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152 expected by the portRESTORE_CONTEXT() macro. */
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154 /* First on the stack is the return address - which in this case is the
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155 start of the task. The offset is added to make the return address appear
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156 as it would within an IRQ ISR. */
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157 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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160 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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162 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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164 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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166 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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168 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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170 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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172 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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174 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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176 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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178 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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180 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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182 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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184 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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186 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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189 /* When the task starts is will expect to find the function parameter in
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191 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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194 /* The status register is set for system mode, with interrupts enabled. */
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195 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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198 /* Interrupt flags cannot always be stored on the stack and will
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199 instead be stored in a variable, which is then saved as part of the
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201 *pxTopOfStack = portNO_CRITICAL_NESTING;
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203 return pxTopOfStack;
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205 /*-----------------------------------------------------------*/
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207 BaseType_t xPortStartScheduler( void )
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209 extern void vPortStartFirstTask( void );
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211 /* Start the timer that generates the tick ISR. Interrupts are disabled
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213 prvSetupTimerInterrupt();
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215 /* Start the first task. */
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216 vPortStartFirstTask();
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218 /* Should not get here! */
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221 /*-----------------------------------------------------------*/
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223 void vPortEndScheduler( void )
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225 /* It is unlikely that the ARM port will require this function as there
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226 is nothing to return to. */
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228 /*-----------------------------------------------------------*/
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230 __arm void vPortPreemptiveTick( void )
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232 /* Increment the tick counter. */
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233 if( xTaskIncrementTick() != pdFALSE )
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235 /* Select a new task to execute. */
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236 vTaskSwitchContext();
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239 TB_ClearITPendingBit( TB_IT_Update );
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241 /*-----------------------------------------------------------*/
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243 static void prvSetupTimerInterrupt( void )
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245 EIC_IRQInitTypeDef EIC_IRQInitStructure;
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246 TB_InitTypeDef TB_InitStructure;
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248 /* Setup the EIC for the TB. */
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249 EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
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250 EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
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251 EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
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252 EIC_IRQInit(&EIC_IRQInitStructure);
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254 /* Setup the TB for the generation of the tick interrupt. */
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255 TB_InitStructure.TB_Mode = TB_Mode_Timing;
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256 TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
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257 TB_InitStructure.TB_Prescaler = portPRESCALE - 1;
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258 TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ );
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259 TB_Init(&TB_InitStructure);
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261 /* Enable TB Update interrupt */
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262 TB_ITConfig(TB_IT_Update, ENABLE);
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264 /* Clear TB Update interrupt pending bit */
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265 TB_ClearITPendingBit(TB_IT_Update);
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270 /*-----------------------------------------------------------*/
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272 __arm __interwork void vPortEnterCritical( void )
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274 /* Disable interrupts first! */
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275 __disable_interrupt();
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277 /* Now interrupts are disabled ulCriticalNesting can be accessed
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278 directly. Increment ulCriticalNesting to keep a count of how many times
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279 portENTER_CRITICAL() has been called. */
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280 ulCriticalNesting++;
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282 /*-----------------------------------------------------------*/
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284 __arm __interwork void vPortExitCritical( void )
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286 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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288 /* Decrement the nesting count as we are leaving a critical section. */
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289 ulCriticalNesting--;
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291 /* If the nesting level has reached zero then interrupts should be
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293 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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295 __enable_interrupt();
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299 /*-----------------------------------------------------------*/
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