]> git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/IAR/V850ES/port.c
021d138013d6d5ce76731e489b37286eeebec395
[freertos] / FreeRTOS / Source / portable / IAR / V850ES / port.c
1 /*\r
2     FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd. \r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS provides completely free yet professionally developed,    *\r
10      *    robust, strictly quality controlled, supported, and cross          *\r
11      *    platform software that has become a de facto standard.             *\r
12      *                                                                       *\r
13      *    Help yourself get started quickly and support the FreeRTOS         *\r
14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
16      *                                                                       *\r
17      *    Thank you!                                                         *\r
18      *                                                                       *\r
19     ***************************************************************************\r
20 \r
21     This file is part of the FreeRTOS distribution.\r
22 \r
23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
24     the terms of the GNU General Public License (version 2) as published by the\r
25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
26 \r
27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
28     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
29     >>!   obliged to provide the source code for proprietary components     !<<\r
30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
31 \r
32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
35     link: http://www.freertos.org/a00114.html\r
36 \r
37     1 tab == 4 spaces!\r
38 \r
39     ***************************************************************************\r
40      *                                                                       *\r
41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
42      *    not run, what could be wrong?"                                     *\r
43      *                                                                       *\r
44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
45      *                                                                       *\r
46     ***************************************************************************\r
47 \r
48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
49     license and Real Time Engineers Ltd. contact details.\r
50 \r
51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
54 \r
55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
57     licenses offer ticketed support, indemnification and middleware.\r
58 \r
59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
60     engineered and independently SIL3 certified version for use in safety and\r
61     mission critical applications that require provable dependability.\r
62 \r
63     1 tab == 4 spaces!\r
64 */\r
65 \r
66 /* Standard includes. */\r
67 #include <stdlib.h>\r
68 \r
69 /* Scheduler includes. */\r
70 #include "FreeRTOS.h"\r
71 #include "task.h"\r
72 \r
73 /* Critical nesting should be initialised to a non zero value so interrupts don't\r
74 accidentally get enabled before the scheduler is started. */\r
75 #define portINITIAL_CRITICAL_NESTING  (( StackType_t ) 10)\r
76 \r
77 /* The PSW value assigned to tasks when they start to run for the first time. */\r
78 #define portPSW           (( StackType_t ) 0x00000000)\r
79 \r
80 /* We require the address of the pxCurrentTCB variable, but don't want to know\r
81 any details of its type. */\r
82 typedef void TCB_t;\r
83 extern volatile TCB_t * volatile pxCurrentTCB;\r
84 \r
85 /* Keeps track of the nesting level of critical sections. */\r
86 volatile StackType_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
87 /*-----------------------------------------------------------*/\r
88 \r
89 /* Sets up the timer to generate the tick interrupt. */\r
90 static void prvSetupTimerInterrupt( void );\r
91 \r
92 /*-----------------------------------------------------------*/\r
93 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
94 {\r
95         *pxTopOfStack = ( StackType_t ) pxCode;          /* Task function start address */\r
96         pxTopOfStack--;\r
97         *pxTopOfStack = ( StackType_t ) pxCode;          /* Task function start address */\r
98         pxTopOfStack--;\r
99         *pxTopOfStack = portPSW;                            /* Initial PSW value */\r
100         pxTopOfStack--;\r
101         *pxTopOfStack = ( StackType_t ) 0x20202020;      /* Initial Value of R20 */\r
102         pxTopOfStack--;\r
103         *pxTopOfStack = ( StackType_t ) 0x21212121;      /* Initial Value of R21 */\r
104         pxTopOfStack--;\r
105         *pxTopOfStack = ( StackType_t ) 0x22222222;      /* Initial Value of R22 */\r
106         pxTopOfStack--;\r
107         *pxTopOfStack = ( StackType_t ) 0x23232323;      /* Initial Value of R23 */\r
108         pxTopOfStack--;\r
109         *pxTopOfStack = ( StackType_t ) 0x24242424;      /* Initial Value of R24 */\r
110         pxTopOfStack--;\r
111 #if (__DATA_MODEL__ == 0) || (__DATA_MODEL__ == 1)\r
112         *pxTopOfStack = ( StackType_t ) 0x25252525;      /* Initial Value of R25 */\r
113         pxTopOfStack--;\r
114 #endif /* configDATA_MODE */\r
115         *pxTopOfStack = ( StackType_t ) 0x26262626;      /* Initial Value of R26 */\r
116         pxTopOfStack--;\r
117         *pxTopOfStack = ( StackType_t ) 0x27272727;      /* Initial Value of R27 */\r
118         pxTopOfStack--;\r
119         *pxTopOfStack = ( StackType_t ) 0x28282828;      /* Initial Value of R28 */\r
120         pxTopOfStack--;\r
121         *pxTopOfStack = ( StackType_t ) 0x29292929;      /* Initial Value of R29 */\r
122         pxTopOfStack--;\r
123         *pxTopOfStack = ( StackType_t ) 0x30303030;      /* Initial Value of R30 */\r
124         pxTopOfStack--;         \r
125         *pxTopOfStack = ( StackType_t ) 0x19191919;      /* Initial Value of R19 */\r
126         pxTopOfStack--;\r
127         *pxTopOfStack = ( StackType_t ) 0x18181818;      /* Initial Value of R18 */\r
128         pxTopOfStack--;\r
129         *pxTopOfStack = ( StackType_t ) 0x17171717;      /* Initial Value of R17 */\r
130         pxTopOfStack--;\r
131         *pxTopOfStack = ( StackType_t ) 0x16161616;      /* Initial Value of R16 */\r
132         pxTopOfStack--;\r
133         *pxTopOfStack = ( StackType_t ) 0x15151515;      /* Initial Value of R15 */\r
134         pxTopOfStack--;\r
135         *pxTopOfStack = ( StackType_t ) 0x14141414;      /* Initial Value of R14 */\r
136         pxTopOfStack--;\r
137         *pxTopOfStack = ( StackType_t ) 0x13131313;      /* Initial Value of R13 */\r
138         pxTopOfStack--;\r
139         *pxTopOfStack = ( StackType_t ) 0x12121212;      /* Initial Value of R12 */\r
140         pxTopOfStack--;\r
141         *pxTopOfStack = ( StackType_t ) 0x11111111;      /* Initial Value of R11 */\r
142         pxTopOfStack--;\r
143         *pxTopOfStack = ( StackType_t ) 0x10101010;      /* Initial Value of R10 */\r
144         pxTopOfStack--;\r
145         *pxTopOfStack = ( StackType_t ) 0x99999999;      /* Initial Value of R09 */\r
146         pxTopOfStack--;\r
147         *pxTopOfStack = ( StackType_t ) 0x88888888;      /* Initial Value of R08 */\r
148         pxTopOfStack--;\r
149         *pxTopOfStack = ( StackType_t ) 0x77777777;      /* Initial Value of R07 */\r
150         pxTopOfStack--;\r
151         *pxTopOfStack = ( StackType_t ) 0x66666666;      /* Initial Value of R06 */\r
152         pxTopOfStack--;\r
153         *pxTopOfStack = ( StackType_t ) 0x55555555;      /* Initial Value of R05 */\r
154         pxTopOfStack--;\r
155 #if __DATA_MODEL__ == 0 || __DATA_MODEL__ == 1\r
156         *pxTopOfStack = ( StackType_t ) 0x44444444;      /* Initial Value of R04 */\r
157         pxTopOfStack--;\r
158 #endif /* configDATA_MODE */\r
159         *pxTopOfStack = ( StackType_t ) 0x22222222;      /* Initial Value of R02 */\r
160         pxTopOfStack--;\r
161         *pxTopOfStack = ( StackType_t ) pvParameters;    /* R1 is expected to hold the function parameter*/\r
162         pxTopOfStack--;\r
163         *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;        \r
164 \r
165         /*\r
166          * Return a pointer to the top of the stack we have generated so this can\r
167          * be stored in the task control block for the task.\r
168          */\r
169         return pxTopOfStack;\r
170 }\r
171 /*-----------------------------------------------------------*/\r
172 \r
173 BaseType_t xPortStartScheduler( void )\r
174 {\r
175         /* Setup the hardware to generate the tick.  Interrupts are disabled when\r
176         this function is called. */\r
177         prvSetupTimerInterrupt();\r
178 \r
179         /* Restore the context of the first task that is going to run. */\r
180         vPortStart();\r
181 \r
182         /* Should not get here as the tasks are now running! */\r
183         return pdTRUE;\r
184 }\r
185 /*-----------------------------------------------------------*/\r
186 \r
187 void vPortEndScheduler( void )\r
188 {\r
189         /* It is unlikely that the V850ES/Fx3 port will get stopped.  If required simply\r
190         disable the tick interrupt here. */\r
191 }\r
192 /*-----------------------------------------------------------*/\r
193 \r
194 /*\r
195  * Hardware initialisation to generate the RTOS tick.  This uses\r
196  */\r
197 static void prvSetupTimerInterrupt( void )\r
198 {\r
199         TM0CE     = 0;  /* TMM0 operation disable */\r
200         TM0EQMK0  = 1;  /* INTTM0EQ0 interrupt disable */\r
201         TM0EQIF0  = 0;  /* clear INTTM0EQ0 interrupt flag */\r
202 \r
203         #ifdef __IAR_V850ES_Fx3__\r
204         {\r
205                 TM0CMP0   = (((configCPU_CLOCK_HZ / configTICK_RATE_HZ) / 2)-1);    /* divided by 2 because peripherals only run at CPU_CLOCK/2 */\r
206         }\r
207         #else\r
208         {\r
209                 TM0CMP0   = (configCPU_CLOCK_HZ / configTICK_RATE_HZ);  \r
210         }\r
211         #endif\r
212 \r
213         TM0EQIC0 &= 0xF8;\r
214         TM0CTL0   = 0x00;\r
215         TM0EQIF0 =  0;  /* clear INTTM0EQ0 interrupt flag */\r
216         TM0EQMK0 =  0;  /* INTTM0EQ0 interrupt enable */\r
217         TM0CE =     1;  /* TMM0 operation enable */\r
218 }\r
219 /*-----------------------------------------------------------*/\r
220 \r
221 \r